?? uart.c
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/*******************************************************************/
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/*******************************************************************/
/*******************************************************************/
/* TEXAS INSTRUMENTS, INC. */
/* Date Created: 06/22/2001 */
/* Date Last Modified: 07/9/2001 */
/* Source File: uart.c */
/* Original Author: Todd Hiers */
/* Author: Scott Chen */
/* */
/* This code describes how to initialize the C6000 McBSP to */
/* communicate with an UART. By modifying the CHIP definition, */
/* this code can be used to run on 6x1x/6x0x/64x. #if statements */
/* are included in this code which allow flexibility in different */
/* devices. */
/* */
/* On 6x0x devices, DMA channels 1 and 2 are used to service */
/* McBSP 1 transmit and receive operations, respectively. On */
/* 6x1x/64x devices, EDMA channels 14 and 15 are used to service */
/* McBSP 1 transmit and receive operations, respectively. */
/* */
/* For this example, a data string is being transmitted from McBSP */
/* transmit (DX) to McBSP receive (DR). Each bit of the 8-bit */
/* ASCII character is expanded into 16-bit UART transmission word. */
/* Once being received, the 16-bit UART transmission words are */
/* compressed back to binary bits and ASCII form. */
/* */
/* For the code to work, DX, DR, and FSR of McBSP1 are shorted */
/* together. */
/* */
/* This code has been verified for functionality on 6711, 6202, */
/* and 6203 devices. */
/* */
/* This program is based on CSL 2.0. Please refer to the */
/* TMS320C6000 Chip Support Library API User's Guide for further */
/* information. */
/*******************************************************************/
/* Chip definition - Please change this accordingly */
#define CHIP_6711 1
/* Include files */
#include <csl.h>
#include <csl_mcbsp.h>
#include <csl_edma.h>
#include <csl_dma.h>
#include <csl_irq.h>
#include <stdio.h>
/* Create buffers and aligning them on an L2 cache line boundary. */
#pragma DATA_SECTION(xmitbuf,"xmit_buf");
unsigned short xmitbuf[0x0400];
#pragma DATA_SECTION(recvbuf,"recv_buf");
unsigned short recvbuf[0x0400];
/* Definitions */
#define BUFFER_SIZE 27 /* total number of UART data words */
#define TRUE 1
#define FALSE 0
/* Declare CSL objects */
MCBSP_Handle hMcbsp1; /* handle for McBSP1 */
#if (EDMA_SUPPORT)
EDMA_Handle hEdma14; /* handle for EDMA 14 */
EDMA_Handle hEdma15; /* handle for EDMA 15 */
#endif
#if (DMA_SUPPORT)
DMA_Handle hDma1; /* handle for DMA 1 */
DMA_Handle hDma2; /* handle for DMA 2 */
#endif
/* Global Variables */
volatile int receive_done = FALSE;
volatile int transmit_done = TRUE;
char xmit_msg[BUFFER_SIZE] = "McBSP does UART on C6000!\n";
char recv_msg[BUFFER_SIZE] = "Transmission didn't work!\n";
/* Include the vector table to call the IRQ ISRs hookup */
extern far void vectors();
/* Prototypes */
void ConfigMcBSP(void);
void ConfigEDMA(void);
void ConfigDMA(void);
void ProcessTransmitData(void);
void ProcessReceiveData(void);
short VoteLogic(unsigned short);
int CheckTestCase(void);
interrupt void c_int11(void);
interrupt void c_int09(void);
interrupt void c_int08(void);
/*******************************************************************/
/* void main(void) */
/*******************************************************************/
void main(void)
{
int waittime = 0;
int works = FALSE;
/* initialize the CSL library */
CSL_init();
/* enable NMI and GI */
IRQ_nmiEnable();
IRQ_globalEnable();
/* point to the IRQ vector table */
IRQ_setVecs(vectors);
#if (EDMA_SUPPORT)
/* disable and clear the event interrupt */
IRQ_reset(IRQ_EVT_EDMAINT);
/* clear Parameter RAM of EDMA */
EDMA_clearPram(0x00000000);
#endif
#if (DMA_SUPPORT)
DMA_reset(INV);
#endif
/* process transmit data */
printf("Processing Transmit string...\n");
ProcessTransmitData();
printf("String transmitted: %s \n", xmit_msg);
#if (EDMA_SUPPORT)
/* Open the EDMA channels - EDMA 14 for transmit, EDMA 15 for receive */
hEdma14 = EDMA_open(EDMA_CHA_XEVT1, EDMA_OPEN_RESET);
hEdma15 = EDMA_open(EDMA_CHA_REVT1, EDMA_OPEN_RESET);
#endif
#if (DMA_SUPPORT)
/* Open the DMA channels - DMA 1 for transmit, DMA 2 for receive */
hDma1 = DMA_open(DMA_CHA1, DMA_OPEN_RESET);
hDma2 = DMA_open(DMA_CHA2, DMA_OPEN_RESET);
#endif
/* Open the McBSP channel 1 */
hMcbsp1 = MCBSP_open(MCBSP_DEV1, MCBSP_OPEN_RESET);
#if (EDMA_SUPPORT)
/* Configure the EDMA channels */
ConfigEDMA();
/* enable EDMA-CPU interrupt tied to McBSP */
IRQ_enable(IRQ_EVT_EDMAINT);
/* enable EDMA channel interrupt to CPU */
EDMA_intEnable(14);
EDMA_intEnable(15);
/* Enable EDMA channels */
EDMA_enableChannel(hEdma14);
EDMA_enableChannel(hEdma15);
#endif
#if (DMA_SUPPORT)
/* Configure the DMA channels */
ConfigDMA();
IRQ_disable(IRQ_EVT_DMAINT1);
IRQ_disable(IRQ_EVT_DMAINT2);
IRQ_clear(IRQ_EVT_DMAINT1);
IRQ_clear(IRQ_EVT_DMAINT2);
IRQ_enable(IRQ_EVT_DMAINT1);
IRQ_enable(IRQ_EVT_DMAINT2);
DMA_start(hDma1); /*start DMA channel 1*/
DMA_start(hDma2); /*start DMA channel 2*/
#endif
/* Setup for McBSP */
ConfigMcBSP();
/* Start Sample Rate Generator: set /GRST = 1 */
MCBSP_enableSrgr(hMcbsp1);
/* inserted wait time for McBSP to get ready */
for (waittime=0; waittime<0xF; waittime++);
/* Wake up the McBSP as transmitter and receiver */
MCBSP_enableRcv(hMcbsp1);
MCBSP_enableXmt(hMcbsp1);
/* Enable Frame Sync Generator for McBSP 1: set /FRST = 1 */
MCBSP_enableFsync(hMcbsp1);
/* To flag an interrupt to the CPU when EDMA transfer/receive is done */
while (!receive_done || !transmit_done);
/* Check to make sure the test case works */
works = CheckTestCase();
if (works != 0) printf("Transmission Error....\n\n");
else printf("Received data matched transmitted data!\n\n");
/* process received data */
printf("Processing Receive string...\n");
ProcessReceiveData();
printf("String received: %s \n", recv_msg);
#if (EDMA_SUPPORT)
IRQ_disable(IRQ_EVT_EDMAINT);
EDMA_RSET(CIER, 0x0);
#endif
#if (DMA_SUPPORT)
IRQ_disable(IRQ_EVT_DMAINT1);
IRQ_disable(IRQ_EVT_DMAINT2);
#endif
MCBSP_close(hMcbsp1); /* close McBSP 1 */
#if (EDMA_SUPPORT)
EDMA_close(hEdma14); /* close EDMA 14 */
EDMA_close(hEdma15); /* close EDMA 15 */
#endif
#if (DMA_SUPPORT)
DMA_close(hDma1); /* close DMA 1 */
DMA_close(hDma2); /* close DMA 2 */
#endif
} /* End of main() */
/*******************************************************************/
/* void ConfigEDMA(void): set up EDMA channel 14/15 for UART Xmit */
/*******************************************************************/
#if (EDMA_SUPPORT)
void ConfigEDMA(void)
{
EDMA_configArgs(hEdma14,
/* OPT Setup */
#if (C64_SUPPORT)
EDMA_OPT_RMK(
EDMA_OPT_PRI_HIGH, /* 1 */
EDMA_OPT_ESIZE_16BIT, /* 01 */
EDMA_OPT_2DS_NO, /* 0 */
EDMA_OPT_SUM_INC, /* 01 */
EDMA_OPT_2DD_NO, /* 0 */
EDMA_OPT_DUM_NONE, /* 00 */
EDMA_OPT_TCINT_YES, /* 1 */
EDMA_OPT_TCC_OF(14), /* 14 */
EDMA_OPT_TCCM_DEFAULT, /* 0 */
EDMA_OPT_ATCINT_DEFAULT, /* 0 */
EDMA_OPT_ATCC_DEFAULT, /* 0 */
EDMA_OPT_PDTS_DEFAULT, /* 0 */
EDMA_OPT_PDTD_DEFAULT, /* 0 */
EDMA_OPT_LINK_NO, /* 0 */
EDMA_OPT_FS_NO /* 0 */
),
#else
EDMA_OPT_RMK(
EDMA_OPT_PRI_HIGH, /* 1 */
EDMA_OPT_ESIZE_16BIT, /* 01 */
EDMA_OPT_2DS_NO, /* 0 */
EDMA_OPT_SUM_INC, /* 01 */
EDMA_OPT_2DD_NO, /* 0 */
EDMA_OPT_DUM_NONE, /* 00 */
EDMA_OPT_TCINT_YES, /* 1 */
EDMA_OPT_TCC_OF(14), /* 14 */
EDMA_OPT_LINK_NO, /* 0 */
EDMA_OPT_FS_NO /* 0 */
),
#endif
/* SRC Setup */
EDMA_SRC_RMK((Uint32) xmitbuf), /*xmitbuf address*/
/* CNT Setup */
EDMA_CNT_RMK(
EDMA_CNT_FRMCNT_DEFAULT,
EDMA_CNT_ELECNT_OF(BUFFER_SIZE*11)
),
/* DST Setup */
EDMA_DST_RMK(MCBSP_getXmtAddr(hMcbsp1)),
/* IDX Setup */
EDMA_IDX_RMK(0,0),
/* RLD Setup */
EDMA_RLD_RMK(0,0)
);
EDMA_configArgs(hEdma15,
/* OPT Setup */
#if (C64_SUPPORT)
EDMA_OPT_RMK(
EDMA_OPT_PRI_HIGH, /* 1 */
EDMA_OPT_ESIZE_16BIT, /* 01 */
EDMA_OPT_2DS_NO, /* 0 */
EDMA_OPT_SUM_NONE, /* 00 */
EDMA_OPT_2DD_NO, /* 0 */
EDMA_OPT_DUM_INC, /* 01 */
EDMA_OPT_TCINT_YES, /* 1 */
EDMA_OPT_TCC_OF(15), /* 15 */
EDMA_OPT_TCCM_DEFAULT, /* 0 */
EDMA_OPT_ATCINT_DEFAULT, /* 0 */
EDMA_OPT_ATCC_DEFAULT, /* 0 */
EDMA_OPT_PDTS_DEFAULT, /* 0 */
EDMA_OPT_PDTD_DEFAULT, /* 0 */
EDMA_OPT_LINK_NO, /* 0 */
EDMA_OPT_FS_NO /* 0 */
),
#else
EDMA_OPT_RMK(
EDMA_OPT_PRI_HIGH, /* 1 */
EDMA_OPT_ESIZE_16BIT, /* 01 */
EDMA_OPT_2DS_NO, /* 0 */
EDMA_OPT_SUM_NONE, /* 00 */
EDMA_OPT_2DD_NO, /* 0 */
EDMA_OPT_DUM_INC, /* 01 */
EDMA_OPT_TCINT_YES, /* 1 */
EDMA_OPT_TCC_OF(15), /* 15 */
EDMA_OPT_LINK_NO, /* 0 */
EDMA_OPT_FS_NO /* 0 */
),
#endif
/* SRC Setup */
EDMA_SRC_RMK(MCBSP_getRcvAddr(hMcbsp1)),
/* CNT Setup */
EDMA_CNT_RMK(0, (BUFFER_SIZE * 11)),
/* DST Setup */
EDMA_DST_RMK((Uint32) recvbuf), /*recvbuf address*/
/* IDX Setup */
EDMA_IDX_RMK(0,0),
/* RLD Setup */
EDMA_RLD_RMK(0,0)
);
} /* End of ConfigEDMA() */
#endif
/*******************************************************************/
/* void ConfigDMA(void): set up DMA channels 1 & 2 for UART Xmit */
/*******************************************************************/
#if (DMA_SUPPORT)
void ConfigDMA(void)
{
DMA_configArgs(hDma1,
/* PRICTL Setup */
DMA_PRICTL_RMK(
DMA_PRICTL_DSTRLD_NONE,
DMA_PRICTL_SRCRLD_NONE,
DMA_PRICTL_EMOD_HALT,
DMA_PRICTL_FS_DISABLE,
DMA_PRICTL_TCINT_ENABLE,
DMA_PRICTL_PRI_DMA,
DMA_PRICTL_WSYNC_XEVT1,
DMA_PRICTL_RSYNC_NONE,
DMA_PRICTL_INDEX_NA,
DMA_PRICTL_CNTRLD_NA,
DMA_PRICTL_SPLIT_DISABLE,
DMA_PRICTL_ESIZE_16BIT,
DMA_PRICTL_DSTDIR_NONE,
DMA_PRICTL_SRCDIR_INC,
DMA_PRICTL_START_STOP
),
/* SECCTL Setup */
DMA_SECCTL_RMK(
DMA_SECCTL_WSPOL_ACTIVEHIGH,
DMA_SECCTL_RSPOL_ACTIVEHIGH,
DMA_SECCTL_FSIG_NORMAL,
DMA_SECCTL_DMACEN_FRAMECOND,
DMA_SECCTL_WSYNCCLR_NOTHING,
DMA_SECCTL_WSYNCSTAT_CLEAR,
DMA_SECCTL_RSYNCCLR_NOTHING,
DMA_SECCTL_RSYNCSTAT_CLEAR,
DMA_SECCTL_WDROPIE_DISABLE,
DMA_SECCTL_WDROPCOND_CLEAR,
DMA_SECCTL_RDROPIE_DISABLE,
DMA_SECCTL_RDROPCOND_CLEAR,
DMA_SECCTL_BLOCKIE_ENABLE, /* BLOCK IE=1: enables DMA channel int */
DMA_SECCTL_BLOCKCOND_CLEAR,
DMA_SECCTL_LASTIE_DISABLE,
DMA_SECCTL_LASTCOND_CLEAR,
DMA_SECCTL_FRAMEIE_DISABLE,
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