?? config.inc
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; --- SYSCON3 values: disable on-chip peripherals
;
_ADCDIS EQU 0 ; 1 = disable Analog/Digital Converter (SYSCON3.0)
_ASC0DIS EQU 0 ; 1 = disable UART ASC0 (SYSCON3.1)
_SSCDIS EQU 0 ; 1 = disable Synchronus Serial Cnl SSC (SYSCON3.2)
_GPTDIS EQU 0 ; 1 = disable Timer Block GPT (SYSCON3.3)
; reserved (SYSCON3.4)
_FMDIS EQU 0 ; 1 = disable on-chip Flash Memory Module (SYSCON3.5)
_CC1DIS EQU 0 ; 1 = disable CAPCOM Unit 1 (SYSCON3.6)
_CC2DIS EQU 0 ; 1 = disable CAPCOM Unit 2 (SYSCON3.7)
_CC6DIS EQU 0 ; 1 = disable CAPCOM Unit 6 (SYSCON3.8)
_PWMDIS EQU 0 ; 1 = disable Pulse Width Modulation Unit (SYSCON3.9)
_ASC1DIS EQU 0 ; 1 = disable UART ASC1 (SYSCON3.10)
_I2CDIS EQU 0 ; 1 = disable I2C Bus Module (SYSCON3.11)
; ; reserved (SYSCON3.12)
_CAN1DIS EQU 0 ; 1 = disable on-chip CAN Module 1 (SYSCON3.13)
_CAN2DIS EQU 0 ; 1 = disable on-chip CAN Module 2 (SYSCON3.14)
_PCDDIS EQU 0 ; 1 = disable Peripheral Clock Driver (SYSCON3.15)
;
;------------------------------------------------------------------------------
;
; BUSCON1/ADDRSEL1 .. BUSCON4/ADDRSEL4 Initialization
; ===================================================
;
;
; BUSCON1/ADDRSEL1
; --- Set BUSCON1 = 1 to initialize the BUSCON1/ADDRSEL1 registers
$SET (BUSCON1 = 1)
;
; Define the start address and the address range of Chip Select 1 (CS1#)
; This values are used to set the ADDRSEL1 register
%DEFINE (ADDRESS1) (000000H) ; Set CS1# Start Address (default 100000H)
%DEFINE (RANGE1) (4096K) ; Set CS1# Range (default 1024K = 1MB)
;
; MCTC1: Memory Cycle Time (BUSCON1.0 .. BUSCON1.3):
; Note: if RDYEN1 == 1 a maximum number of 7 waitstates can be selected
_MCTC1 EQU 0 ; Memory wait states is 1 (MCTC1 field = 0EH).
;
; RWDC1: Read/Write Signal Delay (BUSCON1.4):
_RWDC1 EQU 1 ; 0 = Delay Time 0.5 States
; ; 1 = No Delay Time 0 States
;
; MTTC1: Memory Tri-state Time (BUSCON1.5):
_MTTC1 EQU 1 ; 0 = Delay Time 0.5 States
; ; 1 = No Delay Time 0 States
;
; BTYP1: External Bus Configuration Control (BUSCON1.6 .. BUSCON1.7):
_BTYP1 EQU 2 ; 0 = 8 Bit Non Multiplexed
; ; 1 = 8 Bit Multiplexed
; ; 2 = 16 Bit Non Multiplexed
; ; 3 = 16 Bit Multiplexed
; !!!!!!!!! Achtung: Wird in INST167 an CS0 angepasst !!!!!!!!!!!!!
;
; ALECTL1: ALE Lengthening Control Bit (BUSCON1.9):
_ALECTL1 EQU 0 ; see data sheet for description
;
; BUSACT1: Bus Active Control Bit (BUSCON1.10):
_BUSACT1 EQU 1 ; = 0 external (ADDRSEL1) bus disabled
; = 1 external (ADDRSEL1) bus enabled
;
; RDYEN1: READY# Input Enable control bit (BUSCON1.12):
_RDYEN1 EQU 0 ; 0 = READY# function disabled
; ; 1 = READY# function enabled
;
; RDY_AS1: Synchronous / Asynchronous READY# Input (BUSCON1.3):
; Note: This bit is only valid if _RDYEN1 == 1.
_RDY_AS1 EQU 0 ; 0 = synchronous READY# input
; ; 1 = asynchronous READY# input
;
; CSREN1: Read Chip Select Enable bit (BUSCON1.14):
_CSREN1 EQU 0 ; 0 = CS1# is independent of read command (RD#)
; ; 1 = CS1# is generated for the duration of read
;
; CSWEN1: Write Chip Select Enable bit (BUSCON1.15):
_CSWEN1 EQU 0 ; 0 = CS1# is independent of write command (WR#)
; ; 1 = CS1# is generated for the duration of write
;
;
; BUSCON2/ADDRSEL2
; --- Set BUSCON2 = 1 to initialize the BUSCON2/ADDRSEL2 registers
$SET (BUSCON2 = 0)
;
; Define the start address and the address range of Chip Select 2 (CS2#)
; This values are used to set the ADDRSEL2 register
%DEFINE (ADDRESS2) (200000H) ; Set CS2# Start Address (default 200000H)
%DEFINE (RANGE2) (1024K) ; Set CS2# Range (default 1024K = 1MB)
;
; MCTC2: Memory Cycle Time (BUSCON2.0 .. BUSCON2.3):
; Note: if RDYEN2 == 1 a maximum number of 7 waitstates can be selected
_MCTC2 EQU 1 ; Memory wait states is 1 (MCTC2 field = 0EH).
;
; RWDC2: Read/Write Signal Delay (BUSCON2.4):
_RWDC2 EQU 0 ; 0 = Delay Time 0.5 States
; ; 1 = No Delay Time 0 States
;
; MTTC2: Memory Tri-state Time (BUSCON2.5):
_MTTC2 EQU 1 ; 0 = Delay Time 0.5 States
; ; 1 = No Delay Time 0 States
;
; BTYP2: External Bus Configuration Control (BUSCON2.6 .. BUSCON2.7):
_BTYP2 EQU 2 ; 0 = 8 Bit Non Multiplexed
; ; 1 = 8 Bit Multiplexed
; ; 2 = 16 Bit Non Multiplexed
; ; 3 = 16 Bit Multiplexed
;
; ALECTL2: ALE Lengthening Control Bit (BUSCON2.9):
_ALECTL2 EQU 0 ; see data sheet for description
;
; BUSACT2: Bus Active Control Bit (BUSCON2.10):
_BUSACT2 EQU 1 ; = 0 external (ADDRSEL2) bus disabled
; = 1 external (ADDRSEL2) bus enabled
;
; RDYEN2: READY# Input Enable control bit (BUSCON2.12):
_RDYEN2 EQU 0 ; 0 = READY# function disabled
; ; 1 = READY# function enabled
;
; RDY_AS2: Synchronous / Asynchronous READY# Input (BUSCON2.3):
; Note: This bit is only valid if _RDYEN2 == 1.
_RDY_AS2 EQU 0 ; 0 = synchronous READY# input
; ; 1 = asynchronous READY# input
;
; CSREN2: Read Chip Select Enable bit (BUSCON2.14):
_CSREN2 EQU 0 ; 0 = CS2# is independent of read command (RD#)
; ; 1 = CS2# is generated for the duration of read
;
; CSWEN2: Write Chip Select Enable bit (BUSCON2.15):
_CSWEN2 EQU 0 ; 0 = CS2# is independent of write command (WR#)
; ; 1 = CS2# is generated for the duration of write
;
;
; BUSCON3/ADDRSEL3
; --- Set BUSCON3 = 1 to initialize the BUSCON3/ADDRSEL3 registers
$SET (BUSCON3 = 0)
;
; Define the start address and the address range of Chip Select 3 (CS3#)
; This values are used to set the ADDRSEL3 register
%DEFINE (ADDRESS3) (300000H) ; Set CS3# Start Address (default 300000H)
%DEFINE (RANGE3) (1024K) ; Set CS3# Range (default 1024K = 1MB)
;
; MCTC3: Memory Cycle Time (BUSCON3.0 .. BUSCON3.3):
; Note: if RDYEN3 == 1 a maximum number of 7 waitstates can be selected
_MCTC3 EQU 1 ; Memory wait states is 1 (MCTC3 field = 0EH).
;
; RWDC3: Read/Write Signal Delay (BUSCON3.4):
_RWDC3 EQU 0 ; 0 = Delay Time 0.5 States
; ; 1 = No Delay Time 0 States
;
; MTTC3: Memory Tri-state Time (BUSCON3.5):
_MTTC3 EQU 1 ; 0 = Delay Time 0.5 States
; ; 1 = No Delay Time 0 States
;
; BTYP3: External Bus Configuration Control (BUSCON3.6 .. BUSCON3.7):
_BTYP3 EQU 2 ; 0 = 8 Bit Non Multiplexed
; ; 1 = 8 Bit Multiplexed
; ; 2 = 16 Bit Non Multiplexed
; ; 3 = 16 Bit Multiplexed
;
; ALECTL3: ALE Lengthening Control Bit (BUSCON3.9):
_ALECTL3 EQU 0 ; see data sheet for description
;
; BUSACT3: Bus Active Control Bit (BUSCON3.10):
_BUSACT3 EQU 1 ; = 0 external (ADDRSEL3) bus disabled
; = 1 external (ADDRSEL3) bus enabled
;
; RDYEN3: READY# Input Enable control bit (BUSCON3.12):
_RDYEN3 EQU 0 ; 0 = READY# function disabled
; ; 1 = READY# function enabled
;
; RDY_AS3: Synchronous / Asynchronous READY# Input (BUSCON3.3):
; Note: This bit is only valid if _RDYEN3 == 1.
_RDY_AS3 EQU 0 ; 0 = synchronous READY# input
; ; 1 = asynchronous READY# input
;
; CSREN3: Read Chip Select Enable bit (BUSCON3.14):
_CSREN3 EQU 0 ; 0 = CS3# is independent of read command (RD#)
; ; 1 = CS3# is generated for the duration of read
;
; CSWEN3: Write Chip Select Enable bit (BUSCON3.15):
_CSWEN3 EQU 0 ; 0 = CS3# is independent of write command (WR#)
; ; 1 = CS3# is generated for the duration of write
;
;
; BUSCON4/ADDRSEL4
; --- Set BUSCON4 = 1 to initialize the BUSCON4/ADDRSEL4 registers
$SET (BUSCON4 = 0)
;
; Define the start address and the address range of Chip Select 4 (CS4#)
; This values are used to set the ADDRSEL4 register
%DEFINE (ADDRESS4) (400000H) ; Set CS4# Start Address (default 400000H)
%DEFINE (RANGE4) (1024K) ; Set CS4# Range (default 1024K = 1MB)
;
; MCTC4: Memory Cycle Time (BUSCON4.0 .. BUSCON4.3):
; Note: if RDYEN4 == 1 a maximum number of 7 waitstates can be selected
_MCTC4 EQU 1 ; Memory wait states is 1 (MCTC4 field = 0EH).
;
; RWDC4: Read/Write Signal Delay (BUSCON4.4):
_RWDC4 EQU 0 ; 0 = Delay Time 0.5 States
; ; 1 = No Delay Time 0 States
;
; MTTC4: Memory Tri-state Time (BUSCON4.5):
_MTTC4 EQU 1 ; 0 = Delay Time 0.5 States
; ; 1 = No Delay Time 0 States
;
; BTYP4: External Bus Configuration Control (BUSCON4.6 .. BUSCON4.7):
_BTYP4 EQU 2 ; 0 = 8 Bit Non Multiplexed
; ; 1 = 8 Bit Multiplexed
; ; 2 = 16 Bit Non Multiplexed
; ; 3 = 16 Bit Multiplexed
;
; ALECTL4: ALE Lengthening Control Bit (BUSCON4.9):
_ALECTL4 EQU 0 ; see data sheet for description
;
; BUSACT4: Bus Active Control Bit (BUSCON4.10):
_BUSACT4 EQU 1 ; = 0 external (ADDRSEL4) bus disabled
; = 1 external (ADDRSEL4) bus enabled
;
; RDYEN4: READY# Input Enable control bit (BUSCON4.12):
_RDYEN4 EQU 0 ; 0 = READY# function disabled
; ; 1 = READY# function enabled
;
; RDY_AS4: Synchronous / Asynchronous READY# Input (BUSCON4.3):
; Note: This bit is only valid if _RDYEN4 == 1.
_RDY_AS4 EQU 0 ; 0 = synchronous READY# input
; ; 1 = asynchronous READY# input
;
; CSREN4: Read Chip Select Enable bit (BUSCON4.14):
_CSREN4 EQU 0 ; 0 = CS4# is independent of read command (RD#)
; ; 1 = CS4# is generated for the duration of read
;
; CSWEN4: Write Chip Select Enable bit (BUSCON4.15):
_CSWEN4 EQU 0 ; 0 = CS4# is independent of write command (WR#)
; ; 1 = CS4# is generated for the duration of write
;
;------------------------------------------------------------------------------
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