{                //                // This NAND device has 256 bytes per page.                //                NANDWrite_256(HwNANDAddress, ulParam1 << 1,                              (unsigned char *)ulParam2,                              (unsigned char *)ulParam3);                NANDWrite_256(HwNANDAddress, (ulParam1 << 1) + 1,                              (unsigned char *)ulParam2 + 256,                              (unsigned char *)ulParam3 + 8);            }            else#endif            if(ulParam4 & FLASH_ADDR_4_CYCLE)            {                //                // This NAND device has 512 bytes per page and requires 4                // address cycles.                //                NANDWrite_512_4(HwNANDAddress, ulParam1,                                (unsigned char *)ulParam2,                                (unsigned char *)ulParam3);            }            else            {                //                // This NAND device has 512 bytes per page and requires 3                // address cycles.                //                NANDWrite_512_3(HwNANDAddress, ulParam1,                                (unsigned char *)ulParam2,                                (unsigned char *)ulParam3);            }            //            // Indicate that the on-board NAND is busy.            //            sNAND.ulFlags |= ulBusyFlag;            //            // We're done with this request.            //            break;        }        //        // Erase a block of the on-board NAND.        //        case IOCTL_FLASH_ERASE:        {            //            // Erase this block of the on-board NAND.            //            if(ulParam2 & FLASH_BS16)            {                //                // This NAND device has 16 pages per block.                //                NANDErase_16(HwNANDAddress, ulParam1);            }            else if(ulParam2 & FLASH_ADDR_4_CYCLE)            {                //                // This NAND device has 32 pages per block and requires 4                // address cycles.                //                NANDErase_32_4(HwNANDAddress, ulParam1);            }            else            {                //                // This NAND device has 32 pages per block and requires 3                // address cycles.                //                NANDErase_32_3(HwNANDAddress, ulParam1);            }            //            // Indicate that the on-board NAND is busy.            //            sNAND.ulFlags |= ulBusyFlag;            //            // We're done with this request.            //            break;        }        //        // Read the redundant data from a page of the on-board NAND.        //        case IOCTL_FLASH_READ_REDT:        {            //            // Read the redundant data from the on-board NAND.            //#ifdef SUPPORT_TINY_MEDIA            if(ulParam3 & FLASH_PS256)            {                //                // This NAND device has 256 bytes per page.                //                NANDReadRedt_256(HwNANDAddress, ulParam1 << 1,                                 (unsigned char *)ulParam2);            }            else#endif            if(ulParam3 & FLASH_ADDR_4_CYCLE)            {                //                // This NAND device has 512 bytes per page and requires 4                // address cycles.                //                NANDReadRedt_512_4(HwNANDAddress, ulParam1,                                   (unsigned char *)ulParam2);            }            else            {                //                // This NAND device has 512 bytes per page and requires 3                // address cycles.                //                NANDReadRedt_512_3(HwNANDAddress, ulParam1,                                   (unsigned char *)ulParam2);            }            //            // We're done with this request.            //            break;        }        //        // Write the redundant data to a page of the on-board NAND.        //        case IOCTL_FLASH_WRITE_REDT:        {            //            // Write the redundant data to the on-board NAND.            //#ifdef SUPPORT_TINY_MEDIA            if(ulParam3 & FLASH_PS256)            {                //                // This NAND device has 256 bytes per page.                //                NANDWriteRedt_256(HwNANDAddress, ulParam1 << 1,                                  (unsigned char *)ulParam2);                NANDWriteRedt_256(HwNANDAddress, (ulParam1 << 1) + 1,                                  (unsigned char *)ulParam2 + 8);            }            else#endif            if(ulParam3 & FLASH_ADDR_4_CYCLE)            {                //                // This NAND device has 512 bytes per page and requires 4                // address cycles.                //                NANDWriteRedt_512_4(HwNANDAddress, ulParam1,                                    (unsigned char *)ulParam2);            }            else            {                //                // This NAND device has 512 bytes per page and requires 3                // address cycles.                //                NANDWriteRedt_512_3(HwNANDAddress, ulParam1,                                    (unsigned char *)ulParam2);            }            //            // Indicate that the on-board NAND is busy.            //            sNAND.ulFlags |= ulBusyFlag;            //            // We're done with this request.            //            break;        }        //        // We should never get here, but just in case...        //        default:        {            //            // Deselect the on-board NAND.            //            pulGPIO[HwPortABCD >> 2] |= ulCS;            //            // Return a failure.            //            return(0);        }    }    //    // Deselect the on-board NAND.    //    pulGPIO[HwPortABCD >> 2] |= ulCS;    //    // Success.    //    return(1);}//****************************************************************************//// ConfigureNAND determines if we have a pair of NAND FLASH devices which can// be treated as a single, larger NAND FLASH device.////****************************************************************************static voidConfigureNAND(void){#ifdef HwPortABCD_NAND2_CS    volatile unsigned long *pulGPIO = (unsigned long *)HwBaseAddress;    unsigned long ulDeviceID1, ulDeviceID2;    //    // Select the first on-board NAND FLASH.    //    pulGPIO[HwPortABCD >> 2] &= ~HwPortABCD_NAND1_CS;    //    // Get the device ID of the first NAND FLASH.    //    ulDeviceID1 = NANDGetID(HwNANDAddress);    //    // Deselect the first on-board NAND FLASH.    //    pulGPIO[HwPortABCD >> 2] |= HwPortABCD_NAND1_CS;    //    // Select the second on-board NAND FLASH.    //    pulGPIO[HwPortABCD >> 2] &= ~HwPortABCD_NAND2_CS;    //    // Get the device ID of the second NAND FLASH.    //    ulDeviceID2 = NANDGetID(HwNANDAddress);    //    // Deselect the second on-board NAND FLASH.    //    pulGPIO[HwPortABCD >> 2] |= HwPortABCD_NAND2_CS;    //    // We only support the case of two identical NAND FLASH devices.    //    if(ulDeviceID1 != ulDeviceID2)    {        return;    }    //    // See if we can join the two NAND FLASH devices as a single, larger NAND    // FLASH.    //    switch(ulDeviceID1)    {        //        // A pair of 16MB NAND FLASH devices combining to form a single 32MB        // NAND FLASH device.        //        case 0x73:        {            //            // Save the faked device ID.            //            sNAND.ulFlags |= 0x75;            //            // We're done handling this configuration.            //            break;        }        //        // A pair of 32MB NAND FLASH devices combining to form a single 64MB        // NAND FLASH device.        //        case 0x75:        {            //            // Save the faked device ID.            //            sNAND.ulFlags |= 0x76;            //            // We're done handling this configuration.            //            break;        }        //        // A pair of 64MB NAND FLASH devices combining to form a single 128MB        // NAND FLASH device.        //        case 0x76:        {            //            // Save the faked device ID.            //            sNAND.ulFlags |= 0x79;            //            // We're done handling this configuration.            //            break;        }    }#endif}//****************************************************************************//// The file system IOCTL entry point for the on-board NAND.////****************************************************************************unsigned longNANDIoctl(unsigned char *pucScratch, unsigned char *pucWriteBuffer,          unsigned long ulIoctl, unsigned long ulInstance,          unsigned long ulParam1, unsigned long ulParam2){    //    // If we are being initialized, then we need to setup our global variables.    //    if(ulIoctl == IOCTL_FS_INIT)    {        //        // Set the address of the FLASH driver to be used by the FTL layer.        //        sNAND.sFTL.pfnFlashDriver = NANDFLASHIoctl;        //        // Set the address of the FTL layer to be used by the FAT layer.        //        sNAND.sFAT.pfnBlockDriver = FTLIoctl;        sNAND.sFAT.pvBlockDriverState = &sNAND.sFTL;        //        // Clear the state of the NAND FLASH driver's state flags.        //        sNAND.ulFlags = 0;        //        // See if we have a pair of NAND FLASH devices that we want to treat as        // a single, larger NAND FLASH device.        //        ConfigureNAND();        //        // Call the FAT code.        //        if(FATIoctl(&sNAND.sFAT, pucScratch, pucWriteBuffer, IOCTL_FS_INIT,                    ulInstance, ulParam1, ulParam2) == 0)        {            //            // The FAT failed to initialize, so we need to format the on-board            // NAND FLASH.            //            return(FATIoctl(&sNAND.sFAT, pucScratch, pucWriteBuffer,                            IOCTL_FS_FORMAT, 0, 0, 0));        }        //        // Success.        //        return(1);    }    //    // If the name of the media is being requested, then return it.    //    if(ulIoctl == IOCTL_FS_GETMEDIANAME)    {        //        // Return the name of the drive.        //        memcpy((void *)ulParam1, pusDriveName, sizeof(pusDriveName));        //        // Return the length of the drive name.        //        *((unsigned long *)ulParam2) = sizeof(pusDriveName);        //        // Success.        //        return(1);    }    //    // Call the FAT code.    //    return(FATIoctl(&sNAND.sFAT, pucScratch, pucWriteBuffer, ulIoctl,                    ulInstance, ulParam1, ulParam2));}