/*================================================================== * *  This file is part of a small Nand flash bootloader designed to *  be loaded via EP93xx SPI boot. * *  Copyright Cirrus Logic Corporation, 2007.  All rights reserved * ==================================================================*/#ifndef _regs_h_#define _regs_h_#define SDRAM_GLCONFIG	0x80060004#define SDRAM_REFRESH	0x80060008#define SDRAM_DEVCFG	0x80060010#define SYSCON_CLKSET1	0x80930020#define SYSCON_CLKSET2	0x80930024#define BOOTMODECLR	0x80930058#define SYSCFG		0x8093009c#define SBOOT_BIT	(1<<8)//GPIO Registers#define PADR		0x80840000#define PADDR		0x80840010#define PEDR		0x80840020#define PEDDR		0x80840024#define PBDR		0x80840004#define PBDDR		0x80840014#define SWLOCK		0x809300c0#define DEVCFG		0x80930080#define PWRCNT		0x80930004#define WATCHDOG	0x80940000//-----------------------------------------------------------------------------// DEV_CFG Register Defines//-----------------------------------------------------------------------------#define SYSCON_DEVCFG_U0EN             (1<<18)#define UART0DR			0x808c0000#define UART0LINCTRLHIGH	0x808c0008#define UART0LINCTRLMID		0x808c000c#define UART0LINCTRLLOW		0x808c0010#define UART0CTRL		0x808c0014#define UART0FLAG		0x808c0018#define SDRAM_GLCONFIG	0x80060004#define SDRAM_REFRESH	0x80060008#define SDRAM_DEVCFG	0x80060010#define SYSCON_CLKSET1	0x80930020#define SYSCON_CLKSET2	0x80930024// SYSTEM constants#define SYSTEM_CLOCK	14745600#define BOOT_BAUDRATE	57600#define INTERNAL_SRAM   	0x80014000#define INTERNAL_SRAM_END   	0x800150fc#define SDRAM_LOCATION 	0xc0000000#endif //_regs_h_