VERSION=1.15
HEADER
FILE="processRxBit.asf"
FID=4094ffa4
LANGUAGE=VERILOG
ENTITY="processRxBit"
FRAMES=ON
FREEOID=258
"LIBRARIES=//////////////////////////////////////////////////////////////////////\n////                                                              ////\n//// processrxbit\n////                                                              ////\n//// This file is part of the usbhostslave opencores effort.\n//// http://www.opencores.org/cores/usbhostslave/                 ////\n////                                                              ////\n//// Module Description:                                          ////\n//// \n////                                                              ////\n//// To Do:                                                       ////\n//// \n////                                                              ////\n//// Author(s):                                                   ////\n//// - Steve Fielding, sfielding@base2designs.com                 ////\n////                                                              ////\n//////////////////////////////////////////////////////////////////////\n////                                                              ////\n//// Copyright (C) 2004 Steve Fielding and OPENCORES.ORG          ////\n////                                                              ////\n//// This source file may be used and distributed without         ////\n//// restriction provided that this copyright statement is not    ////\n//// removed from the file and that any derivative work contains  ////\n//// the original copyright notice and the associated disclaimer. ////\n////                                                              ////\n//// This source file is free software; you can redistribute it   ////\n//// and/or modify it under the terms of the GNU Lesser General   ////\n//// Public License as published by the Free Software Foundation; ////\n//// either version 2.1 of the License, or (at your option) any   ////\n//// later version.                                               ////\n////                                                              ////\n//// This source is distributed in the hope that it will be       ////\n//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////\n//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////\n//// PURPOSE. See the GNU Lesser General Public License for more  ////\n//// details.                                                     ////\n////                                                              ////\n//// You should have received a copy of the GNU Lesser General    ////\n//// Public License along with this source; if not, download it   ////\n//// from http://www.opencores.org/lgpl.shtml                     ////\n////                                                              ////\n//////////////////////////////////////////////////////////////////////\n//\n`include \"timescale.v\"\n`include \"usbSerialInterfaceEngine_h.v\"\n\n"
END
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OBJECTS
L 7 6 0 TEXT "Labels" | 23239,210942 1 0 0 "prRxBit"
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G 1 0 0 TEXT 0,0,0 0 0 0 255,255,255 0 3527 1480 0000 0  "Arial" 0 | 94226,265828 1 0 0 "Module: processRxBit"
L 8 9 0 TEXT "State Labels" | 42238,183458 1 0 0 "START\n/0/"
S 9 6 0 ELLIPSE "States" | 42238,183458 6500 6500
I 12 6 0 Builtin Reset | 22728,190398
W 13 6 0 12 9 BEZIER "Transitions" | 22728,190398 27224,190134 31822,186104 35786,184244
L 15 16 0 TEXT "State Labels" | 116068,123104 1 0 0 "IDLE"
S 16 6 4100 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 116068,123104 6500 6500
H 17 16 0 RECT 0,0,0 0 0 1 255,255,255 0 | 15700,15700 200200,263700
S 18 17 8192 ELLIPSE "States" | 99337,112266 6500 6500
L 19 18 0 TEXT "State Labels" | 99337,112266 1 0 0 "FIRST_BIT\n/1/"
I 20 17 0 Builtin Entry | 56736,212076
I 21 17 0 Builtin Exit | 146563,24238
W 23 17 0 18 21 BEZIER "Transitions" | 103975,107713 107885,100636 103154,45547 143864,24443
S 24 6 12292 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 116801,94499 6500 6500
L 25 24 0 TEXT "State Labels" | 116801,94499 1 0 0 "DATA_RX"
H 32 24 0 RECT 0,0,0 0 0 1 255,255,255 0 | 15330,15700 199830,263700
H 41 33 0 RECT 0,0,0 0 0 1 255,255,255 0 | 15700,15700 200200,263700
S 33 6 16388 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 118212,64680 6500 6500
L 34 33 0 TEXT "State Labels" | 118212,64680 1 0 0 "RES_RX"
W 35 41 0 40 37 BEZIER "Transitions" | 111741,134422 116780,127404 121695,118778 126735,111760
W 36 41 0 38 40 BEZIER "Transitions" | 90251,167640 94982,160656 99574,152064 104305,145080
I 37 41 0 Builtin Exit | 129540,111760
I 38 41 0 Builtin Entry | 86360,167640
L 39 40 0 TEXT "State Labels" | 107950,139700 1 0 0 "CHK\n/9/"
S 40 41 65536 ELLIPSE "States" | 107950,139700 6500 6500
S 42 6 20484 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 119820,36808 6500 6500
L 43 42 0 TEXT "State Labels" | 119820,36808 1 0 0 "RES_END"
H 50 42 0 RECT 0,0,0 0 0 1 255,255,255 0 | 15700,15700 200200,263700
W 51 6 0 213 16 BEZIER "Transitions" | 42388,154240 42522,148478 41966,137442 42502,133556\
                                       43038,129670 44914,125650 53423,124511 61932,123372\
                                       93489,123426 109569,123158
W 52 6 0 213 24 BEZIER "Transitions" | 42699,154238 43235,140704 42636,114126 43641,106354\
                                       44646,98582 47594,94562 55902,93624 64210,92686\
                                       94494,92954 102132,93021 109770,93088 110325,93078\
                                       110459,93078
W 53 6 0 213 33 BEZIER "Transitions" | 42645,154234 43047,131722 42770,88800 43976,77142\
                                       45182,65484 49202,63876 57711,63474 66220,63072\
                                       96236,63072 103807,63072 111378,63072 111758,63165\
                                       111892,63165
W 54 6 0 213 42 BEZIER "Transitions" | 42671,154227 43609,125551 43842,70308 45115,54764\
                                       46388,39220 49604,34396 58247,33391 66890,32386\
                                       97657,35973 113335,36375
C 55 51 0 TEXT "Conditions" | 46862,121215 1 0 0 "RXBitStMachCurrState == `IDLE_BIT_ST"
C 56 52 0 TEXT "Conditions" | 48456,87658 1 0 0 "RXBitStMachCurrState == `DATA_RECEIVE_BIT_ST"
C 57 53 0 TEXT "Conditions" | 50070,58068 1 0 0 "RXBitStMachCurrState == `WAIT_RESUME_ST"
C 58 54 0 TEXT "Conditions" | 37965,30092 1 0 0 "RXBitStMachCurrState == `RESUME_END_WAIT_ST"
L 62 63 0 TEXT "State Labels" | 113723,160148 1 0 0 "WAIT_BITS\n/2/"
S 63 6 24576 ELLIPSE "States" | 113456,158815 6500 6500
W 64 6 0 9 63 BEZIER "Transitions" | 48724,183047 60291,181433 96001,163180 107568,161566
W 65 6 0 63 213 BEZIER "Transitions" | 107011,157978 95175,155961 57808,160629 45972,158612
C 66 65 0 TEXT "Conditions" | 64836,155511 1 0 0 "processRxBitsWEn == 1'b1"
W 67 6 0 219 63 BEZIER "Transitions" | 168098,86660 172418,87740 183648,91372 185943,95422\
                                       188238,99472 188778,113512 186145,122422 183513,131332\
                                       167904,143587 159264,149864 150624,156142 133542,158851\
                                       125779,159931 118017,161011 123617,159646 119837,160051
W 68 6 0 16 219 BEZIER "Transitions" | 121312,119265 131167,111435 152206,96104 162061,88274
W 69 6 0 24 219 BEZIER "Transitions" | 123174,93221 132840,90845 152243,88111 161207,86437
W 71 6 0 33 219 BEZIER "Transitions" | 124072,67490 133252,71405 152285,80632 161465,84547
W 72 6 0 42 219 BEZIER "Transitions" | 124182,41625 133497,51750 153075,73168 162390,83293
A 73 18 4 TEXT "Actions" | 114133,117894 1 0 0 "processRxByteWEn <= 1'b0;\nRXBitStMachCurrState <= `DATA_RECEIVE_BIT_ST;\nRXSameBitCount <= 4'h0;                          \nRXBitCount <= 4'h1;\noldRXBits <= RxBits;\n//zero is always the first RZ data bit of a new packet\nRXByte <= 8'h00;"
L 74 75 0 TEXT "State Labels" | 77268,176778 1 0 0 "CHK_KBIT\n/3/"
S 75 17 28672 ELLIPSE "States" | 77268,176778 6500 6500
W 76 17 4096 241 18 BEZIER "Transitions" | 152390,172884 131374,171355 101683,127861 94565,116677