;****************************************************************
; Filename:    viterbi_upck.asm
; Function:    viterbi encoder
; Version:     1.00
; Processor:   C54xx
; Description: Implements the unpacking of the G0 G1 streams
;              C-callable, simulate soft decsion.
;
; Useage:     void    viterbi_upck(int *enc,
;                                  int *g0g1,
;                                  ushort frame_sz)
;
;
; 
;  Unpack routine for encoded data
;
;  This code separates the packed encoded data into individual G0 and G1 bits
;  to allow simulation of transmission over a channel which induces errors.
;  The received data is an array of G0 and G1 bits represented as 3-bit signed
;  antipodal values (0 => 7, 1 => -7).
;
;  The routine unpacks data from the 11 fully packed data words (176 bits), 
;  alternating between G0 and G1 data.  Then it unpacks the last 13 bits
;  from each data word outside the main loop.
;
;  AR0 = 2 (index register for accessing output arrays)
;  enc_ptr = pointer to packed encoded data (input)
;  g0_ptr = pointer to unpacked encoded data (G0 array)
;  g1_ptr = pointer to unpacked encoded data (G1 array)
;  loop_counter = input buffer size (12 words)
;
;
;****************************************************************

	.mmregs

; Far-mode adjustment
; -------------------

         .if __far_mode
OFFSET   .set  2
         .else
OFFSET   .set  1
         .endif


FRAME_SZ       .set 0

REG_SAVE_SZ    .set 0

PARAM_OFFSET   .set FRAME_SZ + REG_SAVE_SZ + OFFSET 

; Register usage
; --------------
    
      .asg    0 + REG_SAVE_SZ + FRAME_SZ, RETURN_ADDR 
      .asg    0 + PARAM_OFFSET, g0
      .asg    1 + PARAM_OFFSET, frame_sz
    
	.asg    AR0, index
	.asg	AR2, enc_ptr
	.asg	AR3, g0_ptr
    	.asg    AR4, g1_ptr
	.asg	BRC, rptb_cnt
    	.asg    AR5, loop_counter
	.asg  	AR1, frame_sz

;**************************************************************************
	.global _viterbi_upck
_viterbi_upck

;
; Copy arguments to their local locations as necessary        
;----------------------------------------------------------------  
      MVDK   *sp(g0), g1_ptr    ; 2 cycles
      MVDK   *sp(g0), g0_ptr  	; 2 cycles
      MVDK   *sp(2), frame_sz   ; 2 cycles                         
      MAR    *g1_ptr+           ; 1 cycle
      MAR    *frame_sz-		; 1 cycle
      LDM    frame_sz,B
      SFTL   B,1
      ADD    B,	A	        ; A = head pointer of enc_out + (frame_sz-1)*2,       				
      STLM   A, enc_ptr		; enc_ptr point to the lastest element of enc_out	
      MAR    *frame_sz- 	; 1 cycle
      LDM    frame_sz, A	; 1 cycle

	
      STLM   A, loop_counter	; 1 cycle	; load j counter (11 full words/frame)
      STM     #2,index          ; 2 cycles  ; set index reg

UNPACK_LOOP                         	    ; do j=1,11  (n = 16*j-1)
        STM     #16-1,BRC       ; 2 cycles  ; load i counter (16 bits/word) 
        LD     *enc_ptr+,A      ; 1 cycle   ;   A = G0[n:(n-15)]
        RPTB    UPLOOP1_END-1   ; 4 cycles  ;   do i=15,0
         SFTL   A,-1            ; 1 cycle   ;     C = G0[n-i]
         LD     #7,B            ; 1 cycle   ;     B = +7
         NOP                    ; 1 cycle   ;     (2-word latency required)
         XC     2,C             ; 1 cycle   ;     if C==1
         LD     #-7,B           ; 2 cycles  ;       B = -7 (NOTE: this creates a 16-bit #)
         STL    B,*g0_ptr+0     ; 1 cycle   ;     G0[n-i] = B
UPLOOP1_END                                 ;   end do (i loop)

        STM     #16-1,BRC       ; 2 cycles  ; load i counter (16 bits/word)
        LD     *enc_ptr,A       ; 1 cycle   ;   A = G1[n:(n-15)]
        RPTB    UPLOOP2_END-1   ; 4 cycles  ;   do i=15,0
         SFTL   A,-1            ; 1 cycle   ;     C = G1[n-i]
         LD     #7,B            ; 1 cycle   ;     B = +7
         NOP                    ; 1 cycle   ;     (2-word latency required)
         XC     2,C             ; 1 cycle   ;     if C==1
         LD     #-7,B           ; 2 cycles  ;       B = -7
         STL    B,*g1_ptr+0     ; 1 cycle   ;     G1[n-i] = B
UPLOOP2_END                       	    ;   end do (i loop)

        BANZD   UNPACK_LOOP,*loop_counter-  ;2 cycles ; end do (j loop)
        MAR     *+enc_ptr(-3)   ; 2 cycles        ; set input pointer to prior G0 word

UNPACK_LAST                         
        STM     #13-1,BRC       ; 2 cycles  ; load i counter (13 bits in last word)
        LD     *enc_ptr+,A      ; 1 cycle   ;   A = G0[188:176]
        RPTB    UPLOOP3_END-1   ; 4 cycle   ;   do i=12,0
         SFTL   A,-1            ; 1 cycle   ;     C = G0[188-i]
         LD     #7,B            ; 1 cycle   ;     B = +7
         NOP                    ; 1 cycle   ;     (2-word latency required)
         XC     2,C             ; 1 cycle   ;     if C==1
          LD    #-7,B           ; 2 cycles  ;       B = -7
         STL    B,*g0_ptr+0     ; 1 cycle   ;     G0[188-i] = B
UPLOOP3_END                         ;   end do (i loop)

        STM     #13-1,BRC       ; 2 cycles  ; load i counter (13 bits in last word)
        LD     *enc_ptr,A       ; 1 cycle   ;   A = G1[188:176]
        RPTB    UPLOOP4_END-1   ; 4 cycles  ;   do i=12,0
         SFTL   A,-1            ; 1 cycle   ;     C = G1[188-i]
         LD     #7,B            ; 1 cycle   ;     B = +7
         NOP                    ; 1 cycle   ;     (2-word latency required)
         XC     2,C             ; 1 cycle   ;     if C==1
          LD    #-7,B           ; 2 cycles  ;       B = -7
         STL    B,*g1_ptr+0     ; 1 cycle   ;     G1[188-i] = B
UPLOOP4_END
;      
; Restore stack to previous value, FRAME, etc..            
;----------------------------------------------------------------

RETURN:
 

        .if __far_mode
           FRETD         ; 4 cycles
        .else
	   RET               ; 3 cycles                                  
        .endif

;END

;end of file. please do not remove. it is left here to ensure that no lines of code are removed by any editor