library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity display is
  port(
    n:in std_logic_vector(1 downto 0);
    b1_temp:in std_logic_vector(3 downto 0);
    a:in std_logic_vector(2 downto 0);
    b:out std_logic_vector(6 downto 0);
	u:in std_logic_vector(6 downto 0);
	v:in std_logic_vector(6 downto 0)
  );
end;
architecture dd of display is
begin
process(a,n,b1_temp,u,v)			
begin
  if(n="00")then					--顯示數(shù)字 
    case a is
	when"100"=>b<="1111110";
	when"101"=>b<="1111110";
	when others=>b<="0000000";
	end case;
  elsif(n="01")then					--顯示失敗 
    case a is
    when"000"=>b<="1000111";
    when"001"=>b<="1110111";
    when"010"=>b<="0110000";
    when"011"=>b<="0001110";
	when"100"=>b<=v;				
	when"101"=>b<=u;
    when others=>b<="0000000";
    end case; 
  else								
    if(b1_temp="1111")then			--顯示通過 
	  case a is
      when"000"=>b<="1100111";
      when"001"=>b<="1110111";
      when"010"=>b<="1011011";
      when"011"=>b<="1011011";
	  when"100"=>b<=v;				
	  when"101"=>b<=u;
      when others=>b<="0000000";
      end case;
    else							--計(jì)數(shù)繼續(xù)
      case a is
	  when"100"=>b<=v;
	  when"101"=>b<=u;
      when others=>b<="0000000";
	  end case;
    end if;
  end if;
end process;
end;