/*  Broadcom BCM43xx wireless driver  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,                     Stefano Brivio <st3@riseup.net>                     Michael Buesch <mbuesch@freenet.de>                     Danny van Dyk <kugelfang@gentoo.org>                     Andreas Jaggi <andreas.jaggi@waterwave.ch>  Some parts of the code in this file are derived from the ipw2200  driver  Copyright(c) 2003 - 2004 Intel Corporation.  This program is free software; you can redistribute it and/or modify  it under the terms of the GNU General Public License as published by  the Free Software Foundation; either version 2 of the License, or  (at your option) any later version.  This program is distributed in the hope that it will be useful,  but WITHOUT ANY WARRANTY; without even the implied warranty of  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the  GNU General Public License for more details.  You should have received a copy of the GNU General Public License  along with this program; see the file COPYING.  If not, write to  the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,  Boston, MA 02110-1301, USA.*/#include <linux/delay.h>#include <linux/pci.h>#include <linux/types.h>#include "bcm43xx.h"#include "bcm43xx_phy.h"#include "bcm43xx_main.h"#include "bcm43xx_radio.h"#include "bcm43xx_ilt.h"#include "bcm43xx_power.h"static const s8 bcm43xx_tssi2dbm_b_table[] = {	0x4D, 0x4C, 0x4B, 0x4A,	0x4A, 0x49, 0x48, 0x47,	0x47, 0x46, 0x45, 0x45,	0x44, 0x43, 0x42, 0x42,	0x41, 0x40, 0x3F, 0x3E,	0x3D, 0x3C, 0x3B, 0x3A,	0x39, 0x38, 0x37, 0x36,	0x35, 0x34, 0x32, 0x31,	0x30, 0x2F, 0x2D, 0x2C,	0x2B, 0x29, 0x28, 0x26,	0x25, 0x23, 0x21, 0x1F,	0x1D, 0x1A, 0x17, 0x14,	0x10, 0x0C, 0x06, 0x00,	  -7,   -7,   -7,   -7,	  -7,   -7,   -7,   -7,	  -7,   -7,   -7,   -7,};static const s8 bcm43xx_tssi2dbm_g_table[] = {	 77,  77,  77,  76,	 76,  76,  75,  75,	 74,  74,  73,  73,	 73,  72,  72,  71,	 71,  70,  70,  69,	 68,  68,  67,  67,	 66,  65,  65,  64,	 63,  63,  62,  61,	 60,  59,  58,  57,	 56,  55,  54,  53,	 52,  50,  49,  47,	 45,  43,  40,  37,	 33,  28,  22,  14,	  5,  -7, -20, -20,	-20, -20, -20, -20,	-20, -20, -20, -20,};static void bcm43xx_phy_initg(struct bcm43xx_private *bcm);static inlinevoid bcm43xx_voluntary_preempt(void){	assert(!in_atomic() && !in_irq() &&	       !in_interrupt() && !irqs_disabled());#ifndef CONFIG_PREEMPT	cond_resched();#endif /* CONFIG_PREEMPT */}void bcm43xx_raw_phy_lock(struct bcm43xx_private *bcm){	struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);	assert(irqs_disabled());	if (bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD) == 0x00000000) {		phy->is_locked = 0;		return;	}	if (bcm->current_core->rev < 3) {		bcm43xx_mac_suspend(bcm);		spin_lock(&phy->lock);	} else {		if (bcm->ieee->iw_mode != IW_MODE_MASTER)			bcm43xx_power_saving_ctl_bits(bcm, -1, 1);	}	phy->is_locked = 1;}void bcm43xx_raw_phy_unlock(struct bcm43xx_private *bcm){	struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);	assert(irqs_disabled());	if (bcm->current_core->rev < 3) {		if (phy->is_locked) {			spin_unlock(&phy->lock);			bcm43xx_mac_enable(bcm);		}	} else {		if (bcm->ieee->iw_mode != IW_MODE_MASTER)			bcm43xx_power_saving_ctl_bits(bcm, -1, -1);	}	phy->is_locked = 0;}u16 bcm43xx_phy_read(struct bcm43xx_private *bcm, u16 offset){	bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_CONTROL, offset);	return bcm43xx_read16(bcm, BCM43xx_MMIO_PHY_DATA);}void bcm43xx_phy_write(struct bcm43xx_private *bcm, u16 offset, u16 val){	bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_CONTROL, offset);	mmiowb();	bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_DATA, val);}void bcm43xx_phy_calibrate(struct bcm43xx_private *bcm){	struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);	bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD); /* Dummy read. */	if (phy->calibrated)		return;	if (phy->type == BCM43xx_PHYTYPE_G && phy->rev == 1) {		bcm43xx_wireless_core_reset(bcm, 0);		bcm43xx_phy_initg(bcm);		bcm43xx_wireless_core_reset(bcm, 1);	}	phy->calibrated = 1;}/* Connect the PHY  * http://bcm-specs.sipsolutions.net/SetPHY */int bcm43xx_phy_connect(struct bcm43xx_private *bcm, int connect){	struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);	u32 flags;	if (bcm->current_core->rev < 5)		goto out;	flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATEHIGH);	if (connect) {		if (!(flags & 0x00010000))			return -ENODEV;		flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATELOW);		flags |= (0x800 << 18);		bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, flags);	} else {		if (!(flags & 0x00020000))			return -ENODEV;		flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATELOW);		flags &= ~(0x800 << 18);		bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, flags);	}out:	phy->connected = connect;	if (connect)		dprintk(KERN_INFO PFX "PHY connected\n");	else		dprintk(KERN_INFO PFX "PHY disconnected\n");	return 0;}/* intialize B PHY power control * as described in http://bcm-specs.sipsolutions.net/InitPowerControl */static void bcm43xx_phy_init_pctl(struct bcm43xx_private *bcm){	struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);	struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);	u16 saved_batt = 0, saved_ratt = 0, saved_txctl1 = 0;	int must_reset_txpower = 0;	assert(phy->type != BCM43xx_PHYTYPE_A);	if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&	    (bcm->board_type == 0x0416))		return;	bcm43xx_phy_write(bcm, 0x0028, 0x8018);	bcm43xx_write16(bcm, 0x03E6, bcm43xx_read16(bcm, 0x03E6) & 0xFFDF);	if (phy->type == BCM43xx_PHYTYPE_G) {		if (!phy->connected)			return;		bcm43xx_phy_write(bcm, 0x047A, 0xC111);	}	if (phy->savedpctlreg != 0xFFFF)		return;	if (phy->type == BCM43xx_PHYTYPE_B &&	    phy->rev >= 2 &&	    radio->version == 0x2050) {		bcm43xx_radio_write16(bcm, 0x0076,				      bcm43xx_radio_read16(bcm, 0x0076) | 0x0084);	} else {		saved_batt = radio->baseband_atten;		saved_ratt = radio->radio_atten;		saved_txctl1 = radio->txctl1;		if ((radio->revision >= 6) && (radio->revision <= 8)		    && /*FIXME: incomplete specs for 5 < revision < 9 */ 0)			bcm43xx_radio_set_txpower_bg(bcm, 0xB, 0x1F, 0);		else			bcm43xx_radio_set_txpower_bg(bcm, 0xB, 9, 0);		must_reset_txpower = 1;	}	bcm43xx_dummy_transmission(bcm);	phy->savedpctlreg = bcm43xx_phy_read(bcm, BCM43xx_PHY_G_PCTL);	if (must_reset_txpower)		bcm43xx_radio_set_txpower_bg(bcm, saved_batt, saved_ratt, saved_txctl1);	else		bcm43xx_radio_write16(bcm, 0x0076, bcm43xx_radio_read16(bcm, 0x0076) & 0xFF7B);	bcm43xx_radio_clear_tssi(bcm);}static void bcm43xx_phy_agcsetup(struct bcm43xx_private *bcm){	struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);	u16 offset = 0x0000;	if (phy->rev == 1)		offset = 0x4C00;	bcm43xx_ilt_write(bcm, offset, 0x00FE);	bcm43xx_ilt_write(bcm, offset + 1, 0x000D);	bcm43xx_ilt_write(bcm, offset + 2, 0x0013);	bcm43xx_ilt_write(bcm, offset + 3, 0x0019);	if (phy->rev == 1) {		bcm43xx_ilt_write(bcm, 0x1800, 0x2710);		bcm43xx_ilt_write(bcm, 0x1801, 0x9B83);		bcm43xx_ilt_write(bcm, 0x1802, 0x9B83);		bcm43xx_ilt_write(bcm, 0x1803, 0x0F8D);		bcm43xx_phy_write(bcm, 0x0455, 0x0004);	}	bcm43xx_phy_write(bcm, 0x04A5, (bcm43xx_phy_read(bcm, 0x04A5) & 0x00FF) | 0x5700);	bcm43xx_phy_write(bcm, 0x041A, (bcm43xx_phy_read(bcm, 0x041A) & 0xFF80) | 0x000F);	bcm43xx_phy_write(bcm, 0x041A, (bcm43xx_phy_read(bcm, 0x041A) & 0xC07F) | 0x2B80);	bcm43xx_phy_write(bcm, 0x048C, (bcm43xx_phy_read(bcm, 0x048C) & 0xF0FF) | 0x0300);	bcm43xx_radio_write16(bcm, 0x007A, bcm43xx_radio_read16(bcm, 0x007A) | 0x0008);	bcm43xx_phy_write(bcm, 0x04A0, (bcm43xx_phy_read(bcm, 0x04A0) & 0xFFF0) | 0x0008);	bcm43xx_phy_write(bcm, 0x04A1, (bcm43xx_phy_read(bcm, 0x04A1) & 0xF0FF) | 0x0600);	bcm43xx_phy_write(bcm, 0x04A2, (bcm43xx_phy_read(bcm, 0x04A2) & 0xF0FF) | 0x0700);	bcm43xx_phy_write(bcm, 0x04A0, (bcm43xx_phy_read(bcm, 0x04A0) & 0xF0FF) | 0x0100);	if (phy->rev == 1)		bcm43xx_phy_write(bcm, 0x04A2, (bcm43xx_phy_read(bcm, 0x04A2) & 0xFFF0) | 0x0007);	bcm43xx_phy_write(bcm, 0x0488, (bcm43xx_phy_read(bcm, 0x0488) & 0xFF00) | 0x001C);	bcm43xx_phy_write(bcm, 0x0488, (bcm43xx_phy_read(bcm, 0x0488) & 0xC0FF) | 0x0200);	bcm43xx_phy_write(bcm, 0x0496, (bcm43xx_phy_read(bcm, 0x0496) & 0xFF00) | 0x001C);	bcm43xx_phy_write(bcm, 0x0489, (bcm43xx_phy_read(bcm, 0x0489) & 0xFF00) | 0x0020);	bcm43xx_phy_write(bcm, 0x0489, (bcm43xx_phy_read(bcm, 0x0489) & 0xC0FF) | 0x0200);	bcm43xx_phy_write(bcm, 0x0482, (bcm43xx_phy_read(bcm, 0x0482) & 0xFF00) | 0x002E);	bcm43xx_phy_write(bcm, 0x0496, (bcm43xx_phy_read(bcm, 0x0496) & 0x00FF) | 0x1A00);	bcm43xx_phy_write(bcm, 0x0481, (bcm43xx_phy_read(bcm, 0x0481) & 0xFF00) | 0x0028);	bcm43xx_phy_write(bcm, 0x0481, (bcm43xx_phy_read(bcm, 0x0481) & 0x00FF) | 0x2C00);	if (phy->rev == 1) {		bcm43xx_phy_write(bcm, 0x0430, 0x092B);		bcm43xx_phy_write(bcm, 0x041B, (bcm43xx_phy_read(bcm, 0x041B) & 0xFFE1) | 0x0002);	} else {		bcm43xx_phy_write(bcm, 0x041B, bcm43xx_phy_read(bcm, 0x041B) & 0xFFE1);		bcm43xx_phy_write(bcm, 0x041F, 0x287A);		bcm43xx_phy_write(bcm, 0x0420, (bcm43xx_phy_read(bcm, 0x0420) & 0xFFF0) | 0x0004);	}	if (phy->rev > 2) {		bcm43xx_phy_write(bcm, 0x0422, 0x287A);		bcm43xx_phy_write(bcm, 0x0420, (bcm43xx_phy_read(bcm, 0x0420) & 0x0FFF) | 0x3000); 	}			bcm43xx_phy_write(bcm, 0x04A8, (bcm43xx_phy_read(bcm, 0x04A8) & 0x8080) | 0x7874);	bcm43xx_phy_write(bcm, 0x048E, 0x1C00);	if (phy->rev == 1) {		bcm43xx_phy_write(bcm, 0x04AB, (bcm43xx_phy_read(bcm, 0x04AB) & 0xF0FF) | 0x0600);		bcm43xx_phy_write(bcm, 0x048B, 0x005E);		bcm43xx_phy_write(bcm, 0x048C, (bcm43xx_phy_read(bcm, 0x048C) & 0xFF00) | 0x001E);		bcm43xx_phy_write(bcm, 0x048D, 0x0002);	}	bcm43xx_ilt_write(bcm, offset + 0x0800, 0);	bcm43xx_ilt_write(bcm, offset + 0x0801, 7);	bcm43xx_ilt_write(bcm, offset + 0x0802, 16);	bcm43xx_ilt_write(bcm, offset + 0x0803, 28);	if (phy->rev >= 6) {		bcm43xx_phy_write(bcm, 0x0426, (bcm43xx_phy_read(bcm, 0x0426)				  & 0xFFFC));		bcm43xx_phy_write(bcm, 0x0426, (bcm43xx_phy_read(bcm, 0x0426)				  & 0xEFFF));	}}static void bcm43xx_phy_setupg(struct bcm43xx_private *bcm){	struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);	u16 i;	assert(phy->type == BCM43xx_PHYTYPE_G);	if (phy->rev == 1) {		bcm43xx_phy_write(bcm, 0x0406, 0x4F19);		bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,				  (bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0xFC3F) | 0x0340);		bcm43xx_phy_write(bcm, 0x042C, 0x005A);		bcm43xx_phy_write(bcm, 0x0427, 0x001A);		for (i = 0; i < BCM43xx_ILT_FINEFREQG_SIZE; i++)			bcm43xx_ilt_write(bcm, 0x5800 + i, bcm43xx_ilt_finefreqg[i]);		for (i = 0; i < BCM43xx_ILT_NOISEG1_SIZE; i++)			bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noiseg1[i]);		for (i = 0; i < BCM43xx_ILT_ROTOR_SIZE; i++)			bcm43xx_ilt_write32(bcm, 0x2000 + i, bcm43xx_ilt_rotor[i]);	} else {		/* nrssi values are signed 6-bit values. Not sure why we write 0x7654 here... */		bcm43xx_nrssi_hw_write(bcm, 0xBA98, (s16)0x7654);		if (phy->rev == 2) {			bcm43xx_phy_write(bcm, 0x04C0, 0x1861);			bcm43xx_phy_write(bcm, 0x04C1, 0x0271);		} else if (phy->rev > 2) {			bcm43xx_phy_write(bcm, 0x04C0, 0x0098);			bcm43xx_phy_write(bcm, 0x04C1, 0x0070);			bcm43xx_phy_write(bcm, 0x04C9, 0x0080);		}		bcm43xx_phy_write(bcm, 0x042B, bcm43xx_phy_read(bcm, 0x042B) | 0x800);		for (i = 0; i < 64; i++)			bcm43xx_ilt_write(bcm, 0x4000 + i, i);		for (i = 0; i < BCM43xx_ILT_NOISEG2_SIZE; i++)			bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noiseg2[i]);	}		if (phy->rev <= 2)		for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)			bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg1[i]);	else if ((phy->rev >= 7) && (bcm43xx_phy_read(bcm, 0x0449) & 0x0200))		for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)			bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg3[i]);	else		for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)			bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg2[i]);		if (phy->rev == 2)		for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)			bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr1[i]);	else if ((phy->rev > 2) && (phy->rev <= 8))		for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)			bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr2[i]);		if (phy->rev == 1) {		for (i = 0; i < BCM43xx_ILT_RETARD_SIZE; i++)			bcm43xx_ilt_write32(bcm, 0x2400 + i, bcm43xx_ilt_retard[i]);		for (i = 0; i < 4; i++) {			bcm43xx_ilt_write(bcm, 0x5404 + i, 0x0020);			bcm43xx_ilt_write(bcm, 0x5408 + i, 0x0020);			bcm43xx_ilt_write(bcm, 0x540C + i, 0x0020);			bcm43xx_ilt_write(bcm, 0x5410 + i, 0x0020);		}		bcm43xx_phy_agcsetup(bcm);		if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&		    (bcm->board_type == 0x0416) &&		    (bcm->board_revision == 0x0017))			return;		bcm43xx_ilt_write(bcm, 0x5001, 0x0002);		bcm43xx_ilt_write(bcm, 0x5002, 0x0001);	} else {		for (i = 0; i <= 0x2F; i++)			bcm43xx_ilt_write(bcm, 0x1000 + i, 0x0820);		bcm43xx_phy_agcsetup(bcm);		bcm43xx_phy_read(bcm, 0x0400); /* dummy read */		bcm43xx_phy_write(bcm, 0x0403, 0x1000);		bcm43xx_ilt_write(bcm, 0x3C02, 0x000F);		bcm43xx_ilt_write(bcm, 0x3C03, 0x0014);		if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&		    (bcm->board_type == 0x0416) &&		    (bcm->board_revision == 0x0017))			return;		bcm43xx_ilt_write(bcm, 0x0401, 0x0002);		bcm43xx_ilt_write(bcm, 0x0402, 0x0001);	}}/* Initialize the noisescaletable for APHY */static void bcm43xx_phy_init_noisescaletbl(struct bcm43xx_private *bcm){	struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);