/******************** (C) COPYRIGHT 2007 STMicroelectronics ********************
* File Name          : stm32f10x_tim.c
* Author             : MCD Application Team
* Date First Issued  : 09/29/2006
* Description        : This file provides all the TIM firmware functions.
********************************************************************************
* History:
* 04/02/2007: V0.2
* 02/05/2007: V0.1
* 09/29/2006: V0.01
********************************************************************************
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/

/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_tim.h"
#include "stm32f10x_rcc.h"

/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* ---------------------- TIM registers bit mask ------------------------ */
#define CR1_CEN_Set                 ((u16)0x0001)
#define CR1_CEN_Reset               ((u16)0x03FE)
#define CR1_UDIS_Set                ((u16)0x0002)
#define CR1_UDIS_Reset              ((u16)0x03FD)
#define CR1_URS_Set                 ((u16)0x0004)
#define CR1_URS_Reset               ((u16)0x03FB)
#define CR1_OPM_Mask                ((u16)0x03F7)
#define CR1_CounterMode_Mask        ((u16)0x039F)
#define CR1_ARPE_Set                ((u16)0x0080)
#define CR1_ARPE_Reset              ((u16)0x037F)
#define CR1_CKD_Mask                ((u16)0x00FF)

#define CR2_CCDS_Set                ((u16)0x0008)
#define CR2_CCDS_Reset              ((u16)0x0007)
#define CR2_MMS_Mask                ((u16)0x0080)
#define CR2_TI1S_Set                ((u16)0x0080)
#define CR2_TI1S_Reset              ((u16)0xFF70)

#define SMCR_SMS_Mask               ((u16)0xFFF0)
#define SMCR_ETR_Mask               ((u16)0x00F7)
#define SMCR_TS_Mask                ((u16)0xFF87)
#define SMCR_MSM_Mask               ((u16)0xFF77)
#define SMCR_ECE_Set                ((u16)0x4000)

#define CCMR_CC13S_Mask             ((u16)0x7F7C)
#define CCMR_CC24S_Mask             ((u16)0x7C7F)
#define CCMR_TI13Direct_Set         ((u16)0x0001)
#define CCMR_TI24Direct_Set         ((u16)0x0100)
#define CCMR_OC13FE_Mask            ((u16)0x7F7B)
#define CCMR_OC24FE_Mask            ((u16)0x7B7F)
#define CCMR_OC13PE_Mask            ((u16)0x7F77)
#define CCMR_OC24PE_Mask            ((u16)0x777F)
#define CCMR_OCM13_Mask             ((u16)0x7F0F)
#define CCMR_OCM24_Mask             ((u16)0x0F7F)
#define CCMR_IC13PSC_Mask           ((u16)0xFFF3)
#define CCMR_IC24PSC_Mask           ((u16)0xF3FF)
#define CCMR_IC13F_Mask             ((u16)0xFF0F)
#define CCMR_IC24F_Mask             ((u16)0x0FFF)
#define CCER_CC1P_Mask              ((u16)0xFFFD)

#define CCER_CC2P_Mask              ((u16)0xFFDF)
#define CCER_CC3P_Mask              ((u16)0xFDFF)
#define CCER_CC4P_Mask              ((u16)0xDFFF)

#define CCRE_CC1E_Set               ((u16)0x0001)
#define CCRE_CC1E_Reset             ((u16)0xFFFE)
#define CCRE_CC1E_Mask              ((u16)0xFFFE)

#define CCRE_CC2E_Set               ((u16)0x0010)
#define CCRE_CC2E_Reset             ((u16)0xFFEF)
#define CCRE_CC2E_Mask              ((u16)0xFFEF)

#define CCRE_CC3E_Set               ((u16)0x0100)
#define CCRE_CC3E_Reset             ((u16)0xFEFF)

#define CCRE_CC4E_Set               ((u16)0x1000)
#define CCRE_CC4E_Reset             ((u16)0xEFFF)
#define CCRE_CC4E_Mask              ((u16)0xEFFF)

#define DCR_DMA_Mask                ((u16)0x0000)

/* TIM private Masks */
#define TIM_Period_Reset_Mask       ((u16)0x0000)
#define TIM_Prescaler_Reset_Mask    ((u16)0x0000)
#define TIM_Pulse_Reset_Mask        ((u16)0x0000)
#define TIM_ICFilter_Mask           ((u8)0x00)

/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
static uc16 Tab_OCModeMask[4] = {0xFF00, 0x00FF, 0xFF00, 0x00FF};
static uc16 Tab_PolarityMask[4] = {CCER_CC1P_Mask, CCER_CC2P_Mask, CCER_CC3P_Mask, CCER_CC4P_Mask};

/* Private function prototypes -----------------------------------------------*/
static void PWMI_Config(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);
static void TI1_Config(TIM_TypeDef* TIMx, u16 TIM_ICPolarity, u16 TIM_ICSelection,
                       u8 TIM_ICFilter);
static void TI2_Config(TIM_TypeDef* TIMx, u16 TIM_ICPolarity, u16 TIM_ICSelection,
                       u8 TIM_ICFilter);
static void TI3_Config(TIM_TypeDef* TIMx, u16 TIM_ICPolarity, u16 TIM_ICSelection,
                       u8 TIM_ICFilter);
static void TI4_Config(TIM_TypeDef* TIMx, u16 TIM_ICPolarity, u16 TIM_ICSelection,
                       u8 TIM_ICFilter);
static void ETR_Config(TIM_TypeDef* TIMx, u16 TIM_ExtTRGPrescaler, 
                       u16 TIM_ExtTRGPolarity, u8 ExtTRGFilter);
/* Private functions ---------------------------------------------------------*/

/*******************************************************************************
* Function Name  : TIM_DeInit
* Description    : Deinitializes the TIMx peripheral registers to their default
*                  reset values.
* Input          : - TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
* Output         : None
* Return         : None
*******************************************************************************/
void TIM_DeInit(TIM_TypeDef* TIMx)
{  
  switch (*(u32*)&TIMx)
  {
    case TIM2_BASE:
      RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, ENABLE);
      RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, DISABLE);
      break;
 
    case TIM3_BASE:
      RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, ENABLE);
      RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, DISABLE);
      break;
 
    case TIM4_BASE:
      RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, ENABLE);
      RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, DISABLE);
      break;
 
    default:
      break;
  }
}

/*******************************************************************************
* Function Name  : TIM_TimeBaseInit
* Description    : Initializes the TIMx Time Base Unit peripheral according to 
*                  the specified parameters in the TIM_TimeBaseInitStruct.
* Input          : - TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
*                  - TIM_TimeBaseInitStruct: pointer to a TIM_TimeBaseInitTypeDef
*                   structure that contains the configuration information for
*                   the specified TIM peripheral.
* Output         : None
* Return         : None
*******************************************************************************/
void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct)
{
  /* Check the parameters */
  assert(IS_TIM_COUNTER_MODE(TIM_TimeBaseInitStruct->TIM_CounterMode));
  assert(IS_TIM_CKD_DIV(TIM_TimeBaseInitStruct->TIM_ClockDivision));
  
  /* Set the Autoreload value */
  TIMx->ARR = TIM_TimeBaseInitStruct->TIM_Period ;

  /* Set the Prescaler value */
  TIMx->PSC = TIM_TimeBaseInitStruct->TIM_Prescaler;

  /* Select the Counter Mode and set the clock division */
  TIMx->CR1 &= CR1_CKD_Mask & CR1_CounterMode_Mask;
  TIMx->CR1 |= (u32)TIM_TimeBaseInitStruct->TIM_ClockDivision |
               TIM_TimeBaseInitStruct->TIM_CounterMode;
}
/*******************************************************************************
* Function Name  : TIM_OCInit
* Description    : Initializes the TIMx peripheral according to the specified
*                  parameters in the TIM_OCInitStruct.
* Input          : - TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
*                  - TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure
*                    that contains the configuration information for the specified
*                    TIM peripheral.
* Output         : None
* Return         : None
*******************************************************************************/
void TIM_OCInit(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
{
  u32 tmpccmrx = 0, tmpccer = 0;
  
  /* Check the parameters */
  assert(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode));
  assert(IS_TIM_CHANNEL(TIM_OCInitStruct->TIM_Channel));
  assert(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity));

  tmpccer = TIMx->CCER;

  if ((TIM_OCInitStruct->TIM_Channel == (u16)TIM_Channel_1) ||
      (TIM_OCInitStruct->TIM_Channel == (u16)TIM_Channel_2))
  {
    tmpccmrx = TIMx->CCMR1;
    
    /* Reset the Output Compare Bits */
    tmpccmrx &= Tab_OCModeMask[TIM_OCInitStruct->TIM_Channel];

    /* Set the Output Polarity level */
    tmpccer &= Tab_PolarityMask[TIM_OCInitStruct->TIM_Channel];

    if (TIM_OCInitStruct->TIM_Channel == TIM_Channel_1)
    {
      /* Disable the Channel 1: Reset the CCE Bit */
      TIMx->CCER &= CCRE_CC1E_Reset;

      /* Select the Output Compare Mode */
      tmpccmrx |= TIM_OCInitStruct->TIM_OCMode;

      /* Set the Capture Compare Register value */
      TIMx->CCR1 = TIM_OCInitStruct->TIM_Pulse;

      /* Set the Capture Compare Enable Bit */
      tmpccer |= CCRE_CC1E_Set;

      /* Set the Capture Compare Polarity */
      tmpccer |= TIM_OCInitStruct->TIM_OCPolarity;
    }
    else /* TIM_Channel_2 */
    {
      /* Disable the Channel 2: Reset the CCE Bit */
      TIMx->CCER &= CCRE_CC2E_Reset;

      /* Select the Output Compare Mode */
      tmpccmrx |= (u32)TIM_OCInitStruct->TIM_OCMode << 8;

      /* Set the Capture Compare Register value */
      TIMx->CCR2 = TIM_OCInitStruct->TIM_Pulse;

      /* Set the Capture Compare Enable Bit */
      tmpccer |= CCRE_CC2E_Set;

      /* Set the Capture Compare Polarity */
      tmpccer |= (u32)TIM_OCInitStruct->TIM_OCPolarity << 4;
    }

    TIMx->CCMR1 = (u16)tmpccmrx;
  }
  else 
  {
    if ((TIM_OCInitStruct->TIM_Channel == TIM_Channel_3) ||
        (TIM_OCInitStruct->TIM_Channel == TIM_Channel_4))
    { 
      tmpccmrx = TIMx->CCMR2;

      /* Reset the Output Compare Bits */
      tmpccmrx &= Tab_OCModeMask[TIM_OCInitStruct->TIM_Channel];

      /* Set the Output Polarity level */
      tmpccer &= Tab_PolarityMask[TIM_OCInitStruct->TIM_Channel];

      if (TIM_OCInitStruct->TIM_Channel == TIM_Channel_3)
      {
        /* Disable the Channel 3: Reset the CCE Bit */
        TIMx->CCER &= CCRE_CC3E_Reset;

        /* Select the Output Compare Mode */
        tmpccmrx |= TIM_OCInitStruct->TIM_OCMode;

        /* Set the Capture Compare Register value */
        TIMx->CCR3 = TIM_OCInitStruct->TIM_Pulse;

        /* Set the Capture Compare Enable Bit */
        tmpccer |= CCRE_CC3E_Set;

        /* Set the Capture Compare Polarity */
        tmpccer |= (u32)TIM_OCInitStruct->TIM_OCPolarity << 8;
      }
      else  /* TIM_Channel_4 */
      {
        /* Disable the Channel 4: Reset the CCE Bit */
        TIMx->CCER &= CCRE_CC4E_Reset;

       /* Select the Output Compare Mode */
        tmpccmrx |= (u32)TIM_OCInitStruct->TIM_OCMode << 8;

        /* Set the Capture Compare Register value */
        TIMx->CCR4 = TIM_OCInitStruct->TIM_Pulse;

        /* Set the Capture Compare Enable Bit */
        tmpccer |= CCRE_CC4E_Set;

        /* Set the Capture Compare Polarity */
        tmpccer |= (u32)TIM_OCInitStruct->TIM_OCPolarity << 12;
      }

      TIMx->CCMR2 = (u16)tmpccmrx;
    }
  }
  
  TIMx->CCER = (u16)tmpccer;
}

/*******************************************************************************
* Function Name  : TIM_ICInit
* Description    : Initializes the TIMx peripheral according to the specified
*                  parameters in the TIM_ICInitStruct.
* Input          : - TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
*                  - TIM_ICInitStruct: pointer to a TIM_ICInitTypeDef structure
*                    that contains the configuration information for the specified
*                    TIM peripheral.
* Output         : None
* Return         : None
*******************************************************************************/
void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct)
{
  /* Check the parameters */
  assert(IS_TIM_IC_MODE(TIM_ICInitStruct->TIM_ICMode));
  assert(IS_TIM_CHANNEL(TIM_ICInitStruct->TIM_Channel));
  assert(IS_TIM_IC_POLARITY(TIM_ICInitStruct->TIM_ICPolarity));
  assert(IS_TIM_IC_SELECTION(TIM_ICInitStruct->TIM_ICSelection));
  assert(IS_TIM_IC_PRESCALER(TIM_ICInitStruct->TIM_ICPrescaler));
  assert(IS_TIM_IC_FILTER(TIM_ICInitStruct->TIM_ICFilter));
  
  if (TIM_ICInitStruct->TIM_ICMode == TIM_ICMode_ICAP)
  {
    if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_1)
    {
      /* TI1 Configuration */
      TI1_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
                 TIM_ICInitStruct->TIM_ICSelection,
                 TIM_ICInitStruct->TIM_ICFilter);

      /* Set the Input Capture Prescaler value */
      TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
    }
    else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_2)