?? asy_generator.mdl
字號:
DstBlock "Product1"
DstPort 1
}
}
Branch {
Labels [-1, 1]
Points [160, 0; 0, 65]
DstBlock "Mux2"
DstPort 2
}
}
Line {
Name "sin(wt)"
FontSize 10
SrcBlock "Demux"
SrcPort 1
Points [85, 0]
Branch {
Points [0, 105]
Branch {
DstBlock "Product"
DstPort 1
}
Branch {
Points [0, 145]
Branch {
DstBlock "Product2"
DstPort 1
}
Branch {
Points [0, 40; 140, 0]
DstBlock "Sum2"
DstPort 2
}
}
}
Branch {
Labels [-1, 1]
Points [185, 0; 0, 50]
DstBlock "Mux2"
DstPort 1
}
}
Line {
SrcBlock "Product"
SrcPort 1
DstBlock "Sum"
DstPort 1
}
Line {
SrcBlock "Product1"
SrcPort 1
Points [-5, 0]
DstBlock "Sum"
DstPort 2
}
Line {
SrcBlock "Product3"
SrcPort 1
DstBlock "Sum1"
DstPort 1
}
Line {
SrcBlock "Product2"
SrcPort 1
DstBlock "Sum1"
DstPort 2
}
Line {
Name "cos(wt+2pi/3)"
FontSize 10
Labels [3, 0]
SrcBlock "Sum3"
SrcPort 1
Points [15, 0; 0, -65]
DstBlock "Mux2"
DstPort 6
}
Line {
Name "sin(wt+2pi/3)"
FontSize 10
Labels [-1, 1]
SrcBlock "Sum2"
SrcPort 1
DstBlock "Mux2"
DstPort 5
}
Line {
SrcBlock "K1"
SrcPort 1
Points [45, 0]
Branch {
DstBlock "Product"
DstPort 2
}
Branch {
Points [0, 105]
DstBlock "Product3"
DstPort 2
}
}
Line {
SrcBlock "K2"
SrcPort 1
Points [20, 0]
Branch {
DstBlock "Product1"
DstPort 2
}
Branch {
Points [0, 105]
DstBlock "Product2"
DstPort 2
}
}
Line {
Name "sin(wt-2pi/3)"
FontSize 10
SrcBlock "Sum"
SrcPort 1
Points [40, 0]
Branch {
Labels [-1, 1]
DstBlock "Mux2"
DstPort 3
}
Branch {
DstBlock "Sum2"
DstPort 1
}
}
Line {
Name "cos(wt-2pi/3)"
FontSize 10
SrcBlock "Sum1"
SrcPort 1
Points [20, 0]
Branch {
Labels [-1, 1]
Points [0, -65]
DstBlock "Mux2"
DstPort 4
}
Branch {
Points [0, 70]
DstBlock "Sum3"
DstPort 1
}
}
Line {
SrcBlock "Mux"
SrcPort 1
Points [15, 0]
Branch {
Points [0, 50]
DstBlock "Fcn5"
DstPort 1
}
Branch {
Points [0, -45]
DstBlock "Fcn2"
DstPort 1
}
Branch {
DstBlock "Fcn4"
DstPort 1
}
}
Line {
SrcBlock "Mux1"
SrcPort 1
DstBlock "abc"
DstPort 1
}
Line {
Name "Va"
FontSize 10
Labels [1, 1]
SrcBlock "Fcn2"
SrcPort 1
Points [25, 0; 0, 10]
DstBlock "Mux1"
DstPort 1
}
Line {
Name "Vc"
Labels [0, 0]
SrcBlock "Fcn5"
SrcPort 1
Points [15, 0; 0, -15]
DstBlock "Mux1"
DstPort 3
}
Annotation {
Name "Vc= Vd*sin(wt+2pi/3) + Vq*cos(wt+2pi/3) "
" + Vo"
Position [633, 330]
FontSize 12
}
Annotation {
Name "Vb= Vd*sin(wt-2pi/3) + Vq*cos(wt-2pi/3) "
" + Vo"
Position [628, 305]
FontSize 12
}
Annotation {
Name "Va= Vd*sinwt + Vq*cos(wt) + Vo"
Position [593, 280]
FontSize 12
}
Annotation {
Position [638, 365]
FontSize 12
}
Annotation {
Position [633, 340]
FontSize 12
}
Annotation {
Position [189, 268]
}
Annotation {
Position [199, 238]
}
Annotation {
Position [194, 353]
}
Annotation {
Position [598, 315]
FontSize 12
}
}
}
Block {
BlockType Outport
Name "A"
Position [560, 325, 580, 340]
Orientation "down"
NamePlacement "alternate"
}
Block {
BlockType Outport
Name "B"
Position [601, 325, 619, 340]
Orientation "down"
NamePlacement "alternate"
Port "2"
}
Block {
BlockType Outport
Name "C"
Position [639, 325, 661, 340]
Orientation "down"
NamePlacement "alternate"
Port "3"
}
Line {
SrcBlock "w"
SrcPort 1
DstBlock "Mux"
DstPort 7
}
Line {
SrcBlock "abc_to_dq0\nTransformation1"
SrcPort 1
Points [5, 0; 0, -120]
Branch {
Points [0, -20]
DstBlock "Selector4"
DstPort 1
}
Branch {
DstBlock "Selector5"
DstPort 1
}
}
Line {
SrcBlock "Discrete\nVirtual PLL"
SrcPort 2
Points [5, 0]
DstBlock "dq0_to_abc\nTranformation"
DstPort 2
}
Line {
SrcBlock "Ground (output)3"
SrcPort 1
DstBlock "Voltage Measurement2"
DstPort 2
}
Line {
SrcBlock "Ground (output)2"
SrcPort 1
DstBlock "Voltage Measurement1"
DstPort 2
}
Line {
SrcBlock "Ground (output)"
SrcPort 1
DstPort 2
}
Line {
SrcBlock "Controlled Current Source2"
SrcPort 2
Points [0, 0; 140, 0]
Branch {
DstBlock "Voltage Measurement2"
DstPort 1
}
Branch {
DstBlock "C"
DstPort 1
}
}
Line {
SrcBlock "Controlled Current Source1"
SrcPort 2
Points [100, 0]
Branch {
DstBlock "Voltage Measurement1"
DstPort 1
}
Branch {
DstBlock "B"
DstPort 1
}
}
Line {
SrcBlock "Controlled Current Source"
SrcPort 2
Points [0, 0; 60, 0]
Branch {
DstBlock "Voltage Measurement"
DstPort 1
}
Branch {
DstBlock "A"
DstPort 1
}
}
Line {
SrcBlock "Discrete\nVirtual PLL1"
SrcPort 2
DstBlock "abc_to_dq0\nTransformation1"
DstPort 2
}
Line {
SrcBlock "Voltage Measurement2"
SrcPort 1
Points [5, 0]
DstBlock "Mux2"
DstPort 3
}
Line {
SrcBlock "Controlled Current Source1"
SrcPort 1
Points [30, 0]
DstBlock "Bus Bar (vert)1"
DstPort 2
}
Line {
SrcBlock "Controlled Current Source"
SrcPort 1
Points [45, 0]
DstBlock "Bus Bar (vert)1"
DstPort 3
}
Line {
SrcBlock "Controlled Current Source2"
SrcPort 1
Points [15, 0]
DstBlock "Bus Bar (vert)1"
DstPort 1
}
Line {
SrcBlock "Bus Bar (vert)1"
SrcPort 1
DstBlock "Ground (input)"
DstPort 1
}
Line {
SrcBlock "Demux1"
SrcPort 3
DstBlock "Controlled Current Source2"
DstPort 1
}
Line {
SrcBlock "Demux1"
SrcPort 2
DstBlock "Controlled Current Source1"
DstPort 1
}
Line {
SrcBlock "Demux1"
SrcPort 1
DstBlock "Controlled Current Source"
DstPort 1
}
Line {
SrcBlock "Mux2"
SrcPort 1
DstBlock "abc_to_dq0\nTransformation1"
DstPort 1
}
Line {
SrcBlock "Voltage Measurement1"
SrcPort 1
DstBlock "Mux2"
DstPort 2
}
Line {
SrcBlock "Voltage Measurement"
SrcPort 1
Points [75, 0]
DstBlock "Mux2"
DstPort 1
}
Line {
SrcBlock "dq0_to_abc\nTranformation"
SrcPort 1
DstBlock "Demux1"
DstPort 1
}
Line {
SrcBlock "Selector5"
SrcPort 1
Points [-245, 0; 0, 130]
DstBlock "Mux"
DstPort 6
}
Line {
SrcBlock "Selector4"
SrcPort 1
Points [-350, 0; 0, 130]
DstBlock "Mux"
DstPort 5
}
Line {
SrcBlock "Demux"
SrcPort 4
Points [15, 0; 0, 45; -175, 0; 0, -80]
DstBlock "Mux"
DstPort 4
}
Line {
SrcBlock "Demux"
SrcPort 3
Points [5, 0; 0, 60; -155, 0]
DstBlock "Mux"
DstPort 3
}
Line {
SrcBlock "Mux1"
SrcPort 1
DstBlock "dq0_to_abc\nTranformation"
DstPort 1
}
Line {
SrcBlock "Constant"
SrcPort 1
DstBlock "Mux1"
DstPort 3
}
Line {
SrcBlock "Demux"
SrcPort 2
Points [0, 0; 15, 0]
Branch {
DstBlock "Mux1"
DstPort 2
}
Branch {
Points [0, -65; -175, 0; 0, 40]
DstBlock "Mux"
DstPort 2
}
}
Line {
SrcBlock "Demux"
SrcPort 1
Points [0, 0; 5, 0]
Branch {
DstBlock "Mux1"
DstPort 1
}
Branch {
Points [0, -30; -155, 0]
DstBlock "Mux"
DstPort 1
}
}
Line {
SrcBlock "Mux"
SrcPort 1
DstBlock "MATLAB Fcn"
DstPort 1
Line {
SrcBlock "Integrator"
SrcPort 1
DstBlock "Demux"
DstPort 1
}
Line {
SrcBlock "MATLAB Fcn"
SrcPort 1
DstBlock "Integrator"
DstPort 1
}
Line {
SrcBlock "Discrete\nVirtual PLL"
SrcPort 1
DstBlock "Terminator"
DstPort 1
}
Line {
SrcBlock "Discrete\nVirtual PLL"
SrcPort 3
DstBlock "Terminator1"
DstPort 1
}
Line {
SrcBlock "Discrete\nVirtual PLL1"
SrcPort 1
DstBlock "Terminator2"
DstPort 1
}
Line {
SrcBlock "Discrete\nVirtual PLL1"
SrcPort 3
DstBlock "Terminator3"
DstPort 1
}
}
}
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