// fiq.c
/********************************************************************/
/*                                                                  */
/*      FIQ ISR                                                     */
/*                                                                  */
/********************************************************************/


#include "ioADuC7026.h"
#include "common.h"
unsigned char ucTxCnt = 0;
unsigned char ucRxCnt =0;
unsigned char ucEmptyCnt = 0;
unsigned char ucStopCnt =0;
unsigned char ucTestExtraRead = 0;
unsigned int status  =0;
unsigned char ucRepeatedStartCnt = 0;
extern unsigned char ucTxIntPending;
void delay(int);

void delay (int length)
{
	while (length >0)
    	length--;
}

__irq __arm void irq_handler()			// example with two IRQs
{

    static BYTE byte_addr0 = 0x00;
    static BYTE byte_addr2 = 0x00;
    //unsigned int status = I2CSSTA;

	 status = I2C0SSTA;
 //   GP4SET = 0x00040000;

   // ***** Slave TX *****
   if((status & 0x0004) == 0x0004){                    // slave transmitter interrupt?
	//	GP4SET = 0x00040000;
	   /*
        if((status&0x1800)==0)
		{                         // ID decode bit is 00?
       	    I2C0STX = A0h[byte_addr0];                   // set TX data
			byte_addr0++;                               // increment byte address
       	    I2C0STX = A0h[byte_addr0];                   // set TX data
			ucTxIntPending = 1;
			
        }
        else
		{
       	    I2C0STX = A2h[byte_addr2];                   // set TX data
       	    byte_addr2++;                               // increment byte address
       	    I2C0STX = A2h[byte_addr2];                   // set TX data
			ucTxIntPending = 1;
        } */
		ucTxCnt++;
	//	GP4CLR = 0x00040000;
    }

    //***** Slave RX *****
    if((status & 0x0008) == 0x0008)
	{                    // slave receiver interrupt
                       	  // first slave-receiver INT?
       //    	GP4SET = 0x00040000;
			I2C0STX = 0x99;
			I2C0FSTA |= 0x100;
		    byte_addr0 = I2C0SRX;	  // get byte address
			I2C0STX = A0h[byte_addr0];
			byte_addr0++;
            i2c_first = FALSE;
			/*
			I2C0CFG|=0x0800;	// Clock Stretch Enable
			delay(100);			// Replace with your Parser routine
			I2C0CFG&=0xF7FF;	// Clock Stretch Disable - Place this at the end of your parser routine
			*/
		//	GP4CLR = 0x00040000;

				
    }
	// Repeated Start Condition detect
	if((status & 0x2000) == 0x2000)		// Check bit 13
	{
//		GP4SET = 0x00040000;
		ucRepeatedStartCnt++;
//		I2C0CFG|=0x0800;	// Clock Stretch Enable
//		delay(100);			// Replace with your Parser routine
//		I2C0CFG&=0xF7FF;	// Clock Stretch Disable - Place this at the end of your parser routine
//		GP4CLR = 0x00040000;
		i2c_first = TRUE;
	}
    /// Stop Condition *****
    if((status & 0x0400) == 0x0400)
	{                   // STOP detect
	    GP4SET = 0x00040000;
		i2c_first = TRUE;
        if(I2C0CFG == 0x4001)
		{
       //     if((status&0x1800)==0)byte_addr0--;       // decrement byte address
       //     else byte_addr2--;
				
        }
	
		ucStopCnt++;
		ucTxIntPending = 0;
		GP4CLR = 0x00040000;			
    }
		//Slave Tx FIFO Empty
   	if((status & 0x0001) == 0x0001)//&& (ucTxIntPending == 0))
	{                    // slave receiver intterupt		 	
	//	GP4SET = 0x00040000;
		if((status&0x1800)==0)
		{                         // ID decode bit is 00?
       	    I2C0STX = A0h[byte_addr0];                   // set TX data
       	    byte_addr0++;                               // increment byte address
   //    	    I2C0STX = A0h[byte_addr0];                   // set TX data
        }
        else
		{
       	    I2C0STX = A2h[byte_addr2];                   // set TX data
       	    byte_addr2++;                               // increment byte address
    //   	    I2C0STX = A2h[byte_addr2];                   // set TX data
        } 	
	//	GP4CLR = 0x00040000;
    }
 	if ((status & 0x20) == 0x20)
	{
	 	I2C0CFG &= 0xFFFE;	   // Switch slave off/on
		I2C0CFG |= 0x0001;
		ucTxIntPending = 0;	
	}
//	GP4CLR = 0x00040000; 	
    return;
}