?? bdm.c
字號:
CLRH /* prepare H */
loop:
CLRX /* clear X to point to PTA, CLRX has been moved to the beginning of the algorithm here to prevent its execution for the last bit */
mov #0x10,0
//STX ,X /* drive BDM low */
BIT ,X /* wait 10 cycles */
BIT ,X
BIT ,X
BIT ,X
BIT ,X
STA ,X /* switch BDM to high impedance */
MOV #4,k /* wait 37 cycles (= 4 + 4*8 + 1) */
wait1:
NOP
DEC k
BNE wait1
NOP
LDX ,X /* load X with value on the PTA port (including BDM_IN) */
LSLX /* shift BDM_IN into C */
LSLX
ROL i /* shift C into i (from the bottom) */
MOV #2,k /* wait 35 cycles, iterate the loop while waiting (7 cycles), ROL takes 4 cycles */
wait2: /* 35 = 4 + 2*10 + 4 + 7 */
BRN 0
DEC k
BNE wait2
DEC j
BNE loop
LDA i /* load the result into A */
}
}
/* 0.421 - 0.609 MHz */
unsigned char bdm_rx15(void) {
asm {
LDA #RESET_OUT_MASK /* contents of A will be driven to PTA in order to switch the driver off */
MOV #8,j /* store number of iterations into j */
CLRH /* prepare H */
loop:
CLRX /* clear X to point to PTA, CLRX has been moved to the beginning of the algorithm here to prevent its execution for the last bit */
mov #0x10,0
//STX ,X /* drive BDM low */
BIT ,X /* wait 13 cycles */
BIT ,X
BIT ,X
BIT ,X
BIT ,X
BRN 0
STA ,X /* switch BDM to high impedance */
MOV #6,k /* wait 46 cycles (= 4 + 6*7) */ /* wait 47 cycles (= 4 + 6*7 + 1) */
wait1:
DEC k
BNE wait1
/* NOP */
LDX ,X /* load X with value on the PTA port (including BDM_IN) */
LSLX /* shift BDM_IN into C */
LSLX
ROL i /* shift C into i (from the bottom) */
MOV #3,k /* wait 45 cycles, iterate the loop while waiting (7 cycles), ROL takes 4 cycles */
wait2: /* 45 = 4 + 3*10 + 4 + 7 */
BRN 0
DEC k
BNE wait2
DEC j
BNE loop
LDA i /* load the result into A */
}
}
/* decodes values recorded by RX functions */
/* expects LSB data in X and remaining 7 bytes on stack */
/* it is expected that caller will JUMP into this routine */
void rx_stack_decode(void) {
asm {
MOV #8,i
decode:
ROLX /* get the interesting bit into C (it is bit 6) */
ROLX
RORA /* and rotate it into A from the top */
PULX /* get the next value from stack */
DEC i
BNE decode
PSHX /* that was one pop too many, so push the value back */
}
}
/* transmit 8 bits of data, MSB first */
/* expects DIR2 active and DIR1 inactive (call bdm_tx_prepare) */
/* target frequency 6.6 - 8.4 MHz (this is BDM frequency (=crystal/2)) */
void bdm_tx1(unsigned char data) {
asm {
CLRX /* HX points to PTA */
CLRH
MOV #0x01,BDM_DIR2_PORT /* start driving the BDM */
/* bit 7 (MSB) */
SEC /* set C */
CLR ,X /* bring BDM low */
STA ,X /* assign value from MSB of A to BDM */
RORA /* set MSB of A */
STA ,X /* bring BDM high */
ROLA /* advance to next bit */
ROLA
/* bit 6 */
SEC /* set C */
CLR ,X /* bring BDM low */
STA ,X /* assign value from MSB of A to BDM */
RORA /* set MSB of A */
STA ,X /* bring BDM high */
ROLA /* advance to next bit */
ROLA
/* bit 5 */
SEC /* set C */
CLR ,X /* bring BDM low */
STA ,X /* assign value from MSB of A to BDM */
RORA /* set MSB of A */
STA ,X /* bring BDM high */
ROLA /* advance to next bit */
ROLA
/* bit 4 */
SEC /* set C */
CLR ,X /* bring BDM low */
STA ,X /* assign value from MSB of A to BDM */
RORA /* set MSB of A */
STA ,X /* bring BDM high */
ROLA /* advance to next bit */
ROLA
/* bit 3 */
SEC /* set C */
CLR ,X /* bring BDM low */
STA ,X /* assign value from MSB of A to BDM */
RORA /* set MSB of A */
STA ,X /* bring BDM high */
ROLA /* advance to next bit */
ROLA
/* bit 2 */
SEC /* set C */
CLR ,X /* bring BDM low */
STA ,X /* assign value from MSB of A to BDM */
RORA /* set MSB of A */
STA ,X /* bring BDM high */
ROLA /* advance to next bit */
ROLA
/* bit 1 */
SEC /* set C */
CLR ,X /* bring BDM low */
STA ,X /* assign value from MSB of A to BDM */
RORA /* set MSB of A */
STA ,X /* bring BDM high */
ROLA /* advance to next bit */
ROLA
/* bit 0 */
SEC /* set C */
CLR ,X /* bring BDM low */
STA ,X /* assign value from MSB of A to BDM */
RORA /* set MSB of A */
STA ,X /* bring BDM high */
MOV #0,BDM_DIR2_PORT /* stop driving the BDM */
}
ACKN_CLR; /* clear ACKN flag */
/* it takes 8 cycles from end of the last bit till enable of the ACKN capture */
/* that is short enough for BDM freq of: (32+16)*3/8 = 18 MHz */
/* 32+16 comes from minimum delay between command and ACKN (32 BDM cycles) and 16 cycles of the ACKN pulse (capturing its rising edge) */
}
/* target frequency 5.5 - 7 MHz (this is BDM frequency (=crystal/2)) */
void bdm_tx2(unsigned char data) {
asm {
CLRX /* HX points to PTA */
CLRH
MOV #01,BDM_DIR2_PORT /* start driving the BDM */
/* bit 7 (MSB) */
CLR ,X /* bring BDM low */
STA ,X /* assign value from MSB of A to BDM */
ORA #BDM_OUT_MASK /* set MSB of A */
STA ,X /* bring BDM high */
LSLA /* advance to next bit */
/* bit 6 */
CLR ,X /* bring BDM low */
STA ,X /* assign value from MSB of A to BDM */
ORA #BDM_OUT_MASK /* set MSB of A */
STA ,X /* bring BDM high */
LSLA /* advance to next bit */
/* bit 5 */
CLR ,X /* bring BDM low */
STA ,X /* assign value from MSB of A to BDM */
ORA #BDM_OUT_MASK /* set MSB of A */
STA ,X /* bring BDM high */
LSLA /* advance to next bit */
/* bit 4 */
CLR ,X /* bring BDM low */
STA ,X /* assign value from MSB of A to BDM */
ORA #BDM_OUT_MASK /* set MSB of A */
STA ,X /* bring BDM high */
LSLA /* advance to next bit */
/* bit 3 */
CLR ,X /* bring BDM low */
STA ,X /* assign value from MSB of A to BDM */
ORA #BDM_OUT_MASK /* set MSB of A */
STA ,X /* bring BDM high */
LSLA /* advance to next bit */
/* bit 2 */
CLR ,X /* bring BDM low */
STA ,X /* assign value from MSB of A to BDM */
ORA #BDM_OUT_MASK /* set MSB of A */
STA ,X /* bring BDM high */
LSLA /* advance to next bit */
/* bit 1 */
CLR ,X /* bring BDM low */
STA ,X /* assign value from MSB of A to BDM */
ORA #BDM_OUT_MASK /* set MSB of A */
STA ,X /* bring BDM high */
LSLA /* advance to next bit */
/* bit 0 */
CLR ,X /* bring BDM low */
STA ,X /* assign value from MSB of A to BDM */
ORA #BDM_OUT_MASK /* set MSB of A */
STA ,X /* bring BDM high */
MOV #0,BDM_DIR2_PORT /* stop driving the BDM */
}
ACKN_CLR; /* clear ACKN flag */
}
/* target frequency 4.714 - 6 MHz (this is BDM frequency (=crystal/2)) */
void bdm_tx3(unsigned char data) {
asm {
CLRX /* HX points to PTA */
CLRH
MOV #01,BDM_DIR2_PORT /* start driving the BDM */
/* bit 7 (MSB) */
CLR ,X /* bring BDM low */
STA ,X /* assign value from MSB of A to BDM */
ORA #BDM_OUT_MASK /* set MSB of A */
NOP /* wait 1 cycle */
STA ,X /* bring BDM high */
LSLA /* advance to next bit */
NOP /* wait 1 cycle */
/* bit 6 */
CLR ,X /* bring BDM low */
STA ,X /* assign value from MSB of A to BDM */
ORA #BDM_OUT_MASK /* set MSB of A */
NOP /* wait 1 cycle */
STA ,X /* bring BDM high */
LSLA /* advance to next bit */
NOP /* wait 1 cycle */
/* bit 5 */
CLR ,X /* bring BDM low */
STA ,X /* assign value from MSB of A to BDM */
ORA #BDM_OUT_MASK /* set MSB of A */
NOP /* wait 1 cycle */
STA ,X /* bring BDM high */
LSLA /* advance to next bit */
NOP /* wait 1 cycle */
/* bit 4 */
CLR ,X /* bring BDM low */
STA ,X /* assign value from MSB of A to BDM */
ORA #BDM_OUT_MASK /* set MSB of A */
NOP /* wait 1 cycle */
STA ,X /* bring BDM high */
LSLA /* advance to next bit */
NOP /* wait 1 cycle */
/* bit 3 */
CLR ,X /* bring BDM low */
STA ,X /* assign value from MSB of A to BDM */
ORA #BDM_OUT_MASK /* set MSB of A */
NOP /* wait 1 cycle */
STA ,X /* bring BDM high */
LSLA /* advance to next bit */
NOP /* wait 1 cycle */
/* bit 2 */
CLR ,X /* bring BDM low */
STA ,X /* assign value from MSB of A to BDM */
ORA #BDM_OUT_MASK /* set MSB of A */
NOP /* wait 1 cycle */
STA ,X /* bring BDM high */
LSLA /* advance to next bit */
NOP /* wait 1 cycle */
/* bit 1 */
CLR ,X /* bring BDM low */
STA ,X /* assign value from MSB of A to BDM */
ORA #BDM_OUT_MASK /* set MSB of A */
NOP /* wait 1 cycle */
STA ,X /* bring BDM high */
LSLA /* advance to next bit */
NOP /* wait 1 cycle */?? 快捷鍵說明
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