#include "mftPHY2500.h"

// PATABLE (0 dBm output power)
 //#pragma CONST_SEG ConstData
#pragma CONST_SEG DEFAULT
//-20 0x46-12:0xc6
unsigned char const paTable[1] ={0xFE};		 //0XFF:1.5DB,0XFE:0DB  ,0XBB:-2DB
#define PHYDATALEN  14//APP_DATA_LENGTH-2
//-------------------------------------------------------------------------------------------------------
//  Global Variables

//在SmartRF Studio中取數(shù)格式: 0x@VH@,   //@RN@    @Rd@

// Chipcon
// Product = CC2500
// Chip version = E
// Crystal accuracy = 40 ppm
// X-tal frequency = 26 MHz
// RF output power = 1 dBm
// RX filterbandwidth = 540.000000 kHz
// Deviation = 1.000000
// Datarate = 250.000000 kbps
// Modulation = (7) MSK
// Manchester enable = (0) Manchester disabled
// RF Frequency = 2433.000000 MHz
// Channel spacing = 199.950000 kHz
// Channel number = 0
// Sync mode = (3) 30/32 sync word bits detected
// Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX
// CRC operation = (1) CRC calculation in TX and CRC check in RX enabled
// Forward Error Correction = (1) FEC enabled
// Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word.
// Packetlength = 64
// Preamble count = (2)  4 bytes
// Append status = 1
// Address check = (2) Address check, 0 (0x00) broadcast
// FIFO autoflush = 0
// Device address = 0
// GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet
// GDO2 signal selection = ( 7)
RF_SETTINGS const rfSettings = {
0x07,    //FSCTRL1  Frequency synthesizer control.
0x00,    //FSCTRL0  Frequency synthesizer control.
0x5C,    //FREQ2  Frequency control word, high byte.	 //5e->5b:BASE frequence:2386M jc 2006/7/29 channel Nuber:71~255
0x93,    //FREQ1  Frequency control word, middle byte.
0xB1,    //FREQ0  Frequency control word, low byte.
0x2D,    //MDMCFG4  Modem configuration.  //0x2d receive FILTER band wideth=541k:jc	 2007/4/6
0x3B,    //MDMCFG3  Modem configuration.
0x73,    //MDMCFG2  Modem configuration.
0xA2,    //MDMCFG1  Modem configuration.
0xF8,    //MDMCFG0  Modem configuration.	 
//500k data rate
 /*
0x0C,   //FSCTRL1    Frequency synthesizer control.
0x00,   //FSCTRL0    Frequency synthesizer control.
0x5B,   //FREQ2    Frequency control word, high byte.
0x93,   //FREQ1    Frequency control word, middle byte.
0xB1,   //FREQ0    Frequency control word, low byte.
0x0E,   //MDMCFG4    Modem configuration.//different
0x3B,   //MDMCFG3    Modem configuration.
0x73,   //MDMCFG2    Modem configuration.
0xC2,   //MDMCFG1    Modem configuration.  //different
0xF8,   //MDMCFG0    Modem configuration.
		 */
//---------------------------------------------

FIRSTCHAN,    //CHANNR  Channel number.
0x01,    //DEVIATN  Modem deviation setting (when FSK modulation is enabled).
0xB6,    //FREND1  Front end RX configuration.
0x10,    //FREND0  Front end RX configuration.  //0x17->0x10 no power table
0x08,    //MCSM0  Main Radio Control State Machine configuration.//0x18 to 0x08 jc
0x1D,    //FOCCFG  Frequency Offset Compensation Configuration.
0x1C,    //BSCFG  Bit synchronization Configuration.
0xC7,    //AGCCTRL2  AGC control.
0xB2,    //AGCCTRL0  AGC control.
0xEA,    //FSCAL3  Frequency synthesizer calibration.
0x0A,    //FSCAL2  Frequency synthesizer calibration.
0x11,    //FSCAL0  Frequency synthesizer calibration.
0x59,    //FSTEST  Frequency synthesizer calibration.
0x88,    //TEST2  Various test settings.
0x31,    //TEST1  Various test settings.
0x0B,    //TEST0  Various test settings.
0x06,    //IOCFG2  GDO2 output pin configuration.
0x30,    //IOCFG0D  GDO0 output pin configuration. Refer to SmartRF?Studio User Manual for detailed pseudo register explanation.//jc 0x06->0x46
0x06,    //PKTCTRL1  Packet automation control.
0x45,    //PKTCTRL0  Packet automation control.
0x00,    //ADDR  Device address.
20,    //PKTLEN  Packet length.
};
//#pragma CONST_SEG DEFAULT
#pragma DATA_SEG  MY_ZEROPAGE
// BYTE status0[2]={0,0};                        //0--RSSI   1--LQI
 BYTE SPI0DAT=0;

 //unsigned char channel=0;
 #pragma DATA_SEG DEFAULT
//sbit CC2500_NCS =P0^5;                  //mouse SPI CS
//sbit CC2500_MISO=P1^1;  //change for HMISO

/*********************************************************************
 * Function:       void delayms(BYTE delayms)
 *
 *
 * Input:           delayms:delay time unit ms
 *
 * Output:          None
 *
 * Side Effects:    None
 *
 * Overview:        Internal Tick and Seconds count are updated.
 *
 * Note:            None
 ********************************************************************/
/*void delayms(BYTE delayms)
{
 	  int i ;
 	  char j;
 	  for(i=0;i<delayms;i++) {

		   __RESET_WATCHDOG();

     	   for(j=0;j<200;j++) {


     	   }
 	  }

}*/

//-------------------------------------------------------------------------------------------------------
//  void RfWriteRfSettings(RF_SETTINGS *pRfSettings)
//
//  DESCRIPTION:
//      This function is used to configure the CC2500 based on a given rf setting
//
//  ARGUMENTS:
//      RF_SETTINGS *pRfSettings
//          Pointer to a struct containing rf register settings
//-------------------------------------------------------------------------------------------------------
//void halRfWriteRfSettings(RF_SETTINGS *pRfSettings);

//-------------------------------------------------------------------------------------------------------
//  void halWait(UINT16 timeout)
//
//  DESCRIPTION:
//      Runs an idle loop for [timeout] microseconds.
//
//  ARGUMENTS:
//      UINT8 timeout
//          The timeout in microseconds
//-------------------------------------------------------------------------------------------------------
void halWait(unsigned short timeout) {
    do {
        _nop_();
        _nop_();
        _nop_();
        _nop_();
        _nop_();
        _nop_();
        _nop_();
        _nop_();
        _nop_();
        _nop_();
        _nop_();
        _nop_();
        _nop_();
        _nop_();
         _nop_();
        _nop_();
        _nop_();
        _nop_();
      //  __RESET_WATCHDOG();
    } while (--timeout);
}// halWait

// Macro used for communication data polling and wait on the SPI bus
void SPI_WAIT()
{
  //DisableInterrupts;
   SPIPut(SPI0DAT);
  //EnableInterrupts;
}


//----------------------------------------------------------
// Macro to reset the CCxxx0 and wait for it to be ready
void RESET_CCxxx0(void)
{
//    SPI0CFG   = 0x40;       //CKPHA=0  CKPOL=0
        CC2500_NCS = 0;
        while (CC2500_MISO)
        {
        	 ;//__RESET_WATCHDOG();
        }
        SPI0DAT = CCxxx0_SRES;
        SPI_WAIT();
        while (CC2500_MISO)
        {
        	 ;//__RESET_WATCHDOG();
        }
        CC2500_NCS = 1;
   // SPI0CFG   = 0x70;       //CKPHA=1  CKPOL=1
}

void POWER_UP_RESET_CCxxx0(void)
{
   // SPI0CFG   = 0x40;       //CKPHA=0  CKPOL=0
    CC2500_SCK = 0x00;
    CC2500_NCS = 1;
    halWait(1);
    CC2500_NCS = 0;
    halWait(1);
    CC2500_NCS = 1;
    halWait(41);
    RESET_CCxxx0();
}

//-------------------------------------------------------------------------------------------------------
//  void halSpiWriteReg(BYTE addr, BYTE value)
//
//  DESCRIPTION:
//      Function for writing to a single CCxxx0 register
//
//  ARGUMENTS:
//      BYTE addr
//          Address of a specific CCxxx0 register to accessed.
//      BYTE value
//          Value to be written to the specified CCxxx0 register.
//-------------------------------------------------------------------------------------------------------
void halSpiWriteReg(BYTE addr, BYTE value) {
   // SPI0CFG   = 0x40;       //CKPHA=0  CKPOL=0
    CC2500_NCS = 0;
    while (CC2500_MISO)
    {
    	 ;//__RESET_WATCHDOG();
    }
    SPI0DAT = addr;
    SPI_WAIT();
    SPI0DAT = value;
    SPI_WAIT();
    CC2500_NCS = 1;
    //SPI0CFG   = 0x70;       //CKPHA=1  CKPOL=1
}// halSpiWriteReg

//-------------------------------------------------------------------------------------------------------
//  Global Variables

//在SmartRF Studio中取數(shù)格式: 0x@VH@,   //@RN@    @Rd@

// Chipcon
// Product = CC2500
// Chip version = E
// Crystal accuracy = 40 ppm
// X-tal frequency = 26 MHz
// RF output power = 0 dBm
// RX filterbandwidth = 232.000000 kHz
// Deviation = 38.000000 kHz
// Datarate = 10.000000 kbps
// Modulation = (0) 2-FSK
// Manchester enable = (1) Manchester enabled
// RF Frequency = 2433.000000 MHz
// Channel spacing = 199.950000 kHz
// Channel number = 0
// Sync mode = (3) 30/32 sync word bits detected
// Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX
// CRC operation = (1) CRC calculation in TX and CRC check in RX enabled
// Forward Error Correction = (0) FEC disabled
// Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word.
// Packetlength = 255
// Preamble count = (2)  4 bytes
// Append status = 1
// Address check = (2) Address check, 0 (0x00) broadcast
// FIFO autoflush = 0
// Device address = 0
// GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet
// GDO2 signal selection = ( 7)


//-------------------------------------------------------------------------------------------------------
//  void RfWriteRfSettings(RF_SETTINGS *pRfSettings)
//
//  DESCRIPTION:
//      This function is used to configure the CC2500 based on a given rf setting
//
//  ARGUMENTS:
//      RF_SETTINGS *pRfSettings
//          Pointer to a struct containing rf register settings
//-------------------------------------------------------------------------------------------------------
//void halRfWriteRfSettings(RF_SETTINGS const *pRfSettings) {
 void halRfWriteRfSettings() {