?? unsignmulti.fit.rpt
字號(hào):
Fitter report for UnsignMulti
Sun Jul 13 17:08:26 2008
Quartus II Version 7.2 Build 207 03/18/2008 Service Pack 3 SJ Full Version
---------------------
; Table of Contents ;
---------------------
1. Legal Notice
2. Fitter Summary
3. Fitter Settings
4. Fitter Netlist Optimizations
5. Pin-Out File
6. Fitter Resource Usage Summary
7. Input Pins
8. Output Pins
9. I/O Bank Usage
10. All Package Pins
11. Output Pin Default Load For Reported TCO
12. Fitter Resource Utilization by Entity
13. Delay Chain Summary
14. Pad To Core Delay Chain Fanout
15. Control Signals
16. Non-Global High Fan-Out Signals
17. Fitter DSP Block Usage Summary
18. DSP Block Details
19. Interconnect Usage Summary
20. LAB Logic Elements
21. LAB-wide Signals
22. LAB Signals Sourced
23. LAB Signals Sourced Out
24. LAB Distinct Inputs
25. Fitter Device Options
26. Operating Settings and Conditions
27. Advanced Data - General
28. Advanced Data - Placement Preparation
29. Advanced Data - Placement
30. Advanced Data - Routing
31. Fitter Messages
32. Fitter Suppressed Messages
----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2007 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
+------------------------------------------------------------------------------------+
; Fitter Summary ;
+------------------------------------+-----------------------------------------------+
; Fitter Status ; Successful - Sun Jul 13 17:08:26 2008 ;
; Quartus II Version ; 7.2 Build 207 03/18/2008 SP 3 SJ Full Version ;
; Revision Name ; UnsignMulti ;
; Top-level Entity Name ; UnsignMulti ;
; Family ; Cyclone II ;
; Device ; EP2C35F672C6 ;
; Timing Models ; Final ;
; Total logic elements ; 235 / 33,216 ( < 1 % ) ;
; Total combinational functions ; 219 / 33,216 ( < 1 % ) ;
; Dedicated logic registers ; 52 / 33,216 ( < 1 % ) ;
; Total registers ; 52 ;
; Total pins ; 105 / 475 ( 22 % ) ;
; Total virtual pins ; 0 ;
; Total memory bits ; 0 / 483,840 ( 0 % ) ;
; Embedded Multiplier 9-bit elements ; 1 / 70 ( 1 % ) ;
; Total PLLs ; 0 / 4 ( 0 % ) ;
+------------------------------------+-----------------------------------------------+
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