?? unsignmulti.tan.qmsg
字號(hào):
{ "Info" "ITAN_NO_REG2REG_EXIST" "KEY\[0\] " "Info: No valid register-to-register data paths exist for clock \"KEY\[0\]\"" { } { } 0 0 "No valid register-to-register data paths exist for clock \"%1!s!\"" 0 0 "" 0}
{ "Info" "ITDB_TSU_RESULT" "DecDis:DD0\|HexVal\[3\] SW\[13\] KEY\[0\] 25.383 ns register " "Info: tsu for register \"DecDis:DD0\|HexVal\[3\]\" (data pin = \"SW\[13\]\", clock pin = \"KEY\[0\]\") is 25.383 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "29.068 ns + Longest pin register " "Info: + Longest pin to register delay is 29.068 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.832 ns) 0.832 ns SW\[13\] 1 PIN PIN_T7 10 " "Info: 1: + IC(0.000 ns) + CELL(0.832 ns) = 0.832 ns; Loc. = PIN_T7; Fanout = 10; PIN Node = 'SW\[13\]'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { SW[13] } "NODE_NAME" } } { "UnsignMulti.v" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/UnsignMulti.v" 6 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(5.699 ns) + CELL(2.246 ns) 8.777 ns BinMulti:BM1\|lpm_mult:Mult0\|mult_lq01:auto_generated\|mac_mult1~DATAOUT5 2 COMB DSPMULT_X39_Y14_N0 1 " "Info: 2: + IC(5.699 ns) + CELL(2.246 ns) = 8.777 ns; Loc. = DSPMULT_X39_Y14_N0; Fanout = 1; COMB Node = 'BinMulti:BM1\|lpm_mult:Mult0\|mult_lq01:auto_generated\|mac_mult1~DATAOUT5'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "7.945 ns" { SW[13] BinMulti:BM1|lpm_mult:Mult0|mult_lq01:auto_generated|mac_mult1~DATAOUT5 } "NODE_NAME" } } { "db/mult_lq01.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/mult_lq01.tdf" 35 2 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.224 ns) 9.001 ns BinMulti:BM1\|lpm_mult:Mult0\|mult_lq01:auto_generated\|result\[5\] 3 COMB DSPOUT_X39_Y14_N2 8 " "Info: 3: + IC(0.000 ns) + CELL(0.224 ns) = 9.001 ns; Loc. = DSPOUT_X39_Y14_N2; Fanout = 8; COMB Node = 'BinMulti:BM1\|lpm_mult:Mult0\|mult_lq01:auto_generated\|result\[5\]'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.224 ns" { BinMulti:BM1|lpm_mult:Mult0|mult_lq01:auto_generated|mac_mult1~DATAOUT5 BinMulti:BM1|lpm_mult:Mult0|mult_lq01:auto_generated|result[5] } "NODE_NAME" } } { "db/mult_lq01.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/mult_lq01.tdf" 32 2 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.880 ns) + CELL(0.414 ns) 11.295 ns BinToDec:BTD0\|lpm_divide:Mod0\|lpm_divide_75m:auto_generated\|sign_div_unsign_ekh:divider\|alt_u_div_uve:divider\|add_sub_6_result_int\[4\]~21 4 COMB LCCOMB_X55_Y15_N20 2 " "Info: 4: + IC(1.880 ns) + CELL(0.414 ns) = 11.295 ns; Loc. = LCCOMB_X55_Y15_N20; Fanout = 2; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod0\|lpm_divide_75m:auto_generated\|sign_div_unsign_ekh:divider\|alt_u_div_uve:divider\|add_sub_6_result_int\[4\]~21'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.294 ns" { BinMulti:BM1|lpm_mult:Mult0|mult_lq01:auto_generated|result[5] BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_6_result_int[4]~21 } "NODE_NAME" } } { "db/alt_u_div_uve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_uve.tdf" 57 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 11.366 ns BinToDec:BTD0\|lpm_divide:Mod0\|lpm_divide_75m:auto_generated\|sign_div_unsign_ekh:divider\|alt_u_div_uve:divider\|add_sub_6_result_int\[5\]~23 5 COMB LCCOMB_X55_Y15_N22 2 " "Info: 5: + IC(0.000 ns) + CELL(0.071 ns) = 11.366 ns; Loc. = LCCOMB_X55_Y15_N22; Fanout = 2; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod0\|lpm_divide_75m:auto_generated\|sign_div_unsign_ekh:divider\|alt_u_div_uve:divider\|add_sub_6_result_int\[5\]~23'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_6_result_int[4]~21 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_6_result_int[5]~23 } "NODE_NAME" } } { "db/alt_u_div_uve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_uve.tdf" 57 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 11.437 ns BinToDec:BTD0\|lpm_divide:Mod0\|lpm_divide_75m:auto_generated\|sign_div_unsign_ekh:divider\|alt_u_div_uve:divider\|add_sub_6_result_int\[6\]~25 6 COMB LCCOMB_X55_Y15_N24 1 " "Info: 6: + IC(0.000 ns) + CELL(0.071 ns) = 11.437 ns; Loc. = LCCOMB_X55_Y15_N24; Fanout = 1; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod0\|lpm_divide_75m:auto_generated\|sign_div_unsign_ekh:divider\|alt_u_div_uve:divider\|add_sub_6_result_int\[6\]~25'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_6_result_int[5]~23 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_6_result_int[6]~25 } "NODE_NAME" } } { "db/alt_u_div_uve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_uve.tdf" 57 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.410 ns) 11.847 ns BinToDec:BTD0\|lpm_divide:Mod0\|lpm_divide_75m:auto_generated\|sign_div_unsign_ekh:divider\|alt_u_div_uve:divider\|add_sub_6_result_int\[7\]~26 7 COMB LCCOMB_X55_Y15_N26 18 " "Info: 7: + IC(0.000 ns) + CELL(0.410 ns) = 11.847 ns; Loc. = LCCOMB_X55_Y15_N26; Fanout = 18; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod0\|lpm_divide_75m:auto_generated\|sign_div_unsign_ekh:divider\|alt_u_div_uve:divider\|add_sub_6_result_int\[7\]~26'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.410 ns" { BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_6_result_int[6]~25 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_6_result_int[7]~26 } "NODE_NAME" } } { "db/alt_u_div_uve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_uve.tdf" 57 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.302 ns) + CELL(0.150 ns) 13.299 ns BinToDec:BTD0\|lpm_divide:Mod0\|lpm_divide_75m:auto_generated\|sign_div_unsign_ekh:divider\|alt_u_div_uve:divider\|StageOut\[50\]~21 8 COMB LCCOMB_X53_Y14_N22 2 " "Info: 8: + IC(1.302 ns) + CELL(0.150 ns) = 13.299 ns; Loc. = LCCOMB_X53_Y14_N22; Fanout = 2; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod0\|lpm_divide_75m:auto_generated\|sign_div_unsign_ekh:divider\|alt_u_div_uve:divider\|StageOut\[50\]~21'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.452 ns" { BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_6_result_int[7]~26 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|StageOut[50]~21 } "NODE_NAME" } } { "db/alt_u_div_uve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_uve.tdf" 79 10 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.735 ns) + CELL(0.393 ns) 14.427 ns BinToDec:BTD0\|lpm_divide:Mod0\|lpm_divide_75m:auto_generated\|sign_div_unsign_ekh:divider\|alt_u_div_uve:divider\|add_sub_7_result_int\[3\]~21 9 COMB LCCOMB_X54_Y16_N6 2 " "Info: 9: + IC(0.735 ns) + CELL(0.393 ns) = 14.427 ns; Loc. = LCCOMB_X54_Y16_N6; Fanout = 2; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod0\|lpm_divide_75m:auto_generated\|sign_div_unsign_ekh:divider\|alt_u_div_uve:divider\|add_sub_7_result_int\[3\]~21'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.128 ns" { BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|StageOut[50]~21 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[3]~21 } "NODE_NAME" } } { "db/alt_u_div_uve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_uve.tdf" 62 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 14.498 ns BinToDec:BTD0\|lpm_divide:Mod0\|lpm_divide_75m:auto_generated\|sign_div_unsign_ekh:divider\|alt_u_div_uve:divider\|add_sub_7_result_int\[4\]~23 10 COMB LCCOMB_X54_Y16_N8 2 " "Info: 10: + IC(0.000 ns) + CELL(0.071 ns) = 14.498 ns; Loc. = LCCOMB_X54_Y16_N8; Fanout = 2; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod0\|lpm_divide_75m:auto_generated\|sign_div_unsign_ekh:divider\|alt_u_div_uve:divider\|add_sub_7_result_int\[4\]~23'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[3]~21 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[4]~23 } "NODE_NAME" } } { "db/alt_u_div_uve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_uve.tdf" 62 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 14.569 ns BinToDec:BTD0\|lpm_divide:Mod0\|lpm_divide_75m:auto_generated\|sign_div_unsign_ekh:divider\|alt_u_div_uve:divider\|add_sub_7_result_int\[5\]~25 11 COMB LCCOMB_X54_Y16_N10 2 " "Info: 11: + IC(0.000 ns) + CELL(0.071 ns) = 14.569 ns; Loc. = LCCOMB_X54_Y16_N10; Fanout = 2; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod0\|lpm_divide_75m:auto_generated\|sign_div_unsign_ekh:divider\|alt_u_div_uve:divider\|add_sub_7_result_int\[5\]~25'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[4]~23 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[5]~25 } "NODE_NAME" } } { "db/alt_u_div_uve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_uve.tdf" 62 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 14.640 ns BinToDec:BTD0\|lpm_divide:Mod0\|lpm_divide_75m:auto_generated\|sign_div_unsign_ekh:divider\|alt_u_div_uve:divider\|add_sub_7_result_int\[6\]~27 12 COMB LCCOMB_X54_Y16_N12 1 " "Info: 12: + IC(0.000 ns) + CELL(0.071 ns) = 14.640 ns; Loc. = LCCOMB_X54_Y16_N12; Fanout = 1; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod0\|lpm_divide_75m:auto_generated\|sign_div_unsign_ekh:divider\|alt_u_div_uve:divider\|add_sub_7_result_int\[6\]~27'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[5]~25 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[6]~27 } "NODE_NAME" } } { "db/alt_u_div_uve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_uve.tdf" 62 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.159 ns) 14.799 ns BinToDec:BTD0\|lpm_divide:Mod0\|lpm_divide_75m:auto_generated\|sign_div_unsign_ekh:divider\|alt_u_div_uve:divider\|add_sub_7_result_int\[7\]~29 13 COMB LCCOMB_X54_Y16_N14 1 " "Info: 13: + IC(0.000 ns) + CELL(0.159 ns) = 14.799 ns; Loc. = LCCOMB_X54_Y16_N14; Fanout = 1; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod0\|lpm_divide_75m:auto_generated\|sign_div_unsign_ekh:divider\|alt_u_div_uve:divider\|add_sub_7_result_int\[7\]~29'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.159 ns" { BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[6]~27 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[7]~29 } "NODE_NAME" } } { "db/alt_u_div_uve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_uve.tdf" 62 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.410 ns) 15.209 ns BinToDec:BTD0\|lpm_divide:Mod0\|lpm_divide_75m:auto_generated\|sign_div_unsign_ekh:divider\|alt_u_div_uve:divider\|add_sub_7_result_int\[8\]~30 14 COMB LCCOMB_X54_Y16_N16 27 " "Info: 14: + IC(0.000 ns) + CELL(0.410 ns) = 15.209 ns; Loc. = LCCOMB_X54_Y16_N16; Fanout = 27; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod0\|lpm_divide_75m:auto_generated\|sign_div_unsign_ekh:divider\|alt_u_div_uve:divider\|add_sub_7_result_int\[8\]~30'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.410 ns" { BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[7]~29 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[8]~30 } "NODE_NAME" } } { "db/alt_u_div_uve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_uve.tdf" 62 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.712 ns) + CELL(0.419 ns) 16.340 ns BinToDec:BTD0\|lpm_divide:Mod0\|lpm_divide_75m:auto_generated\|sign_div_unsign_ekh:divider\|alt_u_div_uve:divider\|StageOut\[61\]~690 15 COMB LCCOMB_X55_Y15_N14 6 " "Info: 15: + IC(0.712 ns) + CELL(0.419 ns) = 16.340 ns; Loc. = LCCOMB_X55_Y15_N14; Fanout = 6; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod0\|lpm_divide_75m:auto_generated\|sign_div_unsign_ekh:divider\|alt_u_div_uve:divider\|StageOut\[61\]~690'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.131 ns" { BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[8]~30 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|StageOut[61]~690 } "NODE_NAME" } } { "db/alt_u_div_uve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_uve.tdf" 79 10 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.773 ns) + CELL(0.414 ns) 17.527 ns BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_3_result_int\[2\]~13 16 COMB LCCOMB_X55_Y16_N16 2 " "Info: 16: + IC(0.773 ns) + CELL(0.414 ns) = 17.527 ns; Loc. = LCCOMB_X55_Y16_N16; Fanout = 2; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_3_result_int\[2\]~13'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.187 ns" { BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|StageOut[61]~690 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_3_result_int[2]~13 } "NODE_NAME" } } { "db/alt_u_div_mve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_mve.tdf" 42 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 17.598 ns BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_3_result_int\[3\]~15 17 COMB LCCOMB_X55_Y16_N18 1 " "Info: 17: + IC(0.000 ns) + CELL(0.071 ns) = 17.598 ns; Loc. = LCCOMB_X55_Y16_N18; Fanout = 1; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_3_result_int\[3\]~15'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_3_result_int[2]~13 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_3_result_int[3]~15 } "NODE_NAME" } } { "db/alt_u_div_mve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_mve.tdf" 42 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.410 ns) 18.008 ns BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_3_result_int\[4\]~16 18 COMB LCCOMB_X55_Y16_N20 10 " "Info: 18: + IC(0.000 ns) + CELL(0.410 ns) = 18.008 ns; Loc. = LCCOMB_X55_Y16_N20; Fanout = 10; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_3_result_int\[4\]~16'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.410 ns" { BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_3_result_int[3]~15 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_3_result_int[4]~16 } "NODE_NAME" } } { "db/alt_u_div_mve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_mve.tdf" 42 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.698 ns) + CELL(0.419 ns) 19.125 ns BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|StageOut\[15\]~1499 19 COMB LCCOMB_X53_Y16_N30 3 " "Info: 19: + IC(0.698 ns) + CELL(0.419 ns) = 19.125 ns; Loc. = LCCOMB_X53_Y16_N30; Fanout = 3; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|StageOut\[15\]~1499'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.117 ns" { BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_3_result_int[4]~16 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|StageOut[15]~1499 } "NODE_NAME" } } { "db/alt_u_div_mve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_mve.tdf" 74 10 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.730 ns) + CELL(0.414 ns) 20.269 ns BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_4_result_int\[1\]~13 20 COMB LCCOMB_X56_Y16_N18 2 " "Info: 20: + IC(0.730 ns) + CELL(0.414 ns) = 20.269 ns; Loc. = LCCOMB_X56_Y16_N18; Fanout = 2; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_4_result_int\[1\]~13'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.144 ns" { BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|StageOut[15]~1499 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[1]~13 } "NODE_NAME" } } { "db/alt_u_div_mve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_mve.tdf" 47 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 20.340 ns BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_4_result_int\[2\]~15 21 COMB LCCOMB_X56_Y16_N20 2 " "Info: 21: + IC(0.000 ns) + CELL(0.071 ns) = 20.340 ns; Loc. = LCCOMB_X56_Y16_N20; Fanout = 2; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_4_result_int\[2\]~15'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[1]~13 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[2]~15 } "NODE_NAME" } } { "db/alt_u_div_mve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_mve.tdf" 47 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 20.411 ns BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_4_result_int\[3\]~17 22 COMB LCCOMB_X56_Y16_N22 1 " "Info: 22: + IC(0.000 ns) + CELL(0.071 ns) = 20.411 ns; Loc. = LCCOMB_X56_Y16_N22; Fanout = 1; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_4_result_int\[3\]~17'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[2]~15 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[3]~17 } "NODE_NAME" } } { "db/alt_u_div_mve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_mve.tdf" 47 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 20.482 ns BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_4_result_int\[4\]~19 23 COMB LCCOMB_X56_Y16_N24 1 " "Info: 23: + IC(0.000 ns) + CELL(0.071 ns) = 20.482 ns; Loc. = LCCOMB_X56_Y16_N24; Fanout = 1; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_4_result_int\[4\]~19'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[3]~17 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[4]~19 } "NODE_NAME" } } { "db/alt_u_div_mve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_mve.tdf" 47 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.410 ns) 20.892 ns BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_4_result_int\[5\]~20 24 COMB LCCOMB_X56_Y16_N26 10 " "Info: 24: + IC(0.000 ns) + CELL(0.410 ns) = 20.892 ns; Loc. = LCCOMB_X56_Y16_N26; Fanout = 10; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_4_result_int\[5\]~20'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.410 ns" { BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[4]~19 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[5]~20 } "NODE_NAME" } } { "db/alt_u_div_mve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_mve.tdf" 47 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.691 ns) + CELL(0.415 ns) 21.998 ns BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|StageOut\[20\]~1504 25 COMB LCCOMB_X54_Y16_N26 3 " "Info: 25: + IC(0.691 ns) + CELL(0.415 ns) = 21.998 ns; Loc. = LCCOMB_X54_Y16_N26; Fanout = 3; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|StageOut\[20\]~1504'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.106 ns" { BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[5]~20 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|StageOut[20]~1504 } "NODE_NAME" } } { "db/alt_u_div_mve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_mve.tdf" 74 10 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.693 ns) + CELL(0.393 ns) 23.084 ns BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_5_result_int\[1\]~13 26 COMB LCCOMB_X56_Y16_N4 2 " "Info: 26: + IC(0.693 ns) + CELL(0.393 ns) = 23.084 ns; Loc. = LCCOMB_X56_Y16_N4; Fanout = 2; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_5_result_int\[1\]~13'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.086 ns" { BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|StageOut[20]~1504 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[1]~13 } "NODE_NAME" } } { "db/alt_u_div_mve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_mve.tdf" 52 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 23.155 ns BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_5_result_int\[2\]~15 27 COMB LCCOMB_X56_Y16_N6 2 " "Info: 27: + IC(0.000 ns) + CELL(0.071 ns) = 23.155 ns; Loc. = LCCOMB_X56_Y16_N6; Fanout = 2; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_5_result_int\[2\]~15'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[1]~13 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[2]~15 } "NODE_NAME" } } { "db/alt_u_div_mve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_mve.tdf" 52 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 23.226 ns BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_5_result_int\[3\]~17 28 COMB LCCOMB_X56_Y16_N8 1 " "Info: 28: + IC(0.000 ns) + CELL(0.071 ns) = 23.226 ns; Loc. = LCCOMB_X56_Y16_N8; Fanout = 1; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_5_result_int\[3\]~17'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[2]~15 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[3]~17 } "NODE_NAME" } } { "db/alt_u_div_mve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_mve.tdf" 52 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 23.297 ns BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_5_result_int\[4\]~19 29 COMB LCCOMB_X56_Y16_N10 1 " "Info: 29: + IC(0.000 ns) + CELL(0.071 ns) = 23.297 ns; Loc. = LCCOMB_X56_Y16_N10; Fanout = 1; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_5_result_int\[4\]~19'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[3]~17 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[4]~19 } "NODE_NAME" } } { "db/alt_u_div_mve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_mve.tdf" 52 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.410 ns) 23.707 ns BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_5_result_int\[5\]~20 30 COMB LCCOMB_X56_Y16_N12 8 " "Info: 30: + IC(0.000 ns) + CELL(0.410 ns) = 23.707 ns; Loc. = LCCOMB_X56_Y16_N12; Fanout = 8; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_5_result_int\[5\]~20'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.410 ns" { BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[4]~19 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[5]~20 } "NODE_NAME" } } { "db/alt_u_div_mve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_mve.tdf" 52 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.516 ns) + CELL(0.437 ns) 24.660 ns BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|StageOut\[25\]~1505 31 COMB LCCOMB_X57_Y16_N20 3 " "Info: 31: + IC(0.516 ns) + CELL(0.437 ns) = 24.660 ns; Loc. = LCCOMB_X57_Y16_N20; Fanout = 3; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|StageOut\[25\]~1505'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.953 ns" { BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[5]~20 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|StageOut[25]~1505 } "NODE_NAME" } } { "db/alt_u_div_mve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_mve.tdf" 74 10 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.671 ns) + CELL(0.393 ns) 25.724 ns BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_6_result_int\[1\]~13 32 COMB LCCOMB_X57_Y16_N22 2 " "Info: 32: + IC(0.671 ns) + CELL(0.393 ns) = 25.724 ns; Loc. = LCCOMB_X57_Y16_N22; Fanout = 2; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_6_result_int\[1\]~13'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.064 ns" { BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|StageOut[25]~1505 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_6_result_int[1]~13 } "NODE_NAME" } } { "db/alt_u_div_mve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_mve.tdf" 57 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 25.795 ns BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_6_result_int\[2\]~15 33 COMB LCCOMB_X57_Y16_N24 2 " "Info: 33: + IC(0.000 ns) + CELL(0.071 ns) = 25.795 ns; Loc. = LCCOMB_X57_Y16_N24; Fanout = 2; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_6_result_int\[2\]~15'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_6_result_int[1]~13 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_6_result_int[2]~15 } "NODE_NAME" } } { "db/alt_u_div_mve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_mve.tdf" 57 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.410 ns) 26.205 ns BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_6_result_int\[3\]~16 34 COMB LCCOMB_X57_Y16_N26 1 " "Info: 34: + IC(0.000 ns) + CELL(0.410 ns) = 26.205 ns; Loc. = LCCOMB_X57_Y16_N26; Fanout = 1; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|add_sub_6_result_int\[3\]~16'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.410 ns" { BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_6_result_int[2]~15 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_6_result_int[3]~16 } "NODE_NAME" } } { "db/alt_u_div_mve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_mve.tdf" 57 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.257 ns) + CELL(0.420 ns) 26.882 ns BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|StageOut\[33\]~1495 35 COMB LCCOMB_X57_Y16_N16 7 " "Info: 35: + IC(0.257 ns) + CELL(0.420 ns) = 26.882 ns; Loc. = LCCOMB_X57_Y16_N16; Fanout = 7; COMB Node = 'BinToDec:BTD0\|lpm_divide:Mod1\|lpm_divide_35m:auto_generated\|sign_div_unsign_akh:divider\|alt_u_div_mve:divider\|StageOut\[33\]~1495'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.677 ns" { BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_6_result_int[3]~16 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|StageOut[33]~1495 } "NODE_NAME" } } { "db/alt_u_div_mve.tdf" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/db/alt_u_div_mve.tdf" 74 10 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.682 ns) + CELL(0.420 ns) 28.984 ns DecDis:DD0\|WideOr3~17 36 COMB LCCOMB_X43_Y14_N10 1 " "Info: 36: + IC(1.682 ns) + CELL(0.420 ns) = 28.984 ns; Loc. = LCCOMB_X43_Y14_N10; Fanout = 1; COMB Node = 'DecDis:DD0\|WideOr3~17'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.102 ns" { BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|StageOut[33]~1495 DecDis:DD0|WideOr3~17 } "NODE_NAME" } } { "UnsignMulti.v" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/UnsignMulti.v" 92 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.084 ns) 29.068 ns DecDis:DD0\|HexVal\[3\] 37 REG LCFF_X43_Y14_N11 1 " "Info: 37: + IC(0.000 ns) + CELL(0.084 ns) = 29.068 ns; Loc. = LCFF_X43_Y14_N11; Fanout = 1; REG Node = 'DecDis:DD0\|HexVal\[3\]'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.084 ns" { DecDis:DD0|WideOr3~17 DecDis:DD0|HexVal[3] } "NODE_NAME" } } { "UnsignMulti.v" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/UnsignMulti.v" 92 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "12.029 ns ( 41.38 % ) " "Info: Total cell delay = 12.029 ns ( 41.38 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "17.039 ns ( 58.62 % ) " "Info: Total interconnect delay = 17.039 ns ( 58.62 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "29.068 ns" { SW[13] BinMulti:BM1|lpm_mult:Mult0|mult_lq01:auto_generated|mac_mult1~DATAOUT5 BinMulti:BM1|lpm_mult:Mult0|mult_lq01:auto_generated|result[5] BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_6_result_int[4]~21 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_6_result_int[5]~23 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_6_result_int[6]~25 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_6_result_int[7]~26 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|StageOut[50]~21 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[3]~21 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[4]~23 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[5]~25 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[6]~27 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[7]~29 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[8]~30 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|StageOut[61]~690 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_3_result_int[2]~13 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_3_result_int[3]~15 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_3_result_int[4]~16 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|StageOut[15]~1499 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[1]~13 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[2]~15 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[3]~17 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[4]~19 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[5]~20 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|StageOut[20]~1504 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[1]~13 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[2]~15 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[3]~17 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[4]~19 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[5]~20 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|StageOut[25]~1505 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_6_result_int[1]~13 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_6_result_int[2]~15 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_6_result_int[3]~16 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|StageOut[33]~1495 DecDis:DD0|WideOr3~17 DecDis:DD0|HexVal[3] } "NODE_NAME" } } { "e:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "e:/altera/72/quartus/bin/Technology_Viewer.qrui" "29.068 ns" { SW[13] {} SW[13]~combout {} BinMulti:BM1|lpm_mult:Mult0|mult_lq01:auto_generated|mac_mult1~DATAOUT5 {} BinMulti:BM1|lpm_mult:Mult0|mult_lq01:auto_generated|result[5] {} BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_6_result_int[4]~21 {} BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_6_result_int[5]~23 {} BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_6_result_int[6]~25 {} BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_6_result_int[7]~26 {} BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|StageOut[50]~21 {} BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[3]~21 {} BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[4]~23 {} BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[5]~25 {} BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[6]~27 {} BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[7]~29 {} BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[8]~30 {} BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|StageOut[61]~690 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_3_result_int[2]~13 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_3_result_int[3]~15 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_3_result_int[4]~16 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|StageOut[15]~1499 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[1]~13 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[2]~15 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[3]~17 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[4]~19 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[5]~20 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|StageOut[20]~1504 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[1]~13 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[2]~15 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[3]~17 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[4]~19 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[5]~20 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|StageOut[25]~1505 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_6_result_int[1]~13 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_6_result_int[2]~15 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_6_result_int[3]~16 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|StageOut[33]~1495 {} DecDis:DD0|WideOr3~17 {} DecDis:DD0|HexVal[3] {} } { 0.000ns 0.000ns 5.699ns 0.000ns 1.880ns 0.000ns 0.000ns 0.000ns 1.302ns 0.735ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.712ns 0.773ns 0.000ns 0.000ns 0.698ns 0.730ns 0.000ns 0.000ns 0.000ns 0.000ns 0.691ns 0.693ns 0.000ns 0.000ns 0.000ns 0.000ns 0.516ns 0.671ns 0.000ns 0.000ns 0.257ns 1.682ns 0.000ns } { 0.000ns 0.832ns 2.246ns 0.224ns 0.414ns 0.071ns 0.071ns 0.410ns 0.150ns 0.393ns 0.071ns 0.071ns 0.071ns 0.159ns 0.410ns 0.419ns 0.414ns 0.071ns 0.410ns 0.419ns 0.414ns 0.071ns 0.071ns 0.071ns 0.410ns 0.415ns 0.393ns 0.071ns 0.071ns 0.071ns 0.410ns 0.437ns 0.393ns 0.071ns 0.410ns 0.420ns 0.420ns 0.084ns } "" } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.036 ns + " "Info: + Micro setup delay of destination is -0.036 ns" { } { { "UnsignMulti.v" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/UnsignMulti.v" 92 -1 0 } } } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "KEY\[0\] destination 3.649 ns - Shortest register " "Info: - Shortest clock path from clock \"KEY\[0\]\" to destination register is 3.649 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.862 ns) 0.862 ns KEY\[0\] 1 CLK PIN_G26 52 " "Info: 1: + IC(0.000 ns) + CELL(0.862 ns) = 0.862 ns; Loc. = PIN_G26; Fanout = 52; CLK Node = 'KEY\[0\]'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { KEY[0] } "NODE_NAME" } } { "UnsignMulti.v" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/UnsignMulti.v" 7 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(2.250 ns) + CELL(0.537 ns) 3.649 ns DecDis:DD0\|HexVal\[3\] 2 REG LCFF_X43_Y14_N11 1 " "Info: 2: + IC(2.250 ns) + CELL(0.537 ns) = 3.649 ns; Loc. = LCFF_X43_Y14_N11; Fanout = 1; REG Node = 'DecDis:DD0\|HexVal\[3\]'" { } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.787 ns" { KEY[0] DecDis:DD0|HexVal[3] } "NODE_NAME" } } { "UnsignMulti.v" "" { Text "D:/PROGRAMING/fpga/UnsignMulti/UnsignMulti.v" 92 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.399 ns ( 38.34 % ) " "Info: Total cell delay = 1.399 ns ( 38.34 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.250 ns ( 61.66 % ) " "Info: Total interconnect delay = 2.250 ns ( 61.66 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.649 ns" { KEY[0] DecDis:DD0|HexVal[3] } "NODE_NAME" } } { "e:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "e:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.649 ns" { KEY[0] {} KEY[0]~combout {} DecDis:DD0|HexVal[3] {} } { 0.000ns 0.000ns 2.250ns } { 0.000ns 0.862ns 0.537ns } "" } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} } { { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "29.068 ns" { SW[13] BinMulti:BM1|lpm_mult:Mult0|mult_lq01:auto_generated|mac_mult1~DATAOUT5 BinMulti:BM1|lpm_mult:Mult0|mult_lq01:auto_generated|result[5] BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_6_result_int[4]~21 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_6_result_int[5]~23 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_6_result_int[6]~25 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_6_result_int[7]~26 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|StageOut[50]~21 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[3]~21 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[4]~23 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[5]~25 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[6]~27 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[7]~29 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[8]~30 BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|StageOut[61]~690 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_3_result_int[2]~13 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_3_result_int[3]~15 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_3_result_int[4]~16 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|StageOut[15]~1499 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[1]~13 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[2]~15 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[3]~17 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[4]~19 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[5]~20 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|StageOut[20]~1504 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[1]~13 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[2]~15 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[3]~17 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[4]~19 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[5]~20 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|StageOut[25]~1505 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_6_result_int[1]~13 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_6_result_int[2]~15 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_6_result_int[3]~16 BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|StageOut[33]~1495 DecDis:DD0|WideOr3~17 DecDis:DD0|HexVal[3] } "NODE_NAME" } } { "e:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "e:/altera/72/quartus/bin/Technology_Viewer.qrui" "29.068 ns" { SW[13] {} SW[13]~combout {} BinMulti:BM1|lpm_mult:Mult0|mult_lq01:auto_generated|mac_mult1~DATAOUT5 {} BinMulti:BM1|lpm_mult:Mult0|mult_lq01:auto_generated|result[5] {} BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_6_result_int[4]~21 {} BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_6_result_int[5]~23 {} BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_6_result_int[6]~25 {} BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_6_result_int[7]~26 {} BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|StageOut[50]~21 {} BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[3]~21 {} BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[4]~23 {} BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[5]~25 {} BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[6]~27 {} BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[7]~29 {} BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|add_sub_7_result_int[8]~30 {} BinToDec:BTD0|lpm_divide:Mod0|lpm_divide_75m:auto_generated|sign_div_unsign_ekh:divider|alt_u_div_uve:divider|StageOut[61]~690 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_3_result_int[2]~13 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_3_result_int[3]~15 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_3_result_int[4]~16 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|StageOut[15]~1499 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[1]~13 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[2]~15 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[3]~17 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[4]~19 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_4_result_int[5]~20 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|StageOut[20]~1504 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[1]~13 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[2]~15 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[3]~17 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[4]~19 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_5_result_int[5]~20 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|StageOut[25]~1505 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_6_result_int[1]~13 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_6_result_int[2]~15 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|add_sub_6_result_int[3]~16 {} BinToDec:BTD0|lpm_divide:Mod1|lpm_divide_35m:auto_generated|sign_div_unsign_akh:divider|alt_u_div_mve:divider|StageOut[33]~1495 {} DecDis:DD0|WideOr3~17 {} DecDis:DD0|HexVal[3] {} } { 0.000ns 0.000ns 5.699ns 0.000ns 1.880ns 0.000ns 0.000ns 0.000ns 1.302ns 0.735ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.712ns 0.773ns 0.000ns 0.000ns 0.698ns 0.730ns 0.000ns 0.000ns 0.000ns 0.000ns 0.691ns 0.693ns 0.000ns 0.000ns 0.000ns 0.000ns 0.516ns 0.671ns 0.000ns 0.000ns 0.257ns 1.682ns 0.000ns } { 0.000ns 0.832ns 2.246ns 0.224ns 0.414ns 0.071ns 0.071ns 0.410ns 0.150ns 0.393ns 0.071ns 0.071ns 0.071ns 0.159ns 0.410ns 0.419ns 0.414ns 0.071ns 0.410ns 0.419ns 0.414ns 0.071ns 0.071ns 0.071ns 0.410ns 0.415ns 0.393ns 0.071ns 0.071ns 0.071ns 0.410ns 0.437ns 0.393ns 0.071ns 0.410ns 0.420ns 0.420ns 0.084ns } "" } } { "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.649 ns" { KEY[0] DecDis:DD0|HexVal[3] } "NODE_NAME" } } { "e:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "e:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.649 ns" { KEY[0] {} KEY[0]~combout {} DecDis:DD0|HexVal[3] {} } { 0.000ns 0.000ns 2.250ns } { 0.000ns 0.862ns 0.537ns } "" } } } 0 0 "tsu for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0 "" 0}
?? 快捷鍵說(shuō)明
復(fù)制代碼
Ctrl + C
搜索代碼
Ctrl + F
全屏模式
F11
切換主題
Ctrl + Shift + D
顯示快捷鍵
?
增大字號(hào)
Ctrl + =
減小字號(hào)
Ctrl + -