mov		a, pr1+4
		call	WriteIND
		mov		pr0, pr0
		jbs		r3, zflag
		jmp		rshimid_write1
		mov		pr0+1, pr0+1
		jbc		r3, zflag
		dec		pr0+2
		dec		pr0+1
	rshimid_write1:
		dec		pr0
		mov		a, pr1+3
		call	WriteIND
		mov		pr0, pr0
		jbs		r3, zflag
		jmp		rshimid_write2
		mov		pr0+1, pr0+1
		jbc		r3, zflag
		dec		pr0+2
		dec		pr0+1
	rshimid_write2:
		dec		pr0
		mov		a, pr1+2
		call	WriteIND
		mov		pr0, pr0
		jbs		r3, zflag
		jmp		rshimid_write3
		mov		pr0+1, pr0+1
		jbc		r3, zflag
		dec		pr0+2
		dec		pr0+1
	rshimid_write3:
		dec		pr0
		mov		a, pr1+1
		call	WriteIND
		jmp		rshimid_end
		
	rshimid_clear:
		mov		a, @.B2.(addr)
		mov		pr0+2, a
		mov		a, @.B1.(addr)
		mov		pr0+1, a
		mov		a, @.B0.(addr)
		add		a, @3
		mov		pr0, a
		jbs		r3, cflag
		jmp		rshimid_clear1
		inc		pr0+1
		jbc		r3, zflag
		inc		pr0+2
	rshimid_clear1:
		call	ReadIND
		mov		pr1+2, a
		jbc		pr1+2, 7
		jmp		rshimid_symbol
		mov		a, @0
		call	WriteIND
		mov		pr0, pr0
		jbs		r3, zflag
		jmp		rshimid_clear2
		mov		pr0+1, pr0+1
		jbc		r3, zflag
		dec		pr0+2
		dec		pr0+1
	rshimid_clear2:
		dec		pr0
		call	WriteIND
		mov		pr0, pr0
		jbs		r3, zflag
		jmp		rshimid_clear3
		mov		pr0+1, pr0+1
		jbc		r3, zflag
		dec		pr0+2
		dec		pr0+1
	rshimid_clear3:
		dec		pr0
		call	WriteIND
		mov		pr0, pr0
		jbs		r3, zflag
		jmp		rshimid_clear4
		mov		pr0+1, pr0+1
		jbc		r3, zflag
		dec		pr0+2
		dec		pr0+1
	rshimid_clear4:
		dec		pr0
		call	WriteIND
		jmp	rshimid_end
	rshimid_symbol:
		mov	a, @0xff
		call	WriteIND
		mov		pr0, pr0
		jbs		r3, zflag
		jmp		rshimid_symbol1
		mov		pr0+1, pr0+1
		jbc		r3, zflag
		dec		pr0+2
		dec		pr0+1
	rshimid_symbol1:
		dec		pr0
		call	WriteIND
		mov		pr0, pr0
		jbs		r3, zflag
		jmp		rshimid_symbol2
		mov		pr0+1, pr0+1
		jbc		r3, zflag
		dec		pr0+2
		dec		pr0+1
	rshimid_symbol2:
		dec		pr0
		call	WriteIND
		mov		pr0, pr0
		jbs		r3, zflag
		jmp		rshimid_symbol3
		mov		pr0+1, pr0+1
		jbc		r3, zflag
		dec		pr0+2
		dec		pr0+1
	rshimid_symbol3:
		dec		pr0
		call	WriteIND
	.ENDIF	
rshimid_end:
.ENDM

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.MACRO	RSHUMIB addr,imm,access
.local	rshumib_end
.local	rshumib_loop
	mov	a, @imm
	mov	pr1, a
	mov	pr1, pr1
	jbc	r3, zflag
	jmp	rshumib_end
	
	;RAM
	.IF	access = 0
	rshumib_loop:
		bc	r3, cflag
		rrc	addr
	
		djz	pr1
		jmp	rshumib_loop
	.ENDIF

	;ROM
	.IF access = 1
		ERROR "Can't write to ROM data"
	.ENDIF

	; IO
	.IF access = 2
		ior	addr
		mov	pr0, a
	rshumib_loop:
		bc	r3, cflag
		rrc	pr0

		djz	pr1
		jmp	rshumib_loop
		
		mov	a, pr0
		iow	addr
	.ENDIF

	;IND
	.IF	access = 3
		mov		a, @.B0.(addr)
		mov		pr0, a
		mov		a, @.B1.(addr)
		mov		pr0+1, a
		mov		a, @.B2.(addr)
		mov		pr0+2, a
		call	ReadIND
		mov		pr1+1, a
	rshumib_loop:
		bc	r3, cflag
		rrc	pr1+1
	
		djz	pr1
		jmp	rshumib_loop
		mov	a, pr1+1
		call	WriteIND
	.ENDIF	
rshumib_end:	
.ENDM

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.MACRO	RSHUMIW addr,imm,access
.local	rshumiw_clear
.local	rshumiw_clear1
.local	rshumiw_end
.local	rshumiw_loop
.local	rshumiw_read
.local	rshumiw_write

	mov	a, @.B1.imm
	mov	pr1, a
	mov	pr1, pr1
	jbs	r3, zflag
	jmp	rshumiw_clear

	mov	a, @.B0.imm
	mov	pr1, a
	mov	pr1, pr1
	jbc	r3, zflag
	jmp	rshumiw_end

	;RAM
	.IF	access = 0
	rshumiw_loop:
		bc	r3, cflag
		rrc	addr+1
		rrc	addr
	
		djz	pr1
		jmp	rshumiw_loop
		jmp	rshumiw_end
		
	rshumiw_clear:
		clr addr
		clr	addr+1		
	.ENDIF

	;ROM
	.IF access = 1
		ERROR "Can't write to ROM data"
	.ENDIF

	; IO
	.IF access = 2
		ior	addr
		mov	pr1+1, a
		ior	addr+1
		mov	pr1+2, a
	rshumiw_loop:
		bc	r3, cflag
		rrc	pr1+2
		rrc	pr1+1

		djz	pr1
		jmp	rshumiw_loop
		
		mov	a, pr1+1
		iow	addr
		mov	a, pr1+2
		iow	addr+1
		jmp	rshumiw_end

	rshumiw_clear:
		mov	a, @0
		iow	addr
		iow	addr+1
	.ENDIF

	;IND
	.IF	access = 3
		mov		a, @.B0.(addr)
		mov		pr0, a
		mov		a, @.B1.(addr)
		mov		pr0+1, a
		mov		a, @.B2.(addr)
		mov		pr0+2, a
		call	ReadIND
		mov		pr1+1, a
		inc		pr0
		jbs		r3, zflag
		jmp		rshumiw_read
		inc		pr0+1
		jbc		r3, zflag
		inc		pr0+2
	rshumiw_read:
		call	ReadIND
		mov		pr1+2, a
	rshumiw_loop:
		bc		r3, cflag
		rrc		pr1+2
		rrc		pr1+1
            	
		djz		pr1
		jmp		rshumiw_loop

		mov		a, pr1+2
		call	WriteIND
		mov		pr0, pr0
		jbs		r3, zflag
		jmp		rshumiw_write
		mov		pr0+1, pr0+1
		jbc		r3, zflag
		dec		pr0+2, pr0+2
		dec		pr0+1
	rshumiw_write:
		dec		pr0
		mov		a, pr1+1
		call	WriteIND
		jmp	rshumiw_end

	rshumiw_clear:
		mov		a, @.B0.(addr)
		mov		pr0, a
		mov		a, @.B1.(addr)
		mov		pr0+1, a
		mov		a, @.B2.(addr)
		mov		pr0+2, a
		mov		a, @0
		call	WriteIND
		inc		pr0
		jbs		r3, zflag
		jmp		rshumiw_clear1
		inc		pr0+1
		jbc		r3, zflag
		inc		pr0+2
	rshumiw_clear1:
		call	WriteIND
	.ENDIF	
rshumiw_end:
.ENDM

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.MACRO	RSHUMID addr,imm,access
.local	rshumid_clear
.local	rshumid_clear1
.local	rshumid_clear2
.local	rshumid_clear3
.local	rshumid_read1
.local	rshumid_read2
.local	rshumid_read3
.local	rshumid_write1
.local	rshumid_write2
.local	rshumid_write3
.local	rshumid_end
.local	rshumid_loop

	mov	a, @.B3.imm
	mov	pr1, a
	mov	pr1, pr1
	jbs	r3, zflag
	jmp	rshumid_clear

	mov	a, @.B2.imm
	mov	pr1, a
	mov	pr1, pr1
	jbs	r3, zflag
	jmp	rshumid_clear

	mov	a, @.B1.imm
	mov	pr1, a
	mov	pr1, pr1
	jbs	r3, zflag
	jmp	rshumid_clear

	mov	a, @.B0.imm
	mov	pr1, a
	mov	pr1, pr1
	jbc	r3, zflag
	jmp	rshumid_end

	;RAM
	.IF	access = 0
	rshumid_loop:
		bc	r3, cflag
		rrc	addr+3
		rrc	addr+2
		rrc	addr+1
		rrc	addr
	
		djz	pr1
		jmp	rshumid_loop
		jmp	rshumid_end
		
	rshumid_clear:
		clr addr
		clr	addr+1		
		clr	addr+2
		clr	addr+3
	.ENDIF

	;ROM
	.IF access = 1
		ERROR "Can't write to ROM data"
	.ENDIF

	; IO
	.IF access = 2
		ior	addr
		mov	pr1+1, a
		ior	addr+1
		mov	pr1+2, a
		ior	addr+2
		mov	pr1+3, a
		ior	addr+3
		mov	pr1+4, a
	rshumid_loop:
		bc	r3, cflag
		rrc	pr1+4
		rrc	pr1+3
		rrc	pr1+2
		rrc	pr1+1

		djz	pr1
		jmp	rshumid_loop
		
		mov	a, pr1+1
		iow	addr
		mov	a, pr1+2
		iow	addr+1
		mov	a, pr1+3
		iow	addr+2
		mov	a, pr1+4
		iow	addr+3
		jmp	rshumid_end

	rshumid_clear:
		mov	a, @0
		iow	addr
		iow	addr+1
		iow	addr+2
		iow	addr+3
	.ENDIF

	;IND
	.IF	access = 3
		mov		a, @.B0.(addr)
		mov		pr0, a
		mov		a, @.B1.(addr)
		mov		pr0+1, a
		mov		a, @.B2.(addr)
		mov		pr0+2, a
		call	ReadIND
		mov		pr1+1, a
		inc		pr0
		jbs		r3, zflag
		jmp		rshumid_read1
		inc		pr0+1
		jbc		r3, zflag
		inc		pr0+2
	rshumid_read1:
		call	ReadIND
		mov		pr1+2, a
		inc		pr0
		jbs		r3, zflag
		jmp		rshumid_read2
		inc		pr0+1
		jbc		r3, zflag
		inc		pr0+2
	rshumid_read2:
		call	ReadIND
		mov		pr1+3, a
		inc		pr0
		jbs		r3, zflag
		jmp		rshumid_read3
		inc		pr0+1
		jbc		r3, zflag
		inc		pr0+2
	rshumid_read3:
		call	ReadIND
		mov		pr1+4, a
	rshumid_loop:
		bc		r3, cflag
		rrc		pr1+4
		rrc		pr1+3
		rrc		pr1+2
		rrc		pr1+1
            	
		djz		pr1
		jmp		rshumid_loop

		mov		a, pr1+4
		call	WriteIND
		mov		pr0, pr0
		jbs		r3, zflag
		jmp		rshumid_write1
		mov		pr0+1, pr0+1
		jbc		r3, zflag
		dec		pr0+2
		dec		pr0+1
	rshumid_write1:
		dec		pr0
		mov		a, pr1+3
		call	WriteIND
		mov		pr0, pr0
		jbs		r3, zflag
		jmp		rshumid_write2
		mov		pr0+1, pr0+1
		jbc		r3, zflag
		dec		pr0+2
		dec		pr0+1
	rshumid_write2:
		dec		pr0
		mov		a, pr1+2
		call	WriteIND
		mov		pr0, pr0
		jbs		r3, zflag
		jmp		rshumid_write3
		mov		pr0+1, pr0+1
		jbc		r3, zflag
		dec		pr0+2
		dec		pr0+1
	rshumid_write3:
		dec		pr0
		mov		a, pr1+1
		call	WriteIND
		jmp		rshumid_end
		
	rshumid_clear:
		mov		a, @.B0.(addr)
		mov		pr0, a
		mov		a, @.B1.(addr)
		mov		pr0+1, a
		mov		a, @.B2.(addr)
		mov		pr0+2, a
		call	ReadIND
		mov		a, @0
		call	WriteIND
		inc		pr0
		jbs		r3, zflag
		jmp		rshumid_clear1
		inc		pr0+1
		jbc		r3, zflag
		inc		pr0+2
	rshumid_clear1:
		call	WriteIND
		inc		pr0
		jbs		r3, zflag
		jmp		rshumid_clear2
		inc		pr0+1
		jbc		r3, zflag
		inc		pr0+2
	rshumid_clear2:
		call	WriteIND
		inc		pr0
		jbs		r3, zflag
		jmp		rshumid_clear3
		inc		pr0+1
		jbc		r3, zflag
		inc		pr0+2
	rshumid_clear3:
		call	WriteIND
	.ENDIF	
rshumid_end:
.ENDM

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.MACRO	ICMPRRB reg1, reg2
.local	icmprrb_end
.local	icmprrb_not_same

	mov	a, reg1
	mov pr1, a
	mov pr1+1, a
	mov a, reg2

	xor	pr1, a
	jbc	pr1, 7
	jmp	icmprrb_not_same
	sub	pr1+1, a	
	jmp	icmprrb_end

icmprrb_not_same:
	bc	r3,zflag
	bs	r3, cflag
	jbc	pr1+1, 7
	bc	r3, cflag
icmprrb_end:	
.ENDM

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	
.MACRO	ICMPRRW reg1, reg2	
.local	icmprrw_not_same
.local	icmprrw_end

	mov a, reg1
	mov	pr1, a
	mov a, reg1+1
	mov	pr1+1, a

	xor	a, reg2+1
	mov	pr0, a
	jbc	pr0, 7
	jmp	icmprrw_not_same

	mov	a, reg2+1
	sub	pr1+1,a
	jbs	r3, zflag
	jmp	icmprrw_end

	mov	a, reg2
	sub	pr1,a
	jmp	icmprrw_end

icmprrw_not_same:	
	bc	r3,zflag
	bs	r3, cflag
	jbc	pr1+3, 7
	bc	r3, cflag
icmprrw_end:
.ENDM

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	
.MACRO	ICMPRRD reg1, reg2	
.local	icmprrd_not_same
.local	icmprrd_end

	mov	a, reg2+3
	mov	pr1, a
	
	mov	a, reg1+3
	xor	pr1, a
	jbc	pr1, 7
	jmp	icmprrd_not_same

    mov a, reg1+3
    mov pr1+3, a
    mov a, reg1+2
    mov pr1+2, a
    mov a, reg1+1
    mov pr1+1, a
    mov a, reg1
    mov pr1, a


	mov	a, reg2+3
	sub	pr1+3, a
	jbs	r3, zflag
	jmp	icmprrd_end
	
	mov	a, reg2+2
	sub	pr1+2, a
	jbs	r3, zflag
	jmp	icmprrd_end

	mov	a, reg2+1
	sub	pr1+1, a
	jbs	r3, zflag
	jmp	icmprrd_end

	mov	a, reg2
	sub	pr1, a
	jmp	icmprrd_end

icmprrd_not_same:	
	bc	r3,zflag
	bs	r3, cflag
	jbc	reg1+3, 7
	bc	r3, cflag
icmprrd_end:	
.ENDM

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.MACRO	UCMPRRB reg1, reg2
	mov	a, reg1
	mov pr1, a
	mov a, reg2

	sub	pr1, a	
.ENDM

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.MACRO	UCMPRRW reg1, reg2
.local	ucmprrw_end

    mov a, reg1+1
    mov pr1+1, a
	mov	a, reg2+1
	sub	pr1+1, a
	jbs	r3, zflag
	jmp	ucmprrw_end

    mov a, reg1
    mov pr1, a
	mov	a, reg2
	sub	pr1, a
	jmp	ucmprrw_end
ucmprrw_end:
.ENDM

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.MACRO	UCMPRRD reg1, reg2
.local	ucmprrd_end

    mov a, reg1+3
    mov pr1, a
	mov	a, reg2+3
	sub	pr1, a
	jbs	r3, zflag
	jmp	ucmprrd_end

    mov a, reg1+2
    mov pr1, a
	mov	a, reg2+2
	sub	pr1, a
	jbs	r3, zflag
	jmp	ucmprrd_end

    mov a, reg1+1
    mov pr1, a
	mov	a, reg2+1
	sub	pr1, a
	jbs	r3, zflag
	jmp	ucmprrd_end

    mov a, reg1
    mov pr1, a
	mov	a, reg2
	sub	pr1, a

ucmprrd_end:	
.ENDM

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.MACRO	ICMPRIB reg, imm
.local	icmprib_not_same
.local	icmprib_end

	mov	a, reg
	mov pr1, a
	mov	pr1+1, a
	
	mov	a, @imm
	xor	pr1, a
	jbc	pr1, 7
	jmp	icmprib_not_same
	sub	pr1+1, a	
	jmp	icmprib_end

icmprib_not_same:
	bc	r3,zflag
	bs	r3, cflag
	jbc	pr1+1, 7
	bc	r3, cflag
icmprib_end:	
.ENDM

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.MACRO	ICMPRIW reg1, imm
.local	icmpriw_not_same
.local	icmpriw_end

	mov a, reg1+1
	xor	a, @.B1.imm
	mov	pr0, a
	mov pr1+1, a
	jbc	pr0, 7
	jmp	icmpriw_not_same

    mov a, reg1+1
    mov pr1, a
	mov	a, @.B1.imm
	sub	pr1, a
	jbs	r3, zflag
	jmp	icmpriw_end
	
    mov a, reg1
    mov pr1, a
	mov	a, @.B0.imm
	sub	pr1, a
	jmp	icmpriw_end

icmpriw_not_same:	
	bc	r3,zflag
	bs	r3, cflag
	jbc	pr1+1, 7
	bc	r3, cflag
icmpriw_end:
.ENDM

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.MACRO	ICMPRID reg1, imm
.LOCAL	icmprid_not_same
.LOCAL	icmprid_end

	mov	a, @.B3.imm
	mov	pr1, a
	
	mov	a, reg1+3
	xor	pr1, a
	jbc	pr1, 7
	jmp	icmprid_not_same
	
	mov a, reg1+3
	mov pr1, a
	mov	a, @.B3.imm
	sub	pr1, a
	jbs	r3, zflag		; is zero?
	jmp	icmprid_end

	mov a, reg1+2
	mov pr1, a
	mov	a, @.B2.imm
	sub	pr1, a
	jbs	r3, zflag
	jmp	icmprid_end
	
	mov a, reg1+1
	mov pr1, a
    mov	a, @.B1.imm
	sub	pr1, a
	jbs	r3, zflag
	jmp	icmprid_end
	
	mov a, reg1
	mov pr1, a
    mov	a, @.B0.imm
	sub	pr1, a
	jmp	icmprid_end

icmprid_not_same:	
	bc	r3,zflag
	bs	r3, cflag
	jbc	reg1+3, 7
	bc	r3, cflag
icmprid_end:	
.ENDM

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.MACRO	UCMPRIB reg, imm
	;RAM
	mov	a, @imm
	sub	a, reg
.ENDM

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.MACRO	UCMPRIW reg1, imm
.local	ucmpriw_end