# Copyright (C) 1991-2006 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		qiangdaqi_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY ACEX1K
set_global_assignment -name DEVICE "EP1K30TC144-3"
set_global_assignment -name TOP_LEVEL_ENTITY qiangdaqi
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "5.1 SP2"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "11:36:57  JUNE 27, 2008"
set_global_assignment -name LAST_QUARTUS_VERSION 8.0
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
set_location_assignment PIN_54 -to clk
set_location_assignment PIN_128 -to clr
set_location_assignment PIN_8 -to data[0]
set_location_assignment PIN_9 -to data[1]
set_location_assignment PIN_10 -to data[2]
set_location_assignment PIN_12 -to data[3]
set_location_assignment PIN_13 -to data[4]
set_location_assignment PIN_17 -to data[5]
set_location_assignment PIN_18 -to data[6]
set_location_assignment PIN_19 -to data[7]
set_location_assignment PIN_41 -to q1[0]
set_location_assignment PIN_42 -to q1[1]
set_location_assignment PIN_65 -to q1[2]
set_location_assignment PIN_67 -to q1[3]
set_location_assignment PIN_68 -to q2[0]
set_location_assignment PIN_69 -to q2[1]
set_location_assignment PIN_70 -to q2[2]
set_location_assignment PIN_72 -to q2[3]
set_location_assignment PIN_87 -to q3[0]
set_location_assignment PIN_88 -to q3[1]
set_location_assignment PIN_89 -to q3[2]
set_location_assignment PIN_90 -to q3[3]
set_location_assignment PIN_99 -to ring
set_location_assignment PIN_131 -to sel
set_location_assignment PIN_56 -to clk2
set_location_assignment PIN_23 -to qh[1]
set_location_assignment PIN_22 -to qh[0]
set_location_assignment PIN_60 -to din
set_location_assignment PIN_29 -to t3
set_global_assignment -name VHDL_FILE cnt10.vhd
set_global_assignment -name VHDL_FILE qiangda.vhd
set_global_assignment -name VHDL_FILE qiangdaqi.vhd
set_global_assignment -name VHDL_FILE sel0.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE qiangdaqi.vwf
set_location_assignment PIN_49 -to star
set_location_assignment PIN_20 -to t4