#define rALMMON         (*(volatile unsigned char *)0x1d70067)
#define rALMYEAR        (*(volatile unsigned char *)0x1d7006b)
#define rRTCRST         (*(volatile unsigned char *)0x1d7006f)
#define rBCDSEC         (*(volatile unsigned char *)0x1d70073)
#define rBCDMIN         (*(volatile unsigned char *)0x1d70077)
#define rBCDHOUR        (*(volatile unsigned char *)0x1d7007b)
#define rBCDDAY         (*(volatile unsigned char *)0x1d7007f)
#define rBCDDATE        (*(volatile unsigned char *)0x1d70083)
#define rBCDMON         (*(volatile unsigned char *)0x1d70087)
#define rBCDYEAR        (*(volatile unsigned char *)0x1d7008b)
#define rTICINT         (*(volatile unsigned char *)0x1d7008e)
#else
#define rRTCCON         (*(volatile unsigned char *)0x1d70040)
#define rRTCALM         (*(volatile unsigned char *)0x1d70050)
#define rALMSEC         (*(volatile unsigned char *)0x1d70054)
#define rALMMIN         (*(volatile unsigned char *)0x1d70058)
#define rALMHOUR        (*(volatile unsigned char *)0x1d7005c)
#define rALMDAY         (*(volatile unsigned char *)0x1d70060)
#define rALMMON         (*(volatile unsigned char *)0x1d70064)
#define rALMYEAR        (*(volatile unsigned char *)0x1d70068)
#define rRTCRST         (*(volatile unsigned char *)0x1d7006c)
#define rBCDSEC         (*(volatile unsigned char *)0x1d70070)
#define rBCDMIN         (*(volatile unsigned char *)0x1d70074)
#define rBCDHOUR        (*(volatile unsigned char *)0x1d70078)
#define rBCDDAY         (*(volatile unsigned char *)0x1d7007c)
#define rBCDDATE        (*(volatile unsigned char *)0x1d70080)
#define rBCDMON         (*(volatile unsigned char *)0x1d70084)
#define rBCDYEAR        (*(volatile unsigned char *)0x1d70088)
#define rTICNT         (*(volatile unsigned char *)0x1d7008c)
#endif

/* Clock & Power management */
#define rPLLCON		(*(volatile unsigned *)0x1d80000)
#define rCLKCON		(*(volatile unsigned *)0x1d80004)
#define rCLKSLOW	(*(volatile unsigned *)0x1d80008)
#define rLOCKTIME	(*(volatile unsigned *)0x1d8000c)

/* INTERRUPT */
#define rINTCON		(*(volatile unsigned *)0x1e00000)
#define rINTPND		(*(volatile unsigned *)0x1e00004)
#define rINTMOD		(*(volatile unsigned *)0x1e00008)
#define rINTMSK		(*(volatile unsigned *)0x1e0000c)

#define rI_PSLV		(*(volatile unsigned *)0x1e00010)
#define rI_PMST		(*(volatile unsigned *)0x1e00014)
#define rI_CSLV		(*(volatile unsigned *)0x1e00018)
#define rI_CMST		(*(volatile unsigned *)0x1e0001c)
#define rI_ISPR		(*(volatile unsigned *)0x1e00020)
#define rI_ISPC		(*(volatile unsigned *)0x1e00024)

#define rF_ISPR		(*(volatile unsigned *)0x1e00038)
#define rF_ISPC		(*(volatile unsigned *)0x1e0003c)

/* LCD */
#define rLCDCON1	(*(volatile unsigned *)0x1f00000)
#define rLCDCON2	(*(volatile unsigned *)0x1f00004)
#define rLCDCON3	(*(volatile unsigned *)0x1f00040)
#define rLCDSADDR1	(*(volatile unsigned *)0x1f00008)
#define rLCDSADDR2	(*(volatile unsigned *)0x1f0000c)
#define rLCDSADDR3	(*(volatile unsigned *)0x1f00010)
#define rREDLUT		(*(volatile unsigned *)0x1f00014)
#define rGREENLUT	(*(volatile unsigned *)0x1f00018)
#define rBLUELUT	(*(volatile unsigned *)0x1f0001c)
#define rDP1_2		(*(volatile unsigned *)0x1f00020)
#define rDP4_7		(*(volatile unsigned *)0x1f00024)
#define rDP3_5		(*(volatile unsigned *)0x1f00028)
#define rDP2_3		(*(volatile unsigned *)0x1f0002c)
#define rDP5_7		(*(volatile unsigned *)0x1f00030)
#define rDP3_4		(*(volatile unsigned *)0x1f00034)
#define rDP4_5		(*(volatile unsigned *)0x1f00038)
#define rDP6_7		(*(volatile unsigned *)0x1f0003c)
#define rDITHMODE	(*(volatile unsigned *)0x1f00044)

/* ZDMA0 */
#define rZDCON0		(*(volatile unsigned *)0x1e80000)
#define rZDISRC0	(*(volatile unsigned *)0x1e80004)
#define rZDIDES0	(*(volatile unsigned *)0x1e80008)
#define rZDICNT0	(*(volatile unsigned *)0x1e8000c)
#define rZDCSRC0	(*(volatile unsigned *)0x1e80010)
#define rZDCDES0	(*(volatile unsigned *)0x1e80014)
#define rZDCCNT0	(*(volatile unsigned *)0x1e80018)

/* ZDMA1 */
#define rZDCON1		(*(volatile unsigned *)0x1e80020)
#define rZDISRC1	(*(volatile unsigned *)0x1e80024)
#define rZDIDES1	(*(volatile unsigned *)0x1e80028)
#define rZDICNT1	(*(volatile unsigned *)0x1e8002c)
#define rZDCSRC1	(*(volatile unsigned *)0x1e80030)
#define rZDCDES1	(*(volatile unsigned *)0x1e80034)
#define rZDCCNT1	(*(volatile unsigned *)0x1e80038)

/* BDMA0 */
#define rBDCON0		(*(volatile unsigned *)0x1f80000)
#define rBDISRC0	(*(volatile unsigned *)0x1f80004)
#define rBDIDES0	(*(volatile unsigned *)0x1f80008)
#define rBDICNT0	(*(volatile unsigned *)0x1f8000c)
#define rBDCSRC0	(*(volatile unsigned *)0x1f80010)
#define rBDCDES0	(*(volatile unsigned *)0x1f80014)
#define rBDCCNT0	(*(volatile unsigned *)0x1f80018)

/* BDMA1 */
#define rBDCON1		(*(volatile unsigned *)0x1f80020)
#define rBDISRC1	(*(volatile unsigned *)0x1f80024)
#define rBDIDES1	(*(volatile unsigned *)0x1f80028)
#define rBDICNT1	(*(volatile unsigned *)0x1f8002c)
#define rBDCSRC1	(*(volatile unsigned *)0x1f80030)
#define rBDCDES1	(*(volatile unsigned *)0x1f80034)
#define rBDCCNT1	(*(volatile unsigned *)0x1f80038)

/* ISR */

#define _ISR_STARTADDRESS     0xc1fff00

#define pISR_RESET	(*(unsigned *)(_ISR_STARTADDRESS+0x0))
#define pISR_UNDEF	(*(unsigned *)(_ISR_STARTADDRESS+0x4))
#define pISR_SWI	(*(unsigned *)(_ISR_STARTADDRESS+0x8))
#define pISR_PABORT	(*(unsigned *)(_ISR_STARTADDRESS+0xc))
#define pISR_DABORT	(*(unsigned *)(_ISR_STARTADDRESS+0x10))
#define pISR_RESERVED	(*(unsigned *)(_ISR_STARTADDRESS+0x14))
#define pISR_IRQ	(*(unsigned *)(_ISR_STARTADDRESS+0x18))
#define pISR_FIQ	(*(unsigned *)(_ISR_STARTADDRESS+0x1c))

#define pISR_ADC	(*(unsigned *)(_ISR_STARTADDRESS+0x20))
#define pISR_RTC	(*(unsigned *)(_ISR_STARTADDRESS+0x24))
#define pISR_UTXD1	(*(unsigned *)(_ISR_STARTADDRESS+0x28))
#define pISR_UTXD0	(*(unsigned *)(_ISR_STARTADDRESS+0x2c))
#define pISR_SIO	(*(unsigned *)(_ISR_STARTADDRESS+0x30))
#define pISR_IIC	(*(unsigned *)(_ISR_STARTADDRESS+0x34))
#define pISR_URXD1	(*(unsigned *)(_ISR_STARTADDRESS+0x38))
#define pISR_URXD0	(*(unsigned *)(_ISR_STARTADDRESS+0x3c))
#define pISR_TIMER5	(*(unsigned *)(_ISR_STARTADDRESS+0x40))
#define pISR_TIMER4	(*(unsigned *)(_ISR_STARTADDRESS+0x44))
#define pISR_TIMER3	(*(unsigned *)(_ISR_STARTADDRESS+0x48))
#define pISR_TIMER2	(*(unsigned *)(_ISR_STARTADDRESS+0x4c))
#define pISR_TIMER1	(*(unsigned *)(_ISR_STARTADDRESS+0x50))
#define pISR_TIMER0	(*(unsigned *)(_ISR_STARTADDRESS+0x54))
#define pISR_UERR01	(*(unsigned *)(_ISR_STARTADDRESS+0x58))
#define pISR_WDT	(*(unsigned *)(_ISR_STARTADDRESS+0x5c))
#define pISR_BDMA1	(*(unsigned *)(_ISR_STARTADDRESS+0x60))
#define pISR_BDMA0	(*(unsigned *)(_ISR_STARTADDRESS+0x64))
#define pISR_ZDMA1	(*(unsigned *)(_ISR_STARTADDRESS+0x68))
#define pISR_ZDMA0	(*(unsigned *)(_ISR_STARTADDRESS+0x6c))
#define pISR_TICK	(*(unsigned *)(_ISR_STARTADDRESS+0x70))
#define pISR_EINT4567	(*(unsigned *)(_ISR_STARTADDRESS+0x74))
#define pISR_EINT3	(*(unsigned *)(_ISR_STARTADDRESS+0x78))
#define pISR_EINT2	(*(unsigned *)(_ISR_STARTADDRESS+0x7c))
#define pISR_EINT1	(*(unsigned *)(_ISR_STARTADDRESS+0x80))
#define pISR_EINT0	(*(unsigned *)(_ISR_STARTADDRESS+0x84))

/* PENDING BIT */
//CAUTION:You must clear the pending bit as general special register.
//        it's different way with KS32C6x00 
#define BIT_ADC		(0x1)
#define BIT_RTC		(0x1<<1)
#define BIT_UTXD1	(0x1<<2)
#define BIT_UTXD0	(0x1<<3)
#define BIT_SIO		(0x1<<4)
#define BIT_IIC		(0x1<<5)
#define BIT_URXD1	(0x1<<6)
#define BIT_URXD0	(0x1<<7)
#define BIT_TIMER5	(0x1<<8)
#define BIT_TIMER4	(0x1<<9)
#define BIT_TIMER3	(0x1<<10)
#define BIT_TIMER2	(0x1<<11)
#define BIT_TIMER1	(0x1<<12)
#define BIT_TIMER0	(0x1<<13)
#define BIT_UERR01	(0x1<<14)
#define BIT_WDT		(0x1<<15)
#define BIT_BDMA1	(0x1<<16)
#define BIT_BDMA0	(0x1<<17)
#define BIT_ZDMA1	(0x1<<18)
#define BIT_ZDMA0	(0x1<<19)
#define BIT_TICK	(0x1<<20)
#define BIT_EINT4567	(0x1<<21)
#define BIT_EINT3	(0x1<<22)
#define BIT_EINT2	(0x1<<23)
#define BIT_EINT1	(0x1<<24)
#define BIT_EINT0	(0x1<<25)
#define BIT_GLOBAL	(0x1<<26)

#ifdef __cplusplus
}
#endif
#endif /*__41000_H___*/