?? isd51.lst
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271
272 ;------------------------------------------------------------------------------
273 ;----------------- !!! Do not modify code sections below !!! ------------------
274 ;------------------------------------------------------------------------------
275
276 NAME ISD51_CONFIGURATION
277
278
279 SBYTE MACRO ; Transmit Byte in ACC via serial UART
280 JNB_TI $
281 CLR_TI
282 WR_SBUF ; MOV SBUF,A
283 ENDM
284
285 RBYTE MACRO ; Read one Byte from serial UART to ACC
286 RD_SBUF ; MOV A,SBUF
287 CLR_RI
288 ENDM
289
290 GBYTE MACRO ; Receive one Character from 8051 Serial Interface
291 JNB_RI $
292 RBYTE
293 ENDM
294
295
296
0080 297 sfr P0 = 0x80;
0090 298 sfr P1 = 0x90;
00A0 299 sfr P2 = 0xA0;
00B0 300 sfr P3 = 0xB0;
00D0 301 sfr PSW = 0xD0;
00E0 302 sfr ACC = 0xE0;
00F0 303 sfr B = 0xF0;
0081 304 sfr SP = 0x81;
0082 305 sfr DPL = 0x82;
0083 306 sfr DPH = 0x83;
008E 307 sfr AUXR = 0x8E;
00E4 308 sfr PH_FMCON = 0xE4; // for Philips LPC900 devices
00E6 309 sfr PH_FMADRL = 0xE6; // for Philips LPC900 devices
310
311
00FF 312 ?ISD?RAMTOP EQU 0x100-1
0000 313 ?ISD?CMP_S EQU 0x0
FFFF 314 ?ISD?CMP_E EQU 0xFFFF
315
316 EXTRN NUMBER (?ISD?CORE)
317
318 PUBLIC ?ISD?RAMTOP
319 PUBLIC ?ISD?RESTART
320 PUBLIC ?ISD?CMDLOOP
321 PUBLIC ?ISD?GETBYTE
322 PUBLIC ?ISD?SENDBYTE
A51 MACRO ASSEMBLER ISD51 09/27/2006 15:13:06 PAGE 6
323 PUBLIC ?ISD?READSFR00
324 PUBLIC ?ISD?READSFR01
325 PUBLIC ?ISD?READSFR02
326 PUBLIC ?ISD?READSFR03
327 PUBLIC ?ISD?READSFR04
328 PUBLIC ?ISD?READSFR05
329 PUBLIC ?ISD?READSFR06
330 PUBLIC ?ISD?READSFR07
331 PUBLIC ?ISD?READSFR08
332 PUBLIC ?ISD?READSFR09
333 PUBLIC ?ISD?READSFR10
334 PUBLIC ?ISD?READSFR11
335 PUBLIC ?ISD?READSFR12
336 PUBLIC ?ISD?READSFR13
337 PUBLIC ?ISD?READSFR14
338 PUBLIC ?ISD?READSFR15
339 PUBLIC ?ISD?READSFR16
340 PUBLIC ?ISD?READSFR17
341 PUBLIC ?ISD?READSFR18
342 PUBLIC ?ISD?WRITESFR00
343 PUBLIC ?ISD?WRITESFR01
344 PUBLIC ?ISD?WRITESFR02
345 PUBLIC ?ISD?WRITESFR03
346
350 PUBLIC ?ISD?VERSION
351 PUBLIC ?ISD?CMP_S
352 PUBLIC ?ISD?CMP_E
353 PUBLIC __isd_init
354
355
356 PUBLIC ?ISD?CBLK_SIZE ; block size for FLASH IAP Routine
357
0000 358 ?ISD?CBLK_SIZE EQU 0
0010 359 CBLK EQU 10H ; Start address for FLASH buffer
360
00CD 361 ?ISD?VERSION EQU 205 ; Version 2.05
362
368
369
370 ?PR?ISD51 SEGMENT CODE INBLOCK
371
---- 372 CSEG AT SINTRVEC ; Serial Interrupt
0023 020000 F 373 LJMP SerialInterrupt
374
375
376
A51 MACRO ASSEMBLER ISD51 09/27/2006 15:13:06 PAGE 7
452
453
---- 454 RSEG ?PR?ISD51
A51 MACRO ASSEMBLER ISD51 09/27/2006 15:13:06 PAGE 8
455 USING 0 ; Assume Registerbank 0 for ARx symbols
456
457
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0000 465 SerialInterrupt:
0000 C0D0 466 PUSH PSW
0002 C0E0 467 PUSH ACC
468 JNB_RI NoSerBreak
470 RBYTE ; Check for 0A5H Break Code
471+1 RD_SBUF ; MOV A,SBUF
473+1 CLR_RI
475
000B F500 F 476 MOV _ISD_CHAR,A
477
000D B4A55E 478 CJNE A,#0A5H,ReturnI
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