/*--------------------------------------------------------------------------
P89V51Rx2.H
Registers definition for Philips P89V51Rx2
Modify by Fung Tin Ching at 02 Aug 2007

Copyright (c) 2007 Keil Elektronik GmbH and Keil Software, Inc.
All rights reserved.
-------------------------------------------------------------------------- */

#ifndef __P89V51RX2_H__
#define __P89V51RX2_H__


/*------------------------------------------------
Byte Registers

Note: Only Registers located on addresses that
are evenly divisible by 8 are bit addressable.
All other registers use bit masks.
------------------------------------------------*/
sfr P0      = 0x80;     /* Port 0 */
sfr SP      = 0x81;     /* Stack Pointer */
sfr DPL     = 0x82;     /* Data Pointer Low Byte */
sfr DPH     = 0x83;     /* Data Pointer High Byte */

sfr WDTD    = 0x85;     /* Watch Timer Data/Reload*/
sfr SPDAT   = 0x86;     /* SPI Data Register */
sfr PCON    = 0x87;     /* Power Control Register */

sfr TCON    = 0x88;     /* Timer Control Register */
sfr TMOD    = 0x89;     /* Timer Mode Control Register */
sfr TL0     = 0x8A;     /* Timer 0 Low Byte */
sfr TL1     = 0x8B;     /* Timer 1 Low Byte */
sfr TH0     = 0x8C;     /* Timer 0 High Byte */
sfr TH1     = 0x8D;     /* Timer 1 High Byte */
sfr AUXR    = 0x8E;     /* Auxiliary function register */ 

sfr P1      = 0x90;     /* Port 1 */
sfr SCON    = 0x98;     /* Serial Port Control */
sfr SBUF    = 0x99;     /* Serial Port Buffer */

sfr P2      = 0xA0;     /* Port 2 */
sfr AUXR1   = 0xA2;     /* Auxiliary function register 1 */
sfr IEN0    = 0xA8;     /* Interrupt Enable Register 0 */
sfr SPCFG   = 0xAA;     /* SPI Configuration Register */

sfr P3      = 0xB0;     /* Port 3 */
sfr FCF     = 0xB1;     /* Interrupt Priority Register 1 High */
sfr FST     = 0xB6;     /* Flash Status Register */
sfr IP0H    = 0xB7;     /* Interrupt Priority Register 0 High */
sfr IP0     = 0xB8;     /* Interrupt Priority Register 0 */
sfr SADEN   = 0xB9;     /* Serial Port Address Enable */
sfr WDTC    = 0xC0;     /* Watchdog Timer Control */
sfr T2CON   = 0xC8;     /* Timer 2 Control */
sfr T2MOD	= 0xC9;     /* Timer 2 Mode */
sfr RCAP2L  = 0xCA;     /* Timer 2 Capture Low Byte */
sfr RCAP2H  = 0xCB;     /* Timer 2 Capture High Byte */
sfr TL2     = 0xCC;     /* Timer 2 Low Byte */
sfr TH2     = 0xCD;     /* Timer 2 High Byte */
sfr PSW     = 0xD0;     /* Program Status Word */
sfr SPCTL   = 0xD5;     /* SPI Control Register */
sfr CCON    = 0xD8;     /* PCA Counter Control */
sfr CMOD  	= 0xD9;     /* PCA Counter Mode */
sfr CCAPM0	= 0xDA;     /* Module 0 Mode */
sfr CCAPM1	= 0xDB;     /* Module 1 Mode */
sfr CCAPM2 	= 0xDC;     /* Module 2 Mode */
sfr CCAPM3 	= 0xDD;     /* Module 3 Mode */
sfr CCAPM4 	= 0xDE;     /* Module 4 Mode */

sfr ACC     = 0xE0;     /* Accumulator */
sfr IEN1    = 0xE8;     /* Interrupt Enable 1 */
sfr CL   	= 0xE9;     /* PCA Counter Low */
sfr CCAP0L  = 0xEA;     /* Module 0 Capture LOW */
sfr CCAP1L  = 0xEB;     /* Module 1 Capture LOW */
sfr CCAP2L  = 0xEC;     /* Module 2 Capture LOW */
sfr CCAP3L  = 0xED;     /* Module 3 Capture LOW */
sfr CCAP4L  = 0xEE;     /* Module 4 Capture LOW */

sfr B       = 0xF0;     /* B Register */
sfr IP1H   	= 0xF7;     /* Interrupt Priority 1 High */
sfr IP1   	= 0xF8;     /* Interrupt Priority 1 */
sfr CH   	= 0xF9;     /* PCA Counter HIGH */         
sfr CCAP0H  = 0xFA;     /* Module 0 Capture HIGH */ 
sfr CCAP1H  = 0xFB;     /* Module 1 Capture HIGH */ 
sfr CCAP2H  = 0xFC;     /* Module 2 Capture HIGH */ 
sfr CCAP3H  = 0xFD;     /* Module 3 Capture HIGH */ 
sfr CCAP4H  = 0xFE;     /* Module 4 Capture HIGH */ 



/*------------------------------------------------
P0 (0x80) Bit Registers
------------------------------------------------*/
sbit P0_0 = P0^0;
sbit P0_1 = P0^1;
sbit P0_2 = P0^2;
sbit P0_3 = P0^3;
sbit P0_4 = P0^4;
sbit P0_5 = P0^5;
sbit P0_6 = P0^6;
sbit P0_7 = P0^7;

/*------------------------------------------------
TCON (0x88) Bit Registers
------------------------------------------------*/
sbit IT0  = TCON^0;       /* Interrupt 0 Type Control Bit */
sbit IE0  = TCON^1;       /* Interrupt 0 Edge Flag */
sbit IT1  = TCON^2;       /* Interrupt 1 Type Control Bit */
sbit IE1  = TCON^3;       /* Interrupt 1 Edge Flag */
sbit TR0  = TCON^4;       /* Timer 0 Run Control Bit */
sbit TF0  = TCON^5;       /* Timer 0 Overflow Flag */
sbit TR1  = TCON^6;       /* Timer 1 Run Control Bit */
sbit TF1  = TCON^7;       /* Timer 1 Overflow Flag */

/*------------------------------------------------
TMOD (0x89) Bit Values
------------------------------------------------*/
#define T0_M0_   0x01   /* Timer 0 Mode Bit 0 */
#define T0_M1_   0x02   /* Timer 0 Mode Bit 1 */
#define T0_CT_   0x04   /* Timer 0 Counter/Timer Select: 0=Counter, 1=Timer */
#define T0_GATE_ 0x08   /* Timer 0 Gate Control */

#define T1_M0_   0x10   /* Timer 1 Mode Bit 0 */
#define T1_M1_   0x20   /* Timer 1 Mode Bit 1 */
#define T1_CT_   0x40   /* Timer 1 Counter/Timer Select: 0=Counter, 1=Timer */
#define T1_GATE_ 0x80   /* Timer 1 Gate Control */

#define T1_MASK_ 0xF0   /* Timer 0 Mask */
#define T0_MASK_ 0x0F   /* Timer 1 Mask */

/*------------------------------------------------
P1 (0x90) Bit Registers
------------------------------------------------*/
sbit P1_0 = P1^0;
sbit P1_1 = P1^1;
sbit P1_2 = P1^2;
sbit P1_3 = P1^3;
sbit P1_4 = P1^4;
sbit P1_5 = P1^5;
sbit P1_6 = P1^6;
sbit P1_7 = P1^7;

sbit T2EX = P1^1;       /* Timer/Counter 2 capture/reload trigger & dir ctl */
sbit ECI  = P1^2;       /* External clock input for PCA */
sbit CEX0 = P1^3;       /* Capture/Compare external I/O for PCA Module 0 */
sbit CEX1 = P1^4;       /* Capture/Compare external I/O for PCA Module 1 */
sbit CEX2 = P1^5;       /* Capture/Compare external I/O for PCA Module 2 */
sbit CEX3 = P1^6;       /* Capture/Compare external I/O for PCA Module 3 */
sbit CEX4 = P1^7;       /* Capture/Compare external I/O for PCA Module 4 */

/*------------------------------------------------
SCON (0x98) Bit Registers
------------------------------------------------*/
sbit RI   = 0x98;       /* Receive Interrupt Flag */
sbit TI   = 0x99;       /* Transmit Interrupt Flag */
sbit RB8  = 0x9A;       /* 9th data bit received */
sbit TB8  = 0x9B;       /* 9th data bit to be transmitted in modes 2 & 3 */
sbit REN  = 0x9C;       /* Receive Enable */
sbit SM2  = 0x9D;       /* Serial Port Mode Bit 2 */
sbit SM1  = 0x9E;       /* Serial Port Mode Bit 1 */
sbit SM0  = 0x9F;       /* Serial Port Mode Bit 0 */

/*------------------------------------------------
P2 (0xA0) Bit Registers
------------------------------------------------*/
sbit P2_0 = 0xA0;
sbit P2_1 = 0xA1;
sbit P2_2 = 0xA2;
sbit P2_3 = 0xA3;
sbit P2_4 = 0xA4;
sbit P2_5 = 0xA5;
sbit P2_6 = 0xA6;
sbit P2_7 = 0xA7;

/*------------------------------------------------
IEN0 (0xA8) Bit Registers
------------------------------------------------*/
sbit EX0 = IEN0^0;       /* External Interrupt 0 Enable */      
sbit ET0 = IEN0^1;       /* Timer 0 Overflow Interrupt Enable */      
sbit EX1 = IEN0^2;       /* External Interrupt 1 Enable */       
sbit ET1 = IEN0^3;       /* Timer 1 Overflow Interrupt Enable */ 
sbit ES  = IEN0^4;       /* Serial Port Interrupt  Enable */       
sbit ET2 = IEN0^5;       /* Timer 2 Interrupt Enable */ 
sbit EC  = IEN0^6;       /* PCA Interrupt Enable bit */ 
sbit EA  = IEN0^7;       /* Interrupt Enable Bit; 0 = all interrupt disable; 1 = interrupt can be service */ 

/*------------------------------------------------
P3 (0xB0) Bit Registers (Mnemonics & Ports)
------------------------------------------------*/
sbit P3_0 = P3^0;
sbit P3_1 = P3^1;
sbit P3_2 = P3^2;
sbit P3_3 = P3^3;
sbit P3_4 = P3^4;
sbit P3_5 = P3^5;
sbit P3_6 = P3^6;
sbit P3_7 = P3^7;

sbit RXD  = P3^0;       /* Serial data input */
sbit TXD  = P3^1;       /* Serial data output */
sbit INT0 = P3^2;       /* External interrupt 0 */
sbit INT1 = P3^3;       /* External interrupt 1 */
sbit T0   = P3^4;       /* Timer 0 external input */
sbit T1   = P3^5;       /* Timer 1 external input */
sbit WR   = P3^6;       /* External data memory write strobe */
sbit RD   = P3^7;       /* External data memory read strobe */


/*------------------------------------------------
IP0 (0xB8) Bit Registers
------------------------------------------------*/
sbit PX0  = IP0^0;       /* External Interrupt 0 Priority LOW Bit */
sbit PT0  = IP0^1;       /* Timer 0 Interrupt Priority LOW Bit */
sbit PX1  = IP0^2;       /* External Interrupt 1 Priority LOW Bit */
sbit PT1  = IP0^3;       /* Timer 1 Interrupt Priority LOW Bit */
sbit PS   = IP0^4;       /* Serial Port Interrupt Priority LOW Bit */   
sbit PT2  = IP0^5;       /* Timer 2 Interrupt Priority LOW Bit */
sbit PPC  = IP0^6;       /* PCA Interrupt Priority LOW Bit */

/*------------------------------------------------
WDTC (0xC0) Bit Registers
------------------------------------------------*/
sbit SWDT  = WDTC^0;     /* Start Watchdog timer */
sbit WDT   = WDTC^1;     /* Watch timer Refresh */
sbit WDTS  = WDTC^2;     /* Watch timer reset flag */
sbit WDRE  = WDTC^3;     /* Watch timer reset enable */
sbit WDOUT = WDTC^4;     /* Watch output enable */

/*------------------------------------------------
T2CON (0xC8) Bit Registers
------------------------------------------------*/
sbit CP_RL2= T2CON^0;       /* 0=Reload, 1=Capture select */
sbit C_T2  = T2CON^1;       /* 0=Timer, 1=Counter */
sbit TR2   = T2CON^2;       /* 0=Stop timer, 1=Start timer */
sbit EXEN2 = T2CON^3;       /* Timer 2 external enable */
sbit TCLK  = T2CON^4;       /* 0=Serial clock uses Timer 1 overflow, 1=Timer 2 */
sbit RCLK  = T2CON^5;       /* 0=Serial clock uses Timer 1 overflow, 1=Timer 2 */
sbit EXF2  = T2CON^6;       /* Timer 2 external flag */
sbit TF2   = T2CON^7;       /* Timer 2 overflow flag */

/*------------------------------------------------
PSW (0xD0) Bit Registers
------------------------------------------------*/
sbit P    = PSW^0;       /* Parity Flag */
sbit FL   = PSW^1;       /* User Flag */
sbit OV   = PSW^2;       /* Overflow Flag */
sbit RS0  = PSW^3;       /* Register Bank Select Bit 0 */
sbit RS1  = PSW^4;       /* Register Bank Select Bit 1 */
sbit F0   = PSW^5;       /* User Flag 0 */
sbit AC   = PSW^6;       /* Auxiliary Carry Flag */
sbit CY   = PSW^7;       /* Carry Flag */

/*------------------------------------------------
CCON (0xD8) Bit Registers
------------------------------------------------*/
sbit   CCF0   	 = CCON^0;       /* PCA Module 0 Interrupt Flag */       
sbit   CCF1   	 = CCON^1;       /* PCA Module 1 Interrupt Flag */ 
sbit   CCF2   	 = CCON^2;       /* PCA Module 2 Interrupt Flag */ 
sbit   CCF3   	 = CCON^3;       /* PCA Module 3 Interrupt Flag */ 
sbit   CCF4   	 = CCON^4;       /* PCA Module 4 Interrupt Flag */ 
sbit   CR   	 = CCON^6;       /* PCA Counter Run Control Bit */ 
sbit   CF   	 = CCON^7;       /* PCA Counter Overflow Flag */ 

/*------------------------------------------------
IEN1 (0xE8) Bit Registers
------------------------------------------------*/
sbit   EBO   	 = IEN1^3;       /* Brown-out Interrupt Enable */

/*------------------------------------------------
IP1 (0xF8) Bit Registers
------------------------------------------------*/
sbit   PBO   	 = IP1^3;        /* Brown-out Interrupt priority bit */


/*------------------------------------------------
PCON (0x87) Bit Values
------------------------------------------------*/
#define IDL_    0x01    /* Idle Mode Bit: 1=Active */

#define STOP_   0x02    /* Stop Mode Bit: 1=Active */
#define PD_     0x02    /* Alternate definition */

#define GF0_    0x04    /* General Purpose Flag 0 */
#define GF1_    0x08    /* General Purpose Flag 1 */
#define SMOD_   0x80    /* Double Baud Rate Bit for use with Timer 1 */


/*------------------------------------------------
SPSR (0xAA) Bit Values - Reset Value = 0000.0000
------------------------------------------------*/
#define WCOL_   0x40    /* SPI Write Collision Flag: 1=Collision */
#define SPIF_   0x80    /* SPI Interrupt Flag */




/*------------------------------------------------
T2MOD (0xC9) Bit Values
------------------------------------------------*/
#define DCEN_   0x01    /* 1=Timer 2 can be configured as up/down counter */
#define T2OE_   0x02    /* Timer 2 output enable */



/*------------------------------------------------
SPCR (0xD5) Bit Values - Reset Value = 0000.01XX
------------------------------------------------*/
#define SPR0_   0x01    /* SPI Clock Rate Select bit 0 */
#define SPR1_   0x02    /* SPI Clock Rate Select bit 1 */
                        /* 00 = Fosc / 4   */
                        /* 01 = Fosc / 16  */
                        /* 10 = Fosc / 64  */
                        /* 11 = Fosc / 128 */

#define CPHA_   0x04    /* SPI Clock Phase */
#define CPOL_   0x08    /* SPI Clock Polarity */
#define MSTR_   0x10    /* SPI Master/Slave Select: 0=Slave, 1=Master */
#define DORD_   0x20    /* SPI Data Order: 0=MSB First, 1=LSB First */
#define SPE_    0x40    /* SPI Enable: 0=Disabled, 1=Enabled */
#define SPIE_   0x80    /* SPI Interrupt Enable: 0=Disabled, 1=Enabled */

/*------------------------------------------------
Interrupt Vectors:
Interrupt Address = (Number * 8) + 3
------------------------------------------------*/
#define IE0_VECTOR	0  /* 0x03 External Interrupt 0 */
#define TF0_VECTOR	1  /* 0x0B Timer 0 */
#define IE1_VECTOR	2  /* 0x13 External Interrupt 1 */
#define TF1_VECTOR	3  /* 0x1B Timer 1 */
#define SIO_VECTOR	4  /* 0x23 Serial port */

#define TF2_VECTOR	5  /* 0x2B Timer 2 */
#define EX2_VECTOR	5  /* 0x2B External Interrupt 2 */

#define PCA_VECTOR      6  /* 0x33 PCA Counter */



#endif