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?? second_count.fit.smsg

?? second.rar 這個做的是一秒表計時程序
?? SMSG
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Info: *******************************************************************
Info: Running Quartus II Fitter
    Info: Version 7.0 Build 33 02/05/2007 SJ Web Edition
    Info: Processing started: Fri Jun 13 21:08:40 2008
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off second_count -c second_count
Info: Selected device EP1C6Q240C8 for design "second_count"
Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time
Info: The Fitter has identified 1 logical partitions of which 0 have a previous placement to use
    Info: Previous placement does not exist for 267 of 267 atoms in partition Top
Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices
    Info: Device EP1C12Q240C8 is compatible
Info: Fitter converted 2 user pins into dedicated programming pins
    Info: Pin ~nCSO~ is reserved at location 24
    Info: Pin ~ASDO~ is reserved at location 37
Info: Fitter is using the Classic Timing Analyzer
Info: Timing requirements not specified -- quality metrics such as performance and power consumption may be sacrificed to reduce compilation time.
Info: Completed User Assigned Global Signals Promotion Operation
Info: DQS I/O pins require 0 global routing resources
Info: Automatically promoted signal "clkin" to use Global clock in PIN 28
Info: Automatically promoted some destinations of signal "count_8:count_8_inst|temp" to use Global clock
    Info: Destination "count_8:count_8_inst|temp" may be non-global or may not use global clock
Info: Automatically promoted some destinations of signal "LPM_fp:LPM_fp_inst|lpm_counter:lpm_counter_component|cntr_6ej:auto_generated|modulus_trigger" to use Global clock
    Info: Destination "LPM_fp:LPM_fp_inst|lpm_counter:lpm_counter_component|cntr_6ej:auto_generated|counter_cella0" may be non-global or may not use global clock
    Info: Destination "LPM_fp:LPM_fp_inst|lpm_counter:lpm_counter_component|cntr_6ej:auto_generated|counter_cella2" may be non-global or may not use global clock
    Info: Destination "LPM_fp:LPM_fp_inst|lpm_counter:lpm_counter_component|cntr_6ej:auto_generated|counter_cella1" may be non-global or may not use global clock
    Info: Destination "LPM_fp:LPM_fp_inst|lpm_counter:lpm_counter_component|cntr_6ej:auto_generated|counter_cella3" may be non-global or may not use global clock
    Info: Destination "LPM_fp:LPM_fp_inst|lpm_counter:lpm_counter_component|cntr_6ej:auto_generated|counter_cella4" may be non-global or may not use global clock
    Info: Destination "LPM_fp:LPM_fp_inst|lpm_counter:lpm_counter_component|cntr_6ej:auto_generated|counter_cella7" may be non-global or may not use global clock
    Info: Destination "LPM_fp:LPM_fp_inst|lpm_counter:lpm_counter_component|cntr_6ej:auto_generated|counter_cella5" may be non-global or may not use global clock
    Info: Destination "LPM_fp:LPM_fp_inst|lpm_counter:lpm_counter_component|cntr_6ej:auto_generated|counter_cella6" may be non-global or may not use global clock
    Info: Destination "LPM_fp:LPM_fp_inst|lpm_counter:lpm_counter_component|cntr_6ej:auto_generated|counter_cella11" may be non-global or may not use global clock
    Info: Destination "LPM_fp:LPM_fp_inst|lpm_counter:lpm_counter_component|cntr_6ej:auto_generated|counter_cella8" may be non-global or may not use global clock
    Info: Limited to 10 non-global destinations
Info: Automatically promoted signal "mux_4_1:mux_4_1_inst|Mux4~13" to use Global clock
Info: Automatically promoted signal "reset_n" to use Global clock
Info: Pin "reset_n" drives global clock, but is not placed in a dedicated clock pin position
Info: Completed Auto Global Promotion Operation
Info: Starting register packing
Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option
Info: Finished moving registers into I/O cells, LUTs, and RAM blocks
Info: Finished register packing: elapsed time is 00:00:00
Info: Fitter placement preparation operations beginning
Info: Fitter placement preparation operations ending: elapsed time is 00:00:00
Info: Fitter placement operations beginning
Info: Fitter placement was successful
Info: Fitter placement operations ending: elapsed time is 00:00:00
Info: Estimated most critical path is register to register delay of 5.076 ns
    Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X8_Y10; Fanout = 3; REG Node = 'count_8:count_8_inst|q[0]'
    Info: 2: + IC(1.141 ns) + CELL(0.575 ns) = 1.716 ns; Loc. = LAB_X8_Y9; Fanout = 2; COMB Node = 'count_8:count_8_inst|Add0~118COUT1'
    Info: 3: + IC(0.000 ns) + CELL(0.080 ns) = 1.796 ns; Loc. = LAB_X8_Y9; Fanout = 2; COMB Node = 'count_8:count_8_inst|Add0~120COUT1'
    Info: 4: + IC(0.000 ns) + CELL(0.080 ns) = 1.876 ns; Loc. = LAB_X8_Y9; Fanout = 2; COMB Node = 'count_8:count_8_inst|Add0~122COUT1'
    Info: 5: + IC(0.000 ns) + CELL(0.080 ns) = 1.956 ns; Loc. = LAB_X8_Y9; Fanout = 2; COMB Node = 'count_8:count_8_inst|Add0~124COUT1'
    Info: 6: + IC(0.000 ns) + CELL(0.258 ns) = 2.214 ns; Loc. = LAB_X8_Y9; Fanout = 3; COMB Node = 'count_8:count_8_inst|Add0~126'
    Info: 7: + IC(0.000 ns) + CELL(0.679 ns) = 2.893 ns; Loc. = LAB_X8_Y9; Fanout = 2; COMB Node = 'count_8:count_8_inst|Add0~131'
    Info: 8: + IC(1.221 ns) + CELL(0.114 ns) = 4.228 ns; Loc. = LAB_X8_Y10; Fanout = 1; COMB Node = 'count_8:count_8_inst|Equal0~65'
    Info: 9: + IC(0.539 ns) + CELL(0.309 ns) = 5.076 ns; Loc. = LAB_X8_Y10; Fanout = 17; REG Node = 'count_8:count_8_inst|temp'
    Info: Total cell delay = 2.175 ns ( 42.85 % )
    Info: Total interconnect delay = 2.901 ns ( 57.15 % )
Info: Fitter routing operations beginning
Info: Average interconnect usage is 0% of the available device resources. Peak interconnect usage is 0%
    Info: The peak interconnect region extends from location X24_Y0 to location X35_Y10
Info: Fitter routing operations ending: elapsed time is 00:00:00
Info: The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time.
    Info: Optimizations that may affect the design's routability were skipped
    Info: Optimizations that may affect the design's timing were skipped
Info: Completed Fixed Delay Chain Operation
Info: Started post-fitting delay annotation
Info: Delay annotation completed successfully
Info: Completed Auto Delay Chain Operation
Warning: Following 40 pins have no output enable or a GND or VCC output enable - later changes to this connectivity may change fitting results
    Info: Pin mem_data[0] has a permanently disabled output enable
    Info: Pin mem_data[1] has a permanently disabled output enable
    Info: Pin mem_data[2] has a permanently disabled output enable
    Info: Pin mem_data[3] has a permanently disabled output enable
    Info: Pin mem_data[4] has a permanently disabled output enable
    Info: Pin mem_data[5] has a permanently disabled output enable
    Info: Pin mem_data[6] has a permanently disabled output enable
    Info: Pin mem_data[7] has a permanently disabled output enable
    Info: Pin mem_data[8] has a permanently disabled output enable
    Info: Pin mem_data[9] has a permanently disabled output enable
    Info: Pin mem_data[10] has a permanently disabled output enable
    Info: Pin mem_data[11] has a permanently disabled output enable
    Info: Pin mem_data[12] has a permanently disabled output enable
    Info: Pin mem_data[13] has a permanently disabled output enable
    Info: Pin mem_data[14] has a permanently disabled output enable
    Info: Pin mem_data[15] has a permanently disabled output enable
    Info: Pin lcd_data[0] has a permanently disabled output enable
    Info: Pin lcd_data[1] has a permanently disabled output enable
    Info: Pin lcd_data[2] has a permanently disabled output enable
    Info: Pin lcd_data[3] has a permanently disabled output enable
    Info: Pin lcd_data[4] has a permanently disabled output enable
    Info: Pin lcd_data[5] has a permanently disabled output enable
    Info: Pin lcd_data[6] has a permanently disabled output enable
    Info: Pin lcd_data[7] has a permanently disabled output enable
    Info: Pin usb_data[0] has a permanently disabled output enable
    Info: Pin usb_data[1] has a permanently disabled output enable
    Info: Pin usb_data[2] has a permanently disabled output enable
    Info: Pin usb_data[3] has a permanently disabled output enable
    Info: Pin usb_data[4] has a permanently disabled output enable
    Info: Pin usb_data[5] has a permanently disabled output enable
    Info: Pin usb_data[6] has a permanently disabled output enable
    Info: Pin usb_data[7] has a permanently disabled output enable
    Info: Pin usb_data[8] has a permanently disabled output enable
    Info: Pin usb_data[9] has a permanently disabled output enable
    Info: Pin usb_data[10] has a permanently disabled output enable
    Info: Pin usb_data[11] has a permanently disabled output enable
    Info: Pin usb_data[12] has a permanently disabled output enable
    Info: Pin usb_data[13] has a permanently disabled output enable
    Info: Pin usb_data[14] has a permanently disabled output enable
    Info: Pin usb_data[15] has a permanently disabled output enable
Warning: Following 120 pins have nothing, GND, or VCC driving datain port -- changes to this connectivity may change fitting results
    Info: Pin mem_data[0] has VCC driving its datain port
    Info: Pin mem_data[1] has VCC driving its datain port
    Info: Pin mem_data[2] has VCC driving its datain port
    Info: Pin mem_data[3] has VCC driving its datain port
    Info: Pin mem_data[4] has VCC driving its datain port
    Info: Pin mem_data[5] has VCC driving its datain port
    Info: Pin mem_data[6] has VCC driving its datain port
    Info: Pin mem_data[7] has VCC driving its datain port

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