?? evm5509.c
字號(hào):
/*
* Copyright 2004 by Spectrum Digital Incorporated.
* All rights reserved. Property of Spectrum Digital Incorporated.
*/
/*
* ======== EVM5509.c ========
* 5509 EVM board initializion implementation.
*/
#include <csl.h>
#include <csl_emif.h>
#include <csl_i2c.h>
#include <csl_pll.h>
#include <evm5509.h>
/*
EMIF_Config emifCfg0 = {
EMIF_EGCR_RMK( 1, //EMIF_EGCR_MEMFREQ_2X,
EMIF_EGCR_WPE_OFF,
EMIF_EGCR_MEMCEN_ON,
EMIF_EGCR_NOHOLD_NOHOLD ),
EMIF_EMIRST_RMK( EMIF_EMIRST_EMIRST_0F( 0xFFFF ) ),
// CE0_1, CE0_2, & CE0_3
EMIF_CEx1_RMK( EMIF_CEx1_MTYPE_SDRAM32,
EMIF_CEx1_RDSETUP_OF( 15 ),
EMIF_CEx1_RDSTROBE_OF( 63 ),
EMIF_CEx1_RDHOLD_OF( 3 ) ),
EMIF_CEx2_RMK( EMIF_CEx2_RDEXHLD_OF( 1 ),
EMIF_CEx2_WREXHLD_OF( 1 ),
EMIF_CEx2_WRSETUP_OF( 15 ),
EMIF_CEx2_WRSTROBE_OF( 63 ),
EMIF_CEx2_WRHOLD_OF( 3 ) ),
EMIF_CEx3_RMK( EMIF_CEx3_TIMOUT_OF( 0 ) ),
// CE1_1, CE1_2, & CE1_3
EMIF_CEx1_RMK( EMIF_CEx1_MTYPE_ASYNC16,
EMIF_CEx1_RDSETUP_OF( 0 ),
EMIF_CEx1_RDSTROBE_OF( 14 ),
EMIF_CEx1_RDHOLD_OF( 0 ) ),
EMIF_CEx2_RMK( EMIF_CEx2_RDEXHLD_OF( 0 ),
EMIF_CEx2_WREXHLD_OF( 0 ),
EMIF_CEx2_WRSETUP_OF( 0 ),
EMIF_CEx2_WRSTROBE_OF( 14 ),
EMIF_CEx2_WRHOLD_OF( 0 ) ),
EMIF_CEx3_RMK( EMIF_CEx3_TIMOUT_OF( 0 ) ),
// CE2_1, CE2_2, & CE2_3
EMIF_CEx1_RMK( EMIF_CEx1_MTYPE_ASYNC16,
EMIF_CEx1_RDSETUP_OF( 0 ),
EMIF_CEx1_RDSTROBE_OF( 20 ),
EMIF_CEx1_RDHOLD_OF( 0 ) ),
EMIF_CEx2_RMK( EMIF_CEx2_RDEXHLD_OF( 0 ),
EMIF_CEx2_WREXHLD_OF( 0 ),
EMIF_CEx2_WRSETUP_OF( 0 ),
EMIF_CEx2_WRSTROBE_OF( 20 ),
EMIF_CEx2_WRHOLD_OF( 0 ) ),
EMIF_CEx3_RMK( EMIF_CEx3_TIMOUT_OF( 0 ) ),
// CE3_1, CE3_2, & CE3_3
EMIF_CEx1_RMK( EMIF_CEx1_MTYPE_ASYNC16,
EMIF_CEx1_RDSETUP_OF( 0 ),
EMIF_CEx1_RDSTROBE_OF( 20 ),
EMIF_CEx1_RDHOLD_OF( 0 ) ),
EMIF_CEx2_RMK( EMIF_CEx2_RDEXHLD_OF( 0 ),
EMIF_CEx2_WREXHLD_OF( 0 ),
EMIF_CEx2_WRSETUP_OF( 0 ),
EMIF_CEx2_WRSTROBE_OF( 20 ),
EMIF_CEx2_WRHOLD_OF( 0 ) ),
EMIF_CEx3_RMK( EMIF_CEx3_TIMOUT_OF( 0 ) ),
// SDRAM: SDC1, SDPER, INIT, & SDC2
EMIF_SDC1_MK( EMIF_SDC1_TRC_OF( 5 ),
EMIF_SDC1_SDSIZE_16M,
EMIF_SDC1_SDWID_OFF,
EMIF_SDC1_RFEN_ENABLE,
EMIF_SDC1_TRCD_OF( 1 ),
EMIF_SDC1_TRP_OF( 1 ) ),
EMIF_SDPER_RMK( EMIF_SDPER_PERIOD_OF( 0x578 ) ),
EMIF_INIT_RMK( EMIF_SDINIT_INIT_OF( 0xFFFF ) ),
EMIF_SDC2_RMK( EMIF_SDC2_SDACC_16BITBUS,
EMIF_SDC2_TMRD_OF( 1 ),
EMIF_SDC2_TRAS_OF( 3 ),
EMIF_SDC2_TACTV2ACTV_OF( 5 ) )
};
*/
/* Initialize the board APIs */
void EVM5509_init()
{
I2C_Setup i2cSetup = {
0, /* 7 bit address mode */
0x007F, /* own address - dont care if master */
75, /* clkout value (Mhz) */
400, /* a number between 10 and 400 */
0, /* num of bits/bytes to be received/transmitted (8) */
0, /* DLB mode off */
0 /* FREE mode of operation off */
};
/* Initialize CSL */
CSL_init();
/* Configure EMIF */
EMIF_config(&emifCfg0);
/* Set CPLD registers to default values */
EVM5509_rset(EVM5509_USER_REG, 0);
EVM5509_rset(EVM5509_DC_REG, 0);
EVM5509_rset(EVM5509_MISC, 0);
EVM5509_rset(EVM5509_BOARD, 0);
/* Initialize I2C interface */
I2C_setup(&i2cSetup);
}
/* Read a 16-bit value from a CPLD register */
Uint16 EVM5509_rget(Int16 regnum)
{
return EVM5509_mget(EVM5509_CPLD_BASE + regnum);
}
/* Write a 16-bit value to a CPLD register */
void EVM5509_rset(Int16 regnum, Uint16 regval)
{
EVM5509_mset(EVM5509_CPLD_BASE + regnum, regval);
}
/* Spin in a delay loop for delay iterations */
void EVM5509_wait(Uint32 delay)
{
volatile Uint32 i, n;
n = 0;
for (i = 0; i < delay; i++)
{
n = n + 1;
}
}
/* Spin in a delay loop for delay microseconds */
void EVM5509_waitusec(Uint32 delay)
{
EVM5509_wait(delay * 13);
}
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