?? spce3200_constant.h
字號:
#define C_DMA_CH2_BUSY 0x00000004 // P_DMA_BUSY_STATUS#define C_DMA_CH3_BUSY 0x00000008 // P_DMA_BUSY_STATUS#define C_DMA_CH0_FLAG 0x00000001 // P_DMA_INT_STATUS#define C_DMA_CH1_FLAG 0x00000002 // P_DMA_INT_STATUS#define C_DMA_CH2_FLAG 0x00000004 // P_DMA_INT_STATUS#define C_DMA_CH3_FLAG 0x00000008 // P_DMA_INT_STATUS#define C_DMA_CH0_RST 0x00000001 // P_DMA_CHANNEL_RESET#define C_DMA_CH1_RST 0x00000002 // P_DMA_CHANNEL_RESET#define C_DMA_CH2_RST 0x00000004 // P_DMA_CHANNEL_RESET#define C_DMA_CH3_RST 0x00000008 // P_DMA_CHANNEL_RESET#define C_DMA_MIU_APB 0x00000000 // P_DMA_CHANNELx_CTRL#define C_DMA_APB_MIU 0x00000001 // P_DMA_CHANNELx_CTRL#define C_DMA_AUTO_MODE 0x00000000 // P_DMA_CHANNELx_CTRL#define C_DMA_POLLING_MODE 0x00000002 // P_DMA_CHANNELx_CTRL#define C_DMA_CONTINUOUS_MODE 0x00000000 // P_DMA_CHANNELx_CTRL#define C_DMA_REGULAR_MODE 0x00000004 // P_DMA_CHANNELx_CTRL#define C_DMA_SINGLE_BUF 0x00000000 // P_DMA_CHANNELx_CTRL#define C_DMA_DOUBLE_BUF 0x00000008 // P_DMA_CHANNELx_CTRL#define C_DMA_8BIT_SINGLE 0x00000000 // P_DMA_CHANNELx_CTRL#define C_DMA_16BIT_SINGLE 0x00000010 // P_DMA_CHANNELx_CTRL#define C_DMA_32BIT_SINGLE 0x00000020 // P_DMA_CHANNELx_CTRL#define C_DMA_32BIT_BURST 0x00000030 // P_DMA_CHANNELx_CTRL#define C_DMA_INT_EN 0x00000040 // P_DMA_CHANNELx_CTRL#define C_DMA_CH_EN 0x00000080 // P_DMA_CHANNELx_CTRL//******************************************************************//// ADC ////******************************************************************//#define C_ADC_CLK_EN 0x00000001 // P_ADC_CLK_CONF#define C_ADC_RST_DIS 0x00000002 // P_ADC_CLK_CONF#define C_ADC_SEL_PLLA 0x00000000 // P_ADC_CLK_SEL#define C_ADC_SEL_PLLU 0x00000100 // P_ADC_CLK_SEL#define C_ADC_CH0_EN 0x00000001 // P_ADC_AINPUT_CTRL#define C_ADC_CH1_EN 0x00000002 // P_ADC_AINPUT_CTRL#define C_ADC_CH2_EN 0x00000004 // P_ADC_AINPUT_CTRL#define C_ADC_CH3_EN 0x00000008 // P_ADC_AINPUT_CTRL#define C_ADC_CH4_EN 0x00000010 // P_ADC_AINPUT_CTRL#define C_ADC_CH5_EN 0x00000020 // P_ADC_AINPUT_CTRL#define C_ADC_CH6_EN 0x00000040 // P_ADC_AINPUT_CTRL#define C_ADC_CH7_EN 0x00000080 // P_ADC_AINPUT_CTRL#define C_ADC_CH0_SEL 0x00000000 // P_ADC_MIC_CTRL1#define C_ADC_CH1_SEL 0x00000001 // P_ADC_MIC_CTRL1#define C_ADC_CH2_SEL 0x00000002 // P_ADC_MIC_CTRL1#define C_ADC_CH3_SEL 0x00000003 // P_ADC_MIC_CTRL1#define C_ADC_CH4_SEL 0x00000004 // P_ADC_MIC_CTRL1#define C_ADC_CH5_SEL 0x00000005 // P_ADC_MIC_CTRL1#define C_ADC_CH6_SEL 0x00000006 // P_ADC_MIC_CTRL1#define C_ADC_CH7_SEL 0x00000007 // P_ADC_MIC_CTRL1#define C_ADC_MIC_SEL 0x00000008 // P_ADC_MIC_CTRL1#define C_MIC_BIAS_EN 0x04000000 // P_ADC_MIC_CTRL1#define C_MIC_BOOST_EN 0x08000000 // P_ADC_MIC_CTRL1#define C_ADC_MODE_MIC 0x20000000 // P_ADC_MIC_CTRL1#define C_ADC_MODE_ADC 0xC0000000 // P_ADC_MIC_CTRL1#define C_MIC_GAIN_330 0x00000000 // P_ADC_MIC_GAIN#define C_MIC_GAIN_315 0x00000001 // P_ADC_MIC_GAIN#define C_MIC_GAIN_300 0x00000002 // P_ADC_MIC_GAIN#define C_MIC_GAIN_285 0x00000003 // P_ADC_MIC_GAIN#define C_MIC_GAIN_270 0x00000004 // P_ADC_MIC_GAIN#define C_MIC_GAIN_255 0x00000005 // P_ADC_MIC_GAIN#define C_MIC_GAIN_240 0x00000006 // P_ADC_MIC_GAIN#define C_MIC_GAIN_225 0x00000007 // P_ADC_MIC_GAIN#define C_MIC_GAIN_210 0x00000008 // P_ADC_MIC_GAIN#define C_MIC_GAIN_195 0x00000009 // P_ADC_MIC_GAIN#define C_MIC_GAIN_180 0x0000000a // P_ADC_MIC_GAIN#define C_MIC_GAIN_165 0x0000000b // P_ADC_MIC_GAIN#define C_MIC_GAIN_150 0x0000000c // P_ADC_MIC_GAIN#define C_MIC_GAIN_135 0x0000000d // P_ADC_MIC_GAIN#define C_MIC_GAIN_120 0x0000000e // P_ADC_MIC_GAIN#define C_MIC_GAIN_105 0x0000000f // P_ADC_MIC_GAIN#define C_MIC_GAIN_090 0x00000010 // P_ADC_MIC_GAIN#define C_MIC_GAIN_075 0x00000011 // P_ADC_MIC_GAIN#define C_MIC_GAIN_060 0x00000012 // P_ADC_MIC_GAIN#define C_MIC_GAIN_045 0x00000013 // P_ADC_MIC_GAIN#define C_MIC_GAIN_030 0x00000014 // P_ADC_MIC_GAIN#define C_MIC_GAIN_015 0x00000015 // P_ADC_MIC_GAIN#define C_MIC_GAIN_000 0x00000016 // P_ADC_MIC_GAIN#define C_MIC_GAIN_NEG015 0x00000017 // P_ADC_MIC_GAIN#define C_MIC_GAIN_NEG030 0x00000018 // P_ADC_MIC_GAIN#define C_MIC_GAIN_NEG045 0x00000019 // P_ADC_MIC_GAIN#define C_MIC_GAIN_NEG060 0x0000001a // P_ADC_MIC_GAIN#define C_MIC_GAIN_NEG075 0x0000001b // P_ADC_MIC_GAIN#define C_MIC_GAIN_NEG090 0x0000001c // P_ADC_MIC_GAIN#define C_MIC_GAIN_NEG105 0x0000001d // P_ADC_MIC_GAIN#define C_MIC_GAIN_NEG120 0x0000001e // P_ADC_MIC_GAIN#define C_MIC_GAIN_NEGINFINATY 0x0000001f // P_ADC_MIC_GAIN#define C_ADC_FIFO_ONE 0x00000000 // P_ADC_MIC_CTRL2#define C_ADC_FIFO_TWO 0x00000001 // P_ADC_MIC_CTRL2#define C_ADC_FIFO_THREE 0x00000002 // P_ADC_MIC_CTRL2#define C_ADC_FIFO_FOUR 0x00000003 // P_ADC_MIC_CTRL2#define C_ADC_FIFO_FIVE 0x00000004 // P_ADC_MIC_CTRL2#define C_ADC_FIFO_SIX 0x00000005 // P_ADC_MIC_CTRL2#define C_ADC_FIFO_SEVEN 0x00000006 // P_ADC_MIC_CTRL2#define C_ADC_FIFO_EIGHT 0x00000007 // P_ADC_MIC_CTRL2#define C_ADC_FIFOINT_ONE 0x00000000 // P_ADC_MIC_CTRL2#define C_ADC_FIFOINT_TWO 0x00000010 // P_ADC_MIC_CTRL2#define C_ADC_FIFOINT_THREE 0x00000020 // P_ADC_MIC_CTRL2#define C_ADC_FIFOINT_FOUR 0x00000030 // P_ADC_MIC_CTRL2#define C_ADC_FIFOINT_FIVE 0x00000040 // P_ADC_MIC_CTRL2#define C_ADC_FIFOINT_SIX 0x00000050 // P_ADC_MIC_CTRL2#define C_ADC_FIFOINT_SEVEN 0x00000060 // P_ADC_MIC_CTRL2#define C_ADC_FIFOINT_EIGHT 0x00000070 // P_ADC_MIC_CTRL2#define C_ADC_AUTO_CLR 0x00800000 // P_ADC_MIC_CTRL2#define C_ADC_MANUAL_CLR 0x00000000 // P_ADC_MIC_CTRL2#define C_ADC_DMA_32BIT 0x00000000 // P_ADC_MIC_CTRL2#define C_ADC_DMA_16BIT 0x01000000 // P_ADC_MIC_CTRL2#define C_MIC_MUTE_MODE 0x02000000 // P_ADC_MIC_CTRL2#define C_MIC_NORMAL_MODE 0x00000000 // P_ADC_MIC_CTRL2#define C_MIC_SIGNED_FMT 0x00000000 // P_ADC_MIC_CTRL2#define C_MIC_UNSIGNED_FMT 0x04000000 // P_ADC_MIC_CTRL2#define C_ADC_AUTO_MODE 0x08000000 // P_ADC_MIC_CTRL2#define C_ADC_MANUAL_MODE 0x00000000 // P_ADC_MIC_CTRL2#define C_ADC_CTRL_EN 0x80000000 // P_ADC_MIC_CTRL2#define C_ADC_MANUAL_START 0x00008000 // P_ADC_INT_STATUS#define C_ADC_FIFO_EMPTY 0x00200000 // P_ADC_INT_STATUS#define C_ADC_FIFO_FULL 0x00400000 // P_ADC_INT_STATUS#define C_ADC_FIFOOV_FLAG 0x00800000 // P_ADC_INT_STATUS#define C_ADC_MICOV_INTEN 0x04000000 // P_ADC_INT_STATUS#define C_ADC_MICOV_FLAG 0x08000000 // P_ADC_INT_STATUS#define C_ADC_AUTO_INTEN 0x10000000 // P_ADC_INT_STATUS#define C_ADC_AUTO_FLAG 0x20000000 // P_ADC_INT_STATUS#define C_ADC_MANUAL_INTEN 0x40000000 // P_ADC_INT_STATUS#define C_ADC_MANUAL_FLAG 0x80000000 // P_ADC_INT_STATUS//******************************************************************//// Timer ////******************************************************************//#define C_TIMER_CLK_EN 0x00000001 // P_TIMERx_CLK_CONF x 0~5#define C_TIMER_RST_DIS 0x00000002 // P_TIMERx_CLK_CONF x 0~5#define C_TIMER0_CLK_27M 0x00000000 // P_TIMER_CLK_SEL#define C_TIMER0_CLK_32K 0x00000100 // P_TIMER_CLK_SEL#define C_TIMER1_CLK_27M 0x00000000 // P_TIMER_CLK_SEL#define C_TIMER1_CLK_32K 0x00000200 // P_TIMER_CLK_SEL#define C_TIMER2_CLK_27M 0x00000000 // P_TIMER_CLK_SEL#define C_TIMER2_CLK_32K 0x00000400 // P_TIMER_CLK_SEL#define C_TIMER3_CLK_27M 0x00000000 // P_TIMER_CLK_SEL#define C_TIMER3_CLK_32K 0x00000800 // P_TIMER_CLK_SEL#define C_TIMER4_CLK_27M 0x00000000 // P_TIMER_CLK_SEL#define C_TIMER4_CLK_32K 0x00001000 // P_TIMER_CLK_SEL#define C_TIMER5_CLK_27M 0x00000000 // P_TIMER_CLK_SEL#define C_TIMER5_CLK_32K 0x00002000 // P_TIMER_CLK_SEL#define C_TIMER_INT_FLAG 0x04000000 // P_TIMERx_MODE_CTRL x 0~5#define C_TIMER_INT_EN 0x08000000 // P_TIMERx_MODE_CTRL#define C_TIMER_CTRL_EN 0x80000000 // P_TIMERx_MODE_CTRL#define C_TIMER_PWM_NRO 0x00000000 // P_TIMERx_CCP_CTRL#define C_TIMER_PWM_NRZ 0x02000000 // P_TIMERx_CCP_CTRL#define C_TIMER_CMP_HIGH 0x00000000 // P_TIMERx_CCP_CTRL#define C_TIMER_CMP_LOW 0x04000000 // P_TIMERx_CCP_CTRL#define C_TIMER_CAP_FALL 0x00000000 // P_TIMERx_CCP_CTRL#define C_TIMER_CAP_RISE 0x08000000 // P_TIMERx_CCP_CTRL#define C_TIMER_NOR_MODE 0x00000000 // P_TIMERx_CCP_CTRL#define C_TIMER_CAP_MODE 0x40000000 // P_TIMERx_CCP_CTRL#define C_TIMER_CMP_MODE 0x80000000 // P_TIMERx_CCP_CTRL#define C_TIMER_PWM_MODE 0xC0000000 // P_TIMERx_CCP_CTRL#define C_TIMER0_PORT_SEL 0x00010000 // P_TIMER_INTERFACE_SEL#define C_TIMER1_PORT_SEL 0x00020000 // P_TIMER_INTERFACE_SEL#define C_TIMER2_PORT_SEL 0x00040000 // P_TIMER_INTERFACE_SEL#define C_TIMER3_PORT_SEL 0x00080000 // P_TIMER_INTERFACE_SEL#define C_TIMER4_PORT_SEL 0x00100000 // P_TIMER_INTERFACE_SEL#define C_TIMER5_PORT_SEL 0x00200000 // P_TIMER_INTERFACE_SEL//******************************************************************//// RTC-TMB ////******************************************************************//#define C_RTC_RST_DIS 0x00000002 // P_RTC_CLK_CONF#define C_RTC_CLK_EN 0x00000001 // P_RTC_CLK_CONF#define C_RTC_CTRL_EN 0x80000000 // P_RTC_MODE_CTRL#define C_RTC_HSEC_INTEN 0x00004000 // P_RTC_INT_STATUS#define C_RTC_HSEC_FLAG 0x00008000 // P_RTC_INT_STATUS#define C_RTC_SEC_INTEN 0x00040000 // P_RTC_INT_STATUS#define C_RTC_SEC_FLAG 0x00080000 // P_RTC_INT_STATUS#define C_RTC_MIN_INTEN 0x00400000 // P_RTC_INT_STATUS#define C_RTC_MIN_FLAG 0x00800000 // P_RTC_INT_STATUS#define C_RTC_HOUR_INTEN 0x04000000 // P_RTC_INT_STATUS#define C_RTC_HOUR_FLAG 0x08000000 // P_RTC_INT_STATUS#define C_RTC_ALM_INTEN 0x40000000 // P_RTC_INT_STATUS#define C_RTC_ALM_FLAG 0x80000000 // P_RTC_INT_STATUS#define C_TMB_RST_DIS 0x00000004 // P_TMB_CLK_CONF#define C_TMB_CLK_EN 0x00000001 // P_TMB_CLK_CONF#define C_TMB_TMB2_1HZ 0x00000000 // P_TMB_MODE_CTRL#define C_TMB_TMB2_2HZ 0x00000100 // P_TMB_MODE_CTRL#define C_TMB_TMB2_4Hz 0x00000200 // P_TMB_MODE_CTRL#define C_TMB_TMB2_8HZ 0x00000300 // P_TMB_MODE_CTRL#define C_TMB_TMB2_16HZ 0x00000400 // P_TMB_MODE_CTRL#define C_TMB_TMB2_32HZ 0x00000500 // P_TMB_MODE_CTRL#define C_TMB_TMB2_64HZ 0x00000600 // P_TMB_MODE_CTRL#define C_TMB_TMB2_128HZ 0x00000700 // P_TMB_MODE_CTRL#define C_TMB_TMB2_256HZ 0x00000800 // P_TMB_MODE_CTRL#define C_TMB_TMB2_512HZ 0x00000900 // P_TMB_MODE_CTRL#define C_TMB_TMB2_1024HZ 0x00000a00 // P_TMB_MODE_CTRL#define C_TMB_TMB2_2048HZ 0x00000b00 // P_TMB_MODE_CTRL#define C_TMB_TMB2_EN 0x00008000 // P_TMB_MODE_CTRL#define C_TMB_TMB1_1HZ 0x00000000 // P_TMB_MODE_CTRL#define C_TMB_TMB1_2HZ 0x00010000 // P_TMB_MODE_CTRL#define C_TMB_TMB1_4HZ 0x00020000 // P_TMB_MODE_CTRL#define C_TMB_TMB1_8HZ 0x00030000 // P_TMB_MODE_CTRL#define C_TMB_TMB1_16HZ 0x00040000 // P_TMB_MODE_CTRL#define C_TMB_TMB1_32HZ 0x00050000 // P_TMB_MODE_CTRL#define C_TMB_TMB1_64HZ 0x00060000 // P_TMB_MODE_CTRL#define C_TMB_TMB1_128HZ 0x00070000 // P_TMB_MODE_CTRL?? 快捷鍵說明
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