/********************************************************************/
/*  Copyright 2004 by SEED Incorporated.							*/
/*  All rights reserved. Property of SEED Incorporated.				*/
/*  Restricted rights to use, duplicate or disclose this code are	*/
/*  granted through contract.									    */
/*  															    */
/********************************************************************/
/*
 *---------dm642main.c---------
 * This example uses a timer to read and write the ESAM.
 */


#include <stdio.h>
#include <csl.h>
#include <std.h>
#include <csl_emifa.h>
#include <csl_irq.h>
#include <csl_chip.h>
#include <csl_timer.h>

#include "seeddm642.h"
#include "seeddm642_ide.h"

/*SEEDDM642的emifa的設(shè)置結(jié)構(gòu)*/
EMIFA_Config Seeddm642ConfigA ={
	   0x00052078,/*gblctl EMIFA(B)global control register value */
	   			  /*將CLK6、4、1使能；將MRMODE置1；使能EK2EN,EK2RATE*/
	   0xffffffd3,/*cectl0 CE0 space control register value*/
	   			  /*將CE0空間設(shè)為SDRAM*/
	   0x73a28e01,/*cectl1 CE1 space control register value*/
	   			  /*Read hold: 1 clock;
	   			    MTYPE : 0000,選擇8位的異步接口
	   			    Read strobe ：001110；14個(gè)clock寬度
	   			    TA：2 clock; Read setup 2 clock;
	   			    Write hold :2 clock; Write strobe: 14 clock
	   			    Write setup :7 clock
	   			    --					 ---------------
	   			  	  \		 14c		/1c
	   			 	   \----------------/ */
	   0xac2ab02f, /*cectl2 CE2 space control register value*/
	   			   /*Read hold :
	   			   */
       0x22a28a42, /*cectl3 CE3 space control register value*/
	   0x57115000, /*sdctl SDRAM control register value*/
	   0x0000081b, /*sdtim SDRAM timing register value*/
	   0x001faf4d, /*sdext SDRAM extension register value*/
	   0x00000002, /*cesec0 CE0 space secondary control register value*/
	   0x00000002, /*cesec1 CE1 space secondary control register value*/
	   0x00000002, /*cesec2 CE2 space secondary control register value*/
	   0x00000073 /*cesec3 CE3 space secondary control register value*/	
};
CHIP_Config SEEDDM642percfg = {
	CHIP_VP2+\
	CHIP_VP1+\
	CHIP_VP0+\
	CHIP_I2C+\
	CHIP_MCASP0
};
ATA_command atacommand;

Uint32 buffer[512];
char view[30];

extern far void vectors();

/*此程序可將四個(gè)采集口的數(shù)據(jù)經(jīng)過(guò)Video Port0送出*/
void main()
{
	Uint32 i,j;
	int ata_data;
/*-------------------------------------------------------*/
/* perform all initializations                           */
/*-------------------------------------------------------*/
	/*Initialise CSL，初始化CSL庫(kù)*/
	CSL_init();
	CHIP_config(&SEEDDM642percfg);
/*----------------------------------------------------------*/
	/*EMIFA的初始化，將CE0設(shè)為SDRAM空間，CE1設(shè)為異步空間
	 注，DM642支持的是EMIFA，而非EMIF*/
	EMIFA_config(&Seeddm642ConfigA);
/*----------------------------------------------------------*/
	/*中斷向量表的初始化*/
	//Point to the IRQ vector table
    IRQ_setVecs(vectors);
    IRQ_nmiEnable();
/*----------------------------------------------------------*/
	for(i = 0;i<512;i++)
	{
		buffer[i] = 0;
	}
/*	for(;;)
	{
		ata_data = ata_status();
		ata_data = ata_data & 0xff;
	}*/
	ata_open();
/*----------------------------------------------------*/
/*確定硬盤的型號(hào)與類型*/	
	/*提交設(shè)備確認(rèn)命令*/
	atacommand.features = 0x100;
	atacommand.sector_count = 0x100;
	atacommand.LBA_l = 0x100;
	atacommand.LBA_M = 0x100;
	atacommand.LBA_H = 0x100;
	atacommand.device = 0x00;
	atacommand.prereq = ATA_BUS_DRDY;
	atacommand.complete_flag = ATA_BUS_DRQ;
	atacommand.com_code = IDENTIFY_DEVICE;
	if(FALSE ==ata_command( &atacommand,
							(Uint32)(&buffer),
							128))
	{
		for(;;){}
	}
	/*顯示序列號(hào)*/
	i = 10;
	j = 0;
	do
	{	
		view[j++] = (buffer[i] >>8) & 0xff;
		view[j++] = buffer[i] & 0xff;
		i++;
	}while(view[j]!= 0x20);
	view[j]= 0x00;
	printf("the Serial number:%s\n",view);
	/*顯示模塊的名稱*/
	i = 27;
	j = 0;
	do
	{	
		view[j++] = (buffer[i] >>8) & 0xff;
		view[j++] = buffer[i] & 0xff;
		i++;
	}while(view[j]!= 0x20);
	view[j] = 0x00;
	printf("the Model number:%s\n",view);
/*-----------------------------------------------------*/
	for(;;){}	
}