?? csl_vphal.h
字號:
#define _VP_AFBASE_PORT1 0x78000000u #define _VP_BFBASE_PORT1 0x7A000000u #endif #if (CHIP_DM642) #define _VP_AFBASE_PORT2 0x7C000000u #define _VP_BFBASE_PORT2 0x7E000000u #endif/******************************************************************************\* module level register/field access macros\******************************************************************************/ /* ----------------- */ /* FIELD MAKE MACROS */ /* ----------------- */ #define VP_FMK(REG,FIELD,x)\ _PER_FMK(VP,##REG,##FIELD,x) #define VP_FMKS(REG,FIELD,SYM)\ _PER_FMKS(VP,##REG,##FIELD,##SYM) /* -------------------------------- */ /* RAW REGISTER/FIELD ACCESS MACROS */ /* -------------------------------- */ #define VP_ADDR(REG)\ _VP_##REG##_ADDR #define VP_RGET(REG)\ _PER_RGET(_VP_##REG##_ADDR,VP,##REG) #define VP_RSET(REG,x)\ _PER_RSET(_VP_##REG##_ADDR,VP,##REG,x) #define VP_FGET(REG,FIELD)\ _VP_##REG##_FGET(##FIELD) #define VP_FSET(REG,FIELD,x)\ _VP_##REG##_FSET(##FIELD,##x) #define VP_FSETS(REG,FIELD,SYM)\ _VP_##REG##_FSETS(##FIELD,##SYM) /* ------------------------------------------ */ /* ADDRESS BASED REGISTER/FIELD ACCESS MACROS */ /* ------------------------------------------ */ #define VP_RGETA(addr,REG)\ _PER_RGET(addr,VP,##REG) #define VP_RSETA(addr,REG,x)\ _PER_RSET(addr,VP,##REG,x) #define VP_FGETA(addr,REG,FIELD)\ _PER_FGET(addr,VP,##REG,##FIELD) #define VP_FSETA(addr,REG,FIELD,x)\ _PER_FSET(addr,VP,##REG,##FIELD,x) #define VP_FSETSA(addr,REG,FIELD,SYM)\ _PER_FSETS(addr,VP,##REG,##FIELD,##SYM) /* ----------------------------------------- */ /* HANDLE BASED REGISTER/FIELD ACCESS MACROS */ /* ----------------------------------------- */ #define VP_ADDRH(h,REG)\ (Uint32)(&((h)->baseAddr[_VP_##REG##_OFFSET])) #define VP_RGETH(h,REG)\ VP_RGETA(VP_ADDRH(h,##REG),##REG) #define VP_RSETH(h,REG,x)\ VP_RSETA(VP_ADDRH(h,##REG),##REG,x) #define VP_FGETH(h,REG,FIELD)\ VP_FGETA(VP_ADDRH(h,##REG),##REG,##FIELD) #define VP_FSETH(h,REG,FIELD,x)\ VP_FSETA(VP_ADDRH(h,##REG),##REG,##FIELD,x) #define VP_FSETSH(h,REG,FIELD,SYM)\ VP_FSETSA(VP_ADDRH(h,##REG),##REG,##FIELD,##SYM)/******************************************************************************\* _____________________* | |* | V P P I D |* |___________________|** VPPID0 - Video Port 0 Peripheral Identification Register* VPPID1 - Video Port 1 Peripheral Identification Register* VPPID2 - Video Port 2 Peripheral Identification Register*** FIELDS (msb -> lsb)* (r) TYPE* (r) CLASS* (r) REVISION*\******************************************************************************/ #define _VP_VPPID_OFFSET 0 #define _VP_VPPID0_ADDR (_VP_BASE_PORT0 + 4*_VP_VPPID_OFFSET) #if (CHIP_DM641 | CHIP_DM642) #define _VP_VPPID1_ADDR (_VP_BASE_PORT1 + 4*_VP_VPPID_OFFSET) #endif #if (CHIP_DM642) #define _VP_VPPID2_ADDR (_VP_BASE_PORT2 + 4*_VP_VPPID_OFFSET) #endif #define _VP_VPPID_TYPE_MASK 0x00FF0000u #define _VP_VPPID_TYPE_SHIFT 0x00000010u #define VP_VPPID_TYPE_DEFAULT 0x00000001u /* spec. 1.4 */ #define VP_VPPID_TYPE_OF(x) _VALUEOF(x) #define _VP_VPPID_CLASS_MASK 0x0000FF00u #define _VP_VPPID_CLASS_SHIFT 0x00000008u #define VP_VPPID_CLASS_DEFAULT 0x00000009u /* spec. 1.4 */ #define VP_VPPID_CLASS_OF(x) _VALUEOF(x) #define _VP_VPPID_REVISION_MASK 0x000000FFu #define _VP_VPPID_REVISION_SHIFT 0x00000000u #define VP_VPPID_REVISION_DEFAULT 0x00000001u /* temp fix, wait for spec. ??? */ #define VP_VPPID_REVISION_OF(x) _VALUEOF(x) #define VP_VPPID_OF(x) _VALUEOF(x) #define VP_VPPID_DEFAULT (Uint32)(\ _PER_FDEFAULT(VP,VPPID,TYPE)\ |_PER_FDEFAULT(VP,VPPID,CLASS)\ |_PER_FDEFAULT(VP,VPPID,REVISION)\ ) #if (!(CHIP_6413 | CHIP_6418 | CHIP_6410)) #define VP_VPPID_RMK(type,class,revision) (Uint32)(\ _PER_FMK(VP,VPPID,TYPE,type)\ |_PER_FMK(VP,VPPID,CLASS,class)\ |_PER_FMK(VP,VPPID,REVISION,revision)\ ) #endif #define _VP_VPPID_FSET(N,FIELD,field)\ _PER_FSET(_VP_VPPID##N##_ADDR,VP,VPPID,##FIELD,field) #define _VP_VPPID_FSETS(N,FIELD,SYM)\ _PER_FSETS(_VP_VPPID##N##_ADDR,VP,VPPID,##FIELD,##SYM) #define _VP_VPPID_FGET(N,FIELD)\ _PER_FGET(_VP_VPPID##N##_ADDR,VP,VPPID,##FIELD) #define _VP_VPPID0_FGET(FIELD) _VP_VPPID_FGET(0,##FIELD) #if (CHIP_DM641 | CHIP_DM642) #define _VP_VPPID1_FGET(FIELD) _VP_VPPID_FGET(1,##FIELD) #endif #if (CHIP_DM642) #define _VP_VPPID2_FGET(FIELD) _VP_VPPID_FGET(2,##FIELD) #endif #define _VP_VPPID0_FSET(FIELD,f) _VP_VPPID_FSET(0,##FIELD,f) #if (CHIP_DM641 | CHIP_DM642) #define _VP_VPPID1_FSET(FIELD,f) _VP_VPPID_FSET(1,##FIELD,f) #endif #if (CHIP_DM642) #define _VP_VPPID2_FSET(FIELD,f) _VP_VPPID_FSET(2,##FIELD,f) #endif #define _VP_VPPID0_FSETS(FIELD,SYM) _VP_VPPID_FSETS(0,##FIELD,##SYM) #if (CHIP_DM641 | CHIP_DM642) #define _VP_VPPID1_FSETS(FIELD,SYM) _VP_VPPID_FSETS(1,##FIELD,##SYM) #endif #if (CHIP_DM642) #define _VP_VPPID2_FSETS(FIELD,SYM) _VP_VPPID_FSETS(2,##FIELD,##SYM) #endif/******************************************************************************\* _____________________* | |* | P C R |* |___________________|** PCR0 - Video Port 0 Peripheral Control Register* PCR1 - Video Port 1 Peripheral Control Register* PCR2 - Video Port 2 Peripheral Control Register** FIELDS (msb -> lsb)* (rw) PEREN* (r) SOFT* (rw) FREE*\******************************************************************************/ #define _VP_PCR_OFFSET 1 #define _VP_PCR0_ADDR (_VP_BASE_PORT0 + 4*_VP_PCR_OFFSET) #if (CHIP_DM641 | CHIP_DM642) #define _VP_PCR1_ADDR (_VP_BASE_PORT1 + 4*_VP_PCR_OFFSET) #endif #if (CHIP_DM642) #define _VP_PCR2_ADDR (_VP_BASE_PORT2 + 4*_VP_PCR_OFFSET) #endif #define _VP_PCR_PEREN_MASK 0x00000004u #define _VP_PCR_PEREN_SHIFT 0x00000002u #define VP_PCR_PEREN_DEFAULT 0x00000000u #define VP_PCR_PEREN_OF(x) _VALUEOF(x) #define VP_PCR_PEREN_DISABLE 0x00000000u #define VP_PCR_PEREN_ENABLE 0x00000001u #define _VP_PCR_SOFT_MASK 0x00000002u #define _VP_PCR_SOFT_SHIFT 0x00000001u #define VP_PCR_SOFT_DEFAULT 0x00000000u #define VP_PCR_SOFT_OF(x) _VALUEOF(x) #define VP_PCR_SOFT_STOP 0x00000000u #define VP_PCR_SOFT_COMP 0x00000001u #define _VP_PCR_FREE_MASK 0x00000001u #define _VP_PCR_FREE_SHIFT 0x00000000u #define VP_PCR_FREE_DEFAULT 0x00000001u #define VP_PCR_FREE_OF(x) _VALUEOF(x) #define VP_PCR_FREE_SOFT 0x00000000u #define VP_PCR_OF(x) _VALUEOF(x) #define VP_PCR_DEFAULT (Uint32)(\ _PER_FDEFAULT(VP,PCR,PEREN)\ |_PER_FDEFAULT(VP,PCR,SOFT)\ |_PER_FDEFAULT(VP,PCR,FREE)\ )#define VP_PCR_RMK(peren,free) (Uint32)(\ _PER_FMK(VP,PCR,PEREN,peren)\ |_PER_FMK(VP,PCR,FREE,free)\ ) #define _VP_PCR_FGET(N,FIELD)\ _PER_FGET(_VP_PCR##N##_ADDR,VP,PCR,##FIELD) #define _VP_PCR_FSET(N,FIELD,field)\ _PER_FSET(_VP_PCR##N##_ADDR,VP,PCR,##FIELD,field) #define _VP_PCR_FSETS(N,FIELD,SYM)\ _PER_FSETS(_VP_PCR##N##_ADDR,VP,PCR,##FIELD,##SYM) #define _VP_PCR0_FGET(FIELD) _VP_PCR_FGET(0,##FIELD) #if (CHIP_DM641 | CHIP_DM642) #define _VP_PCR1_FGET(FIELD) _VP_PCR_FGET(1,##FIELD) #endif #if (CHIP_DM642) #define _VP_PCR2_FGET(FIELD) _VP_PCR_FGET(2,##FIELD) #endif #define _VP_PCR0_FSET(FIELD,f) _VP_PCR_FSET(0,##FIELD,f) #if (CHIP_DM641 | CHIP_DM642) #define _VP_PCR1_FSET(FIELD,f) _VP_PCR_FSET(1,##FIELD,f) #endif #if (CHIP_DM642) #define _VP_PCR2_FSET(FIELD,f) _VP_PCR_FSET(2,##FIELD,f) #endif #define _VP_PCR0_FSETS(FIELD,SYM) _VP_PCR_FSETS(0,##FIELD,##SYM) #if (CHIP_DM641 | CHIP_DM642) #define _VP_PCR1_FSETS(FIELD,SYM) _VP_PCR_FSETS(1,##FIELD,##SYM) #endif #if (CHIP_DM642) #define _VP_PCR2_FSETS(FIELD,SYM) _VP_PCR_FSETS(2,##FIELD,##SYM) #endif /******************************************************************************\* _____________________* | |* | P F U N C |* |___________________|** PFUNC0 - Video Port 0 Pin Function Register* PFUNC1 - Video Port 1 Pin Function Register* PFUNC2 - Video Port 2 Pin Function Register** FIELDS (msb -> lsb)* (rw) PFUNC22* (rw) PFUNC21* (rw) PFUNC20* (rw) PFUNC10* (rw) PFUNC0*\******************************************************************************/ #define _VP_PFUNC_OFFSET 8 #define _VP_PFUNC0_ADDR (_VP_BASE_PORT0 + 4*_VP_PFUNC_OFFSET) #if (CHIP_DM641 | CHIP_DM642) #define _VP_PFUNC1_ADDR (_VP_BASE_PORT1 + 4*_VP_PFUNC_OFFSET) #endif #if (CHIP_DM642) #define _VP_PFUNC2_ADDR (_VP_BASE_PORT2 + 4*_VP_PFUNC_OFFSET) #endif #define _VP_PFUNC_PFUNC22_MASK 0x00400000u #define _VP_PFUNC_PFUNC22_SHIFT 0x00000016u #define VP_PFUNC_PFUNC22_DEFAULT 0x00000000u?? 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