?? csl_emachal.h
字號:
*\******************************************************************************/#define _EMAC_TXCONTROL_ADDR (_EMAC_BASE_ADDR+0x0004u)#define EMAC_TXCONTROL EMAC_REG(TXCONTROL)#define _EMAC_TXCONTROL_TXEN_MASK 0x00000001u#define _EMAC_TXCONTROL_TXEN_SHIFT 0u#define EMAC_TXCONTROL_TXEN_DEFAULT 0x00000000u#define EMAC_TXCONTROL_TXEN_DISABLE 0u#define EMAC_TXCONTROL_TXEN_ENABLE 1u/******************************************************************************\* _____________________* | |* | TXTEARDOWN |* |___________________|** TXTEARDOWN - TX Teardown Register** FIELDS (msb -> lsb)* (w) TXTDNCH - Teardown Channel Number** MACROS SUPPORTED* EMAC_FMK y* EMAC_FMKS .* EMAC_FMKCHF .* EMAC_ADDR y* EMAC_REG y* EMAC_RGET y* EMAC_RSET y* EMAC_FGET y* EMAC_FSET y* EMAC_FSETS .* EMAC_RGETI .* EMAC_RSETI .* EMAC_FGETI .* EMAC_FSETI .* EMAC_FSETSI .*\******************************************************************************/#define _EMAC_TXTEARDOWN_ADDR (_EMAC_BASE_ADDR+0x0008u)#define EMAC_TXTEARDOWN EMAC_REG(TXTEARDOWN)#define _EMAC_TXTEARDOWN_TXTDNCH_MASK 0x00000007u#define _EMAC_TXTEARDOWN_TXTDNCH_SHIFT 0u#define EMAC_TXTEARDOWN_TXTDNCH_DEFAULT 0x00000000u/******************************************************************************\* _____________________* | |* | RXIDVER |* |___________________|** RXIDVER - RX Identification and Version Register** FIELDS (msb -> lsb)* (r) RXIDENT* (r) RXMAJORVER* (r) RXMINORVER** MACROS SUPPORTED* EMAC_FMK y* EMAC_FMKS .* EMAC_FMKCHF .* EMAC_ADDR y* EMAC_REG y* EMAC_RGET y* EMAC_RSET y* EMAC_FGET y* EMAC_FSET y* EMAC_FSETS .* EMAC_RGETI .* EMAC_RSETI .* EMAC_FGETI .* EMAC_FSETI .* EMAC_FSETSI .*\******************************************************************************/#define _EMAC_RXIDVER_ADDR (_EMAC_BASE_ADDR+0x0010u)#define EMAC_RXIDVER EMAC_REG(RXIDVER)#define _EMAC_RXIDVER_RXIDENT_MASK 0xFFFF0000u#define _EMAC_RXIDVER_RXIDENT_SHIFT 16u#define EMAC_RXIDVER_RXIDENT_DEFAULT 0x00000004u#define _EMAC_RXIDVER_RXMAJORVER_MASK 0x0000FF00u#define _EMAC_RXIDVER_RXMAJORVER_SHIFT 8u#define EMAC_RXIDVER_RXMAJORVER_DEFAULT 0x00000000u#define _EMAC_RXIDVER_RXMINORVER_MASK 0x000000FFu#define _EMAC_RXIDVER_RXMINORVER_SHIFT 0u#define EMAC_RXIDVER_RXMINORVER_DEFAULT 0x00000000u/******************************************************************************\* _____________________* | |* | RXCONTROL |* |___________________|** RXCONTROL - RX Control Register** FIELDS (msb -> lsb)* (rw) RXEN - Receive Enable** MACROS SUPPORTED* EMAC_FMK y* EMAC_FMKS y* EMAC_FMKCHF .* EMAC_ADDR y* EMAC_REG y* EMAC_RGET y* EMAC_RSET y* EMAC_FGET y* EMAC_FSET y* EMAC_FSETS y* EMAC_RGETI .* EMAC_RSETI .* EMAC_FGETI .* EMAC_FSETI .* EMAC_FSETSI .*\******************************************************************************/#define _EMAC_RXCONTROL_ADDR (_EMAC_BASE_ADDR+0x0014u)#define EMAC_RXCONTROL EMAC_REG(RXCONTROL)#define _EMAC_RXCONTROL_RXEN_MASK 0x00000001u#define _EMAC_RXCONTROL_RXEN_SHIFT 0u#define EMAC_RXCONTROL_RXEN_DEFAULT 0x00000000u#define EMAC_RXCONTROL_RXEN_DISABLE 0u#define EMAC_RXCONTROL_RXEN_ENABLE 1u/******************************************************************************\* _____________________* | |* | RXTEARDOWN |* |___________________|** RXTEARDOWN - RX Teardown Register** FIELDS (msb -> lsb)* (w) RXTDNCH - Teardown Channel Number** MACROS SUPPORTED* EMAC_FMK y* EMAC_FMKS .* EMAC_FMKCHF .* EMAC_ADDR y* EMAC_RGET y* EMAC_RSET y* EMAC_FGET y* EMAC_FSET y* EMAC_FSETS .* EMAC_RGETI .* EMAC_RSETI .* EMAC_FGETI .* EMAC_FSETI .* EMAC_FSETSI .*\******************************************************************************/#define _EMAC_RXTEARDOWN_ADDR (_EMAC_BASE_ADDR+0x0018u)#define EMAC_RXTEARDOWN EMAC_REG(RXTEARDOWN)#define _EMAC_RXTEARDOWN_RXTDNCH_MASK 0x000000007u#define _EMAC_RXTEARDOWN_RXTDNCH_SHIFT 0u#define EMAC_RXTEARDOWN_RXTDNCH_DEFAULT 0x00000000u/******************************************************************************\* _____________________* | |* | RXMBPENABLE |* |___________________|** RXMBPENABLE - RX Mulicast/Bcast/Promisc Channel Enable Register** FIELDS (msb -> lsb)* (rw) RXPASSCRC - Pass Receive CRC* (rw) RXQOSEN - RX QOS Enable* (rw) RXNOCHAIN - RX No Buffer Chaining* (rw) RXCMFEN - RX Copy MAC Control Frames Enable* (rw) RXCSFEN - RX Copy Short Frames Enable* (rw) RXCEFEN - RX Copy Error Frames Enable* (rw) RXCAFEN - RX Copy All Frames Enable* (rw) RXPROMCH - RX Promiscusous Channel Select* (rw) RXBROADEN - RX Broadcast Frame Enable* (rw) RXBROADCH - RX Broadcast Channel Select* (rw) RXMULTEN - RX Multicast Enable* (rw) RXMULTCH - RX Multicast Channel Select** MACROS SUPPORTED* EMAC_FMK y* EMAC_FMKS y* EMAC_FMKCHF .* EMAC_ADDR y* EMAC_REG y* EMAC_RGET y* EMAC_RSET y* EMAC_FGET y* EMAC_FSET y* EMAC_FSETS y* EMAC_RGETI .* EMAC_RSETI .* EMAC_FGETI .* EMAC_FSETI .* EMAC_FSETSI .*\******************************************************************************/#define _EMAC_RXMBPENABLE_ADDR (_EMAC_BASE_ADDR+0x0100u)#define EMAC_RXMBPENABLE EMAC_REG(RXMBPENABLE)#define _EMAC_RXMBPENABLE_RXPASSCRC_MASK 0x40000000u#define _EMAC_RXMBPENABLE_RXPASSCRC_SHIFT 30u#define EMAC_RXMBPENABLE_RXPASSCRC_DEFAULT 0x00000000u#define EMAC_RXMBPENABLE_RXPASSCRC_DISCARD 0u#define EMAC_RXMBPENABLE_RXPASSCRC_INCLUDE 1u#define _EMAC_RXMBPENABLE_RXQOSEN_MASK 0x20000000u#define _EMAC_RXMBPENABLE_RXQOSEN_SHIFT 29u#define EMAC_RXMBPENABLE_RXQOSEN_DEFAULT 0x00000000u#define EMAC_RXMBPENABLE_RXQOSEN_DISABLE 0u#define EMAC_RXMBPENABLE_RXQOSEN_ENABLE 1u#define _EMAC_RXMBPENABLE_RXNOCHAIN_MASK 0x10000000u#define _EMAC_RXMBPENABLE_RXNOCHAIN_SHIFT 28u#define EMAC_RXMBPENABLE_RXNOCHAIN_DEFAULT 0x00000000u#define EMAC_RXMBPENABLE_RXNOCHAIN_DISABLE 0u#define EMAC_RXMBPENABLE_RXNOCHAIN_ENABLE 1u#define _EMAC_RXMBPENABLE_RXCMFEN_MASK 0x01000000u#define _EMAC_RXMBPENABLE_RXCMFEN_SHIFT 24u#define EMAC_RXMBPENABLE_RXCMFEN_DEFAULT 0x00000000u#define EMAC_RXMBPENABLE_RXCMFEN_DISABLE 0u#define EMAC_RXMBPENABLE_RXCMFEN_ENABLE 1u#define _EMAC_RXMBPENABLE_RXCSFEN_MASK 0x00800000u#define _EMAC_RXMBPENABLE_RXCSFEN_SHIFT 23u#define EMAC_RXMBPENABLE_RXCSFEN_DEFAULT 0x00000000u#define EMAC_RXMBPENABLE_RXCSFEN_DISABLE 0u#define EMAC_RXMBPENABLE_RXCSFEN_ENABLE 1u#define _EMAC_RXMBPENABLE_RXCEFEN_MASK 0x00400000u#define _EMAC_RXMBPENABLE_RXCEFEN_SHIFT 22u#define EMAC_RXMBPENABLE_RXCEFEN_DEFAULT 0x00000000u#define EMAC_RXMBPENABLE_RXCEFEN_DISABLE 0u#define EMAC_RXMBPENABLE_RXCEFEN_ENABLE 1u#define _EMAC_RXMBPENABLE_RXCAFEN_MASK 0x00200000u#define _EMAC_RXMBPENABLE_RXCAFEN_SHIFT 21u#define EMAC_RXMBPENABLE_RXCAFEN_DEFAULT 0x00000000u#define EMAC_RXMBPENABLE_RXCAFEN_DISABLE 0u#define EMAC_RXMBPENABLE_RXCAFEN_ENABLE 1u#define _EMAC_RXMBPENABLE_PROMCH_MASK 0x00070000u#define _EMAC_RXMBPENABLE_PROMCH_SHIFT 16u#define EMAC_RXMBPENABLE_PROMCH_DEFAULT 0x00000000u#define _EMAC_RXMBPENABLE_BROADEN_MASK 0x00002000u#define _EMAC_RXMBPENABLE_BROADEN_SHIFT 13u#define EMAC_RXMBPENABLE_BROADEN_DEFAULT 0x00000000u#define EMAC_RXMBPENABLE_BROADEN_DISABLE 0u#define EMAC_RXMBPENABLE_BROADEN_ENABLE 1u#define _EMAC_RXMBPENABLE_BROADCH_MASK 0x00000700u#define _EMAC_RXMBPENABLE_BROADCH_SHIFT 8u#define EMAC_RXMBPENABLE_BROADCH_DEFAULT 0x00000000u#define _EMAC_RXMBPENABLE_MULTEN_MASK 0x00000020u#define _EMAC_RXMBPENABLE_MULTEN_SHIFT 5u#define EMAC_RXMBPENABLE_MULTEN_DEFAULT 0x00000000u#define EMAC_RXMBPENABLE_MULTEN_DISABLE 0u#define EMAC_RXMBPENABLE_MULTEN_ENABLE 1u#define _EMAC_RXMBPENABLE_MULTCH_MASK 0x00000007u#define _EMAC_RXMBPENABLE_MULTCH_SHIFT 0u#define EMAC_RXMBPENABLE_MULTCH_DEFAULT 0x00000000u/******************************************************************************\* _____________________* | |* | RXUNICASTSET |* | RXUNICASTCLEAR |* |___________________|** RXUNICASTSET - RX Unicast Set Register* RXUNICASTCLEAR - RX Unicast Clear Register** FIELDS (msb -> lsb)* (r/ws)(r/wc) Channel Flags (use EMAC_FMKCHF)** MACROS SUPPORTED* EMAC_FMK .* EMAC_FMKS .* EMAC_FMKCHF y* EMAC_ADDR y* EMAC_REG y* EMAC_RGET y* EMAC_RSET y* EMAC_FGET .* EMAC_FSET .* EMAC_FSETS .* EMAC_RGETI .* EMAC_RSETI .* EMAC_FGETI .* EMAC_FSETI .* EMAC_FSETSI .*\******************************************************************************/#define _EMAC_RXUNICASTSET_ADDR (_EMAC_BASE_ADDR+0x0104u)#define _EMAC_RXUNICASTCLEAR_ADDR (_EMAC_BASE_ADDR+0x0108u)#define EMAC_RXUNICASTSET EMAC_REG(RXUNICASTSET)#define EMAC_RXUNICASTCLEAR EMAC_REG(RXUNICASTCLEAR)/******************************************************************************\* _____________________* | |* | RXMAXLEN |* |___________________|** MAXLEN - RX Maximum Length Register** FIELDS (msb -> lsb)* (rw) RXMAXLEN** MACROS SUPPORTED* EMAC_FMK y* EMAC_FMKS .* EMAC_FMKCHF .* EMAC_ADDR y* EMAC_REG y* EMAC_RGET y* EMAC_RSET y* EMAC_FGET y* EMAC_FSET y* EMAC_FSETS .* EMAC_RGETI .* EMAC_RSETI .* EMAC_FGETI .* EMAC_FSETI .* EMAC_FSETSI .*\******************************************************************************/#define _EMAC_RXMAXLEN_ADDR (_EMAC_BASE_ADDR+0x010Cu)#define EMAC_RXMAXLEN EMAC_REG(RXMAXLEN)#define _EMAC_RXMAXLEN_MAXLEN_MASK 0x0000FFFFu#define _EMAC_RXMAXLEN_MAXLEN_SHIFT 0u#define EMAC_RXMAXLEN_MAXLEN_DEFAULT 0x000005EEu/******************************************************************************\* _____________________?? 快捷鍵說明
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