; generated by ARM/Thumb C/C++ Compiler with , RVCT3.0 [Build 951] for uVision
; commandline ArmCC [--debug -c --asm --interleave -o"G:\BYSJ CODE\TEST SPI\output\spi.o" --device=DARMP --apcs=interwork -O0 -IC:\Keil\ARM\INC\Philips "G:\BYSJ CODE\TEST SPI\SPI\SPI.C"]

                          ARM

                          AREA ||.text.7||, CODE, READONLY, ALIGN=2

                  SSP_Init PROC
;;;8      	  
;;;9      	 PINSEL1|=(2<<2);//設(shè)置 LED的SPI時(shí)鐘功能 口
000000  e59f00cc          LDR      r0,|L1.212|
000004  e5900004          LDR      r0,[r0,#4]
000008  e3800008          ORR      r0,r0,#8
00000c  e59f10c0          LDR      r1,|L1.212|
000010  e5810004          STR      r0,[r1,#4]
;;;10      	 PINSEL1|=(2<<6);//設(shè)置 LED的MOSI數(shù)據(jù) 發(fā)送功能 口
000014  e1a00001          MOV      r0,r1
000018  e5900004          LDR      r0,[r0,#4]
00001c  e3800080          ORR      r0,r0,#0x80
000020  e5810004          STR      r0,[r1,#4]
;;;11       	 PINSEL1|=(2<<4);//set 74HC165   MISO
000024  e1a00001          MOV      r0,r1
000028  e5900004          LDR      r0,[r0,#4]
00002c  e3800020          ORR      r0,r0,#0x20
000030  e5810004          STR      r0,[r1,#4]
;;;12      	 IO1DIR |=HC595_CS;//
000034  e2410901          SUB      r0,r1,#0x4000
000038  e5900018          LDR      r0,[r0,#0x18]
00003c  e3800601          ORR      r0,r0,#0x100000
000040  e2411901          SUB      r1,r1,#0x4000
000044  e5810018          STR      r0,[r1,#0x18]
;;;13      	 IO0DIR |=HC165_SH_LD;
000048  e1a00001          MOV      r0,r1
00004c  e5900008          LDR      r0,[r0,#8]
000050  e3800601          ORR      r0,r0,#0x100000
000054  e5810008          STR      r0,[r1,#8]
;;;14     
;;;15         PCONP |= 1<<10;//SSP  POWER   ENABLE
000058  e2810975          ADD      r0,r1,#0x1d4000
00005c  e59000c4          LDR      r0,[r0,#0xc4]
000060  e3800b01          ORR      r0,r0,#0x400
000064  e2811975          ADD      r1,r1,#0x1d4000
000068  e58100c4          STR      r0,[r1,#0xc4]
;;;16         SSPCR0 = (0x01 << 8) |              // SCR  設(shè)置SPI時(shí)鐘分頻
00006c  e59f0064          LDR      r0,|L1.216|
000070  e2411965          SUB      r1,r1,#0x194000
000074  e1c100b0          STRH     r0,[r1,#0]
;;;17                  (0x00 << 7) |              // CPHA 時(shí)鐘輸出相位,僅SPI模式有效 
;;;18                  (0x00 << 6) |              // CPOL 時(shí)鐘輸出極性,僅SPI模式有效
;;;19                  (0x00 << 4) |              // FRF  幀格式 00=SPI,01=SSI,10=Microwire,11=保留
;;;20                  (0x07 << 0);               // DSS  數(shù)據(jù)長度,0000-0010=保留,0011=4位,0111=8位,1111=16位
;;;21     
;;;22         SSPCR1 = (0x00 << 3) |              // SOD  從機(jī)輸出禁能,1=禁止,0=允許
000078  e3a00002          MOV      r0,#2
00007c  e5c10004          STRB     r0,[r1,#4]
;;;23                  (0x00 << 2) |              // MS   主從選擇,0=主機(jī),1=從機(jī)
;;;24                  (0x01 << 1) |              // SSE  SSP使能,1=允許SSP與其它設(shè)備通信
;;;25                  (0x00 << 0);               // LBM  回寫模式        
;;;26         SSPCPSR = 0x52;  						 //預(yù)分頻
000080  e3a00052          MOV      r0,#0x52
000084  e5c10010          STRB     r0,[r1,#0x10]
;;;27     
;;;28     }
000088  e12fff1e          BX       lr
                          ENDP

                  SSP_SendData PROC
;;;38     uint8  SSP_SendData(uint8 data)
;;;39     {  
00008c  e1a01000          MOV      r1,r0
;;;40         IO1CLR = HC595_CS;			        // 選擇從機(jī)   
000090  e3a00601          MOV      r0,#0x100000
000094  e59f2040          LDR      r2,|L1.220|
000098  e582001c          STR      r0,[r2,#0x1c]
;;;41         SSPDR = data;
00009c  e1820140          ORR      r0,r2,r0,ASR #2
0000a0  e1c010b8          STRH     r1,[r0,#8]
;;;42         while( (SSPSR & 0x01) == 0 );	    // 等待TFE置位，即發(fā)送FIFO空   
0000a4  e1a00000          MOV      r0,r0
                  |L1.168|
0000a8  e59f0030          LDR      r0,|L1.224|
0000ac  e5d0000c          LDRB     r0,[r0,#0xc]
0000b0  e3100001          TST      r0,#1
0000b4  0afffffb          BEQ      |L1.168|
;;;43         IO1SET = HC595_CS;
0000b8  e3a00601          MOV      r0,#0x100000
0000bc  e59f2018          LDR      r2,|L1.220|
0000c0  e5820014          STR      r0,[r2,#0x14]
;;;44         return(SSPDR);
0000c4  e1820140          ORR      r0,r2,r0,ASR #2
0000c8  e1d000b8          LDRH     r0,[r0,#8]
0000cc  e20000ff          AND      r0,r0,#0xff
;;;45     }
0000d0  e12fff1e          BX       lr
                  |L1.212|
0000d4  e002c000          DCD      0xe002c000
                  |L1.216|
0000d8  00000107          DCD      0x00000107
                  |L1.220|
0000dc  e0028000          DCD      0xe0028000
                  |L1.224|
0000e0  e0068000          DCD      0xe0068000
                          ENDP