?? dal.h
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//
// Copyright (c) Microsoft Corporation. All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
/****************************************************************************\
*
* Module Name dal.h
* Project ATI Display Abstraction Layer
* Device RageProPNP / Rage128 (Win95/98 & WinNT 4.0/5.0)
*
* Description header file for Display Abstraction Layer 0.90
*
*
* (c) 1998-2002 ATI Technologies Inc. (unpublished)
*
* All rights reserved. This notice is intended as a precaution against
* inadvertent publication and does not imply publication or any waiver
* of confidentiality. The year included in the foregoing notice is the
* year of creation of the work.
*
* Refer to DAL Developers Guide & Programming Reference Rev 0.90 for usage
*
\****************************************************************************/
#ifndef _DAL_H
#define _DAL_H
#ifdef WIN9X_BUILD
#include <windows.h>
#include <memory.h>
#include <string.h>
#endif
#ifdef CE_BUILD
#include <windows.h>
#include <ceddk.h>
#include <memory.h>
#include <string.h>
//#define VIDEO_MODE_INFORMATION VOID
//typedef VOID * LPVIDEOPARAMETERS;
//typedef VOID * PVIDEO_X86_BIOS_ARGUMENTS;
typedef VOID * PMINIPORT_SYNCHRONIZE_ROUTINE;
#endif //CE_BUILD
#ifdef NT_BUILD
// #include <miniport.h>
// #include <ntddvdeo.h>
// #include <video.h>
#endif
#ifdef DEBUG
#ifndef DBG
#define DBG
#endif
#endif
#ifdef __cplusplus
extern "C" {
#endif
#if defined(_X86_)
#pragma pack(1)
#endif
#define BIOS_INFO_TABLE_OFFSET 0x0078
#define BIOS_INFO_TABLE_SIGNATURE 0x54504C24 // for '$LPT'
#define DRIVER_OPTIONS_16BPP_555 0x00000001 // By default we will assume
// 565 for 16 bpp. If this flag
// is set in DDLGetDriverOptions
// return value we will use 555
#define DAL_DEFAULT_ADAPTER_FREQUENCY 60
#define DAL_OPTIMUM_ADAPTER_FREQUENCY 250
#define DAL_DEFAULT_RETRYDDCWRITETIMES 0
#define DAL_ADJUSTMENT_OK 1
#define DAL_ADJUSTMENT_FAILED 2
#define DAL_ADJUSTMENT_REBOOT_REQUIRED 3
#define DAL_SET_DISPLAY_ADJUSTMENTS 1
#define DAL_GET_DISPLAY_ADJUSTMENTS 2
#define DAL_SET_DISPLAY_DEFAULT_ADJUSTMENTS 3
#define DAL_SET_DEFAULT_OBJECTMAP 0
#define DAL_SET_OBJECTMAP_DEFAULTS_ON_PRIMARY 1
#define DAL_SET_OBJECTMAP_DEFAULTS_1_DEVICE_CRT 2
#define DAL_ENABLE_DRIVER_OK 1
#define DAL_ENABLE_DRIVER_DISPLAY_ALLOC_FAILURE 2
#define DAL_ENABLE_DRIVER_CONTROLLER_ALLOC__FAILURE 3
#define DAL_ENABLE_DRIVER_BANDWIDTH_FAILURE 4
#define DAL_ENABLE_DRIVER_INVALID_DRIVER_ID 5
#define DAL_ENABLE_DRIVER_NOT_ENUOGH_DISPLAYS 6
#define DAL_ENABLE_DRIVER_DISPLAYS_FOR_PRIMARY_INVALID 7
#define DAL_HTIME_ADJUSTMENT_BASIC 0
#define DAL_HTIME_ADJUSTMENT_ONE_CONTROLLER 1
#define DAL_HTIME_ADJUSTMENT_TWO_CONTROLLERS 2
#define DAL_GETEXPANSIONSETTING_CMOS 0
#define DAL_GETEXPANSIONSETTING_HW 1
#define CRC_ENABLE 1
#define CRC_READ 2
#define CRC_NOTREADY 0
#define DAL_PRIMARY_CONTROLLER 0
#define DAL_SECONDARY_CONTROLLER 1
#define DAL_VGA_CONTROLLER DAL_PRIMARY_CONTROLLER
#define MMR_MEMMAPPED_REG 1
#define MMR_INDEXED_REG 2
/******************************Public*Definition*****************************\
*
* WINDOWS TYPE DEFINITIONS
*
\****************************************************************************/
#ifdef _MINIPORT_
#define FAR
typedef unsigned long BOOL;
typedef UCHAR BYTE;
typedef HANDLE FAR LPHANDLE;
typedef struct _POINT
{
LONG x;
LONG y;
} POINT, FAR *LPPOINT;
typedef struct tagSIZE
{
LONG cx;
LONG cy;
} SIZE, FAR *LPSIZE;
typedef struct _RECT
{
LONG left;
LONG top;
LONG right;
LONG bottom;
} RECT, FAR *LPRECT;
#endif
#ifdef _INC_WINDOWS
#define BOOL ULONG
typedef char CHAR;
typedef unsigned char UCHAR;
typedef short SHORT;
typedef unsigned short USHORT;
typedef unsigned long ULONG;
typedef unsigned short wchar_t;
typedef wchar_t WCHAR;
typedef struct _W9X_POINT
{
LONG x;
LONG y;
} W9XPOINT, FAR *LPW9XPOINT;
typedef struct tagW9X_SIZE
{
LONG cx;
LONG cy;
} W9XSIZE, FAR *LPW9XSIZE;
typedef struct _W9X_RECT
{
LONG left;
LONG top;
LONG right;
LONG bottom;
} W9XRECT, FAR *LPW9XRECT;
#define POINT W9XPOINT
#define SIZE W9XSIZE
#define RECT W9XRECT
#define LPPOINT LPW9XPOINT
#define LPSIZE LPW9XSIZE
#define LPRECT LPW9XRECT
#endif
typedef CHAR FAR *LPCHAR;
typedef void FAR *LPVOID;
typedef LONG FAR *LPLONG;
typedef ULONG FAR *LPULONG;
typedef UCHAR FAR *LPUCHAR;
typedef SHORT FAR *LPSHORT;
typedef USHORT FAR *LPUSHORT;
#if !defined(NTBUILD) && (_WIN32_WINNT < 0x500) && !defined(ULONG_PTR)
typedef ULONG ULONG_PTR;
#endif
typedef struct _FIXEDPOINT FIXEDPOINT;
typedef struct _FIXEDPOINT FAR *LPFIXEDPOINT;
typedef struct _BANDWID_TIME BANDWID_TIME;
typedef struct _BANDWID_TIME FAR *LPBANDWID_TIME;
/******************************Public*Definition*****************************\
*
* DEFINED VALUES
*
\****************************************************************************/
#define MAX_NUMBER_ENGINE 2
#define MAX_NUMBER_CONTROLLERS 2
#define MAX_NUMBER_DISPLAYS 7
#define HW_CONTROLLER_EXTENSION_SIZE 9216
#define HW_DISPLAY_EXTENSION_SIZE 2048
#define MAX_LCD_REFRESH_COUNT 3
#define HW_DISPLAY_TYPE_CRT 0x00000001
#define HW_DISPLAY_TYPE_LCD 0x00000002
#define HW_DISPLAY_TYPE_TV 0x00000004
#define HW_DISPLAY_TYPE_DFP 0x00000008
#define HW_DISPLAY_TYPE_CRT_2NDDAC 0x00000010
#define HW_DISPLAY_TYPE_DFP_EXTTMDS 0x00000020
#define HW_DISPLAY_TYPE_CV 0x00000040
#define HW_DISPLAY_RESERVED07 0x00000080
#define HW_DISPLAY_RESERVED08 0x00000100
#define HW_DISPLAY_RESERVED09 0x00000200
#define HW_DISPLAY_RESERVED0A 0x00000400
#define HW_DISPLAY_RESERVED0B 0x00000800
#define HW_DISPLAY_RESERVED0C 0x00001000
#define HW_DISPLAY_RESERVED0D 0x00002000
#define HW_DISPLAY_RESERVED0E 0x00004000
#define HW_DISPLAY_RESERVED0F 0x00008000
#define HW_DISPLAY_RESERVED10 0x00010000
#define HW_DISPLAY_RESERVED11 0x00020000
#define HW_DISPLAY_RESERVED12 0x00040000
#define HW_DISPLAY_RESERVED13 0x00080000
#define HW_DISPLAY_RESERVED14 0x00100000
#define HW_DISPLAY_RESERVED15 0x00200000
#define HW_DISPLAY_RESERVED16 0x00400000
#define HW_DISPLAY_RESERVED17 0x00800000
#define HW_DISPLAY_RESERVED18 0x01000000
#define HW_DISPLAY_RESERVED19 0x02000000
#define HW_DISPLAY_DFP_MULTISYNC 0x04000000
#define HW_DISPLAY_DFP_EXPANSION 0x08000000
#define HW_DISPLAY_DFP 0x10000000
#define HW_DISPLAY_EXPANSION 0x20000000
#define HW_DISPLAY_TV_STANDARD_PAL 0x40000000
#define HW_DISPLAY_TV_STANDARD_NTSC 0x80000000
#define HW_DISPLAY_UNKNOWN 0x00000000
// DFP bootup behavior, define just display types mask - VG
#define HW_DISPLAY_TYPES_MASK (HW_DISPLAY_TYPE_CRT \
| HW_DISPLAY_TYPE_LCD \
| HW_DISPLAY_TYPE_TV \
| HW_DISPLAY_TYPE_DFP \
| HW_DISPLAY_TYPE_CV \
| HW_DISPLAY_TYPE_CRT_2NDDAC \
| HW_DISPLAY_TYPE_DFP_EXTTMDS)
#define HW_DISPLAY_TYPES_CRT_MASK ( HW_DISPLAY_TYPE_CRT \
|HW_DISPLAY_TYPE_CRT_2NDDAC)
#define HW_DISPLAY_TYPES_DFP_MASK ( HW_DISPLAY_TYPE_DFP \
|HW_DISPLAY_TYPE_DFP_EXTTMDS)
#define HW_DISPLAY_TYPES_DIGITAL_MASK ( HW_DISPLAY_TYPE_LCD \
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