//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
// Description  Header for the DDL32.C module of the ATIRAGE miniport.
//
//  (C) 1998 ATI Technologies Inc. (unpublished)
//
// All rights reserved. This notice is intended as a precaution against
// inadvertent publication and does not imply publication or any waiver
// of confidentiality. The year included in the foregoing notice is the
// year of creation of the work.
//


#include <ddkreg.h>
//
// Defines specific to our DDL.
//
#define DALREGKEY_MONITOR_H_RES         "Monitor H Res"
#define DALREGKEY_MONITOR_V_RES         "Monitor V Res"
#define DALREGKEY_MONITOR_REFRESH       "Monitor Refresh"
#define DALREGKEY_MONITOR_USE_OVERRIDE  "Monitor Use Override"
#define DALREGKEY_MONITOR_USE_DDC       "Monitor Use DDC"

#if (_WIN32_WINNT > 0x500)
#define DALREGKEY_REGISTRY_PATH         ""

#else   // (_WIN32_WINNT > 0x500)
#define DALREGKEY_REGISTRY_PATH         "SYSTEM\\CurrentControlSet\\Services\\ati2mpad\\Device0"

#endif  // (_WIN32_WINNT > 0x500)

#define DALREGKEY_REGISTRY_PATH_SIZE    256

//
// Define the default Adapter ID as zero (make sure it's a string).
//

#define DDL_ADAPTERID                   "0000"
#define BIOS_BUFFER_SIZE                1024

//
// Flags that may be defined in the inf for ASIC-specific fixes.
//

#define DDLREGOPTION_ALWAYSSETOPTIMUM      "DDLRProRegOptionAlwaysSetOptimum"
#define DDLREGOPTION_PATCHLCDSYNCPROBLEM   "DDLRProRegOptionPatchLcdSyncProblem"
#define DDLREGOPTION_PLLPROBLEMNBLANKDELAY "DDLRProRegOptionPLLProblemNBlankDelay"

//
// Stores buffer data for generic data type registry reads.
//
typedef struct _DDLBUFFER_INFO
{
    PVOID  pvBuffer;                                // Points to actual buffer where data will be written
    PULONG pulLength;                               // Max number of bytes to read from registry
} DDLBUFFER_INFO, *PDDLBUFFER_INFO;

typedef struct _HW_DEVICE_EXTENSION
{
    PVOID           pvAuxBaseAddress;                // Mapped Register Access Window (REG) address
    PVOID           pvIoBaseAddress;
    PHYSICAL_ADDRESS lfbPhysicalAddress;
    PHYSICAL_ADDRESS romPhysicalAddress;                // Base physical address of ATI ROM
    PVOID           pvLfbBaseAddress;                             // Mapped logical base address of LFB aperture
    ULONG          ulRomLength;                                  // Length in bytes of ATI ROM
    PVOID           pvRomBaseAddress;                             // Mapped logical base address of ATI ROM image
    ULONG          ulConfigChipId;
    ULONG          ulVideoRamType;                  // hard coded to SDRAM for the moment.
    ULONG          ulVideoRamSizeAvailable;
    ULONG          ulRomHeaderOffset;             
    ULONG          ulRomHeaderLength;
    ULONG          ulVideoRamSizeInstalled;
    SDALMEM     aAdditionalMemSeg;
    ULONG          ulHDALSize;
    ULONG          ulDALSize;
    HDAL             hDal;
    ULONG          ulTargetDelay;
    DWORD        dwBpp;

    DWORD        dwPCIBusNumber;
    ULONG         ulPCISlotNumber;

    ULONG         ulControllerVector;
    
    USHORT usREF_FREQ;                                  // Reference clock frequency / 10000
    USHORT usREF_DIVIDER;                               // Reference clock divider
    USHORT usMIN_FREQ;                                  // Min frequency (divided)
    USHORT usMAX_FREQ;                                  // Max frequency
    USHORT usMCLK_FREQ;                                 // MCLK normal frequency (DRAM)
    USHORT usXCLK_FREQ;                                 // XCLK normal frequency (DRAM)
    UCHAR ucCX_PROG_CLK;                                // VCLK selector

    USHORT usCRTC1VClockFrequency;                      // Current CRTC_1 VCLK frequency / 10000
    // USHORT usCRTC2VClockFrequency;                      // Current CRTC_2 VCLK frequency / 10000

    // registry entry for initialize SubSystemID & SubVendorID in PCI configuration space
    // only for VGA-Disabled adapters.
    ULONG                       bLoadSubSystemID;

    // new fields for subsystem and subvendor ID in PCI Config Space
    USHORT SubVendorID;
    USHORT SubSystemID;

    PVOID   pvRomImage;
    PVOID   pvInitPLL;
    PVOID   pvInitExtendedRegisters;
    PVOID   pvInitMemory;

    BOOL    bDisableOverlay;
    ULONG  ulDisableOverlay;

} HW_DEVICE_EXTENSION, *PHW_DEVICE_EXTENSION;

extern PHW_DEVICE_EXTENSION pHwDeviceExtension[4];
extern DWORD gdwMMIndex;     // Global index used to select the proper HW_Device_Extension in Multimon configs


typedef struct _MP_BIOS_INFO_TABLE
{
    UCHAR   ucInfoTableSignature[4];
    UCHAR   ucInfoTableRevision;
    UCHAR   ucOffsetToBiosInfoTableSize;
    USHORT  usOffsetToCrtParameterTable;
    USHORT  usOffsetToCrtParameterTableSize;
    USHORT  usOffsetToLcdParameterTable;
    USHORT  usOffsetToTvParameterTable;
    USHORT  usRefDivider;
    USHORT  usMinFreq;
    USHORT  usMaxFreq;
    USHORT  usRefFreq;
    USHORT  usOffsetToHardwareInfoTable;
    USHORT  usOffsetToMultiMediaTable;
    USHORT  usBiosFeaturesSupported;    // Defined only for valid ucInfoTableRevision values
} MP_BIOS_INFO_TABLE, FAR *LP_MP_BIOS_INFO_TABLE;


// Prototypes
DWORD
ReadRomImage(
    PVOID pvDestination,
    ULONG ulRomOffset,
    ULONG ulLength
    );

ULONG FAR
DDLGetReferenceFreq(
    HDDL hDDL
    );

VOID FAR
DDLSbcToDbc(
    HDDL hDDL,
    LPUCHAR pStringName,
    LPUCHAR lpDoubleByte
    );