SYNCDELAY;                    // 
  GPIFADRH = 0x00;    // bits[7:1] always 0
  SYNCDELAY;                    // 
  GPIFADRL = 0x00;    // point to PERIPHERAL address 0x0000
}

#ifdef TESTING_GPIF
// TODO: You may add additional code below.

void OtherInit( void )
{ // interface initialization
  // ...see TD_Init( );
}

// Set Address GPIFADR[8:0] to PERIPHERAL
void Peripheral_SetAddress( WORD gaddr )
{
  SYNCDELAY;                    // 
  GPIFADRH = gaddr >> 8;
  SYNCDELAY;                    // 
  GPIFADRL = ( BYTE )gaddr; // setup GPIF address 
}

// Set EP2GPIF Transaction Count
void Peripheral_SetEP2GPIFTC( WORD xfrcnt )
{
  SYNCDELAY;                    // 
  EP2GPIFTCH = xfrcnt >> 8;  // setup transaction count
  SYNCDELAY;                    // 
  EP2GPIFTCL = ( BYTE )xfrcnt;
}

// Set EP4GPIF Transaction Count
void Peripheral_SetEP4GPIFTC( WORD xfrcnt )
{
  SYNCDELAY;                    // 
  EP4GPIFTCH = xfrcnt >> 8;  // setup transaction count
  SYNCDELAY;                    // 
  EP4GPIFTCL = ( BYTE )xfrcnt;
}

// Set EP6GPIF Transaction Count
void Peripheral_SetEP6GPIFTC( WORD xfrcnt )
{
  SYNCDELAY;                    // 
  EP6GPIFTCH = xfrcnt >> 8;  // setup transaction count
  SYNCDELAY;                    // 
  EP6GPIFTCL = ( BYTE )xfrcnt;
}

// Set EP8GPIF Transaction Count
void Peripheral_SetEP8GPIFTC( WORD xfrcnt )
{
  SYNCDELAY;                    // 
  EP8GPIFTCH = xfrcnt >> 8;  // setup transaction count
  SYNCDELAY;                    // 
  EP8GPIFTCL = ( BYTE )xfrcnt;
}

#define GPIF_FLGSELPF 0
#define GPIF_FLGSELEF 1
#define GPIF_FLGSELFF 2

// Set EP2GPIF Decision Point FIFO Flag Select (PF, EF, FF)
void SetEP2GPIFFLGSEL( WORD DP_FIFOFlag )
{
  EP2GPIFFLGSEL = DP_FIFOFlag;
}

// Set EP4GPIF Decision Point FIFO Flag Select (PF, EF, FF)
void SetEP4GPIFFLGSEL( WORD DP_FIFOFlag )
{
  EP4GPIFFLGSEL = DP_FIFOFlag;
}

// Set EP6GPIF Decision Point FIFO Flag Select (PF, EF, FF)
void SetEP6GPIFFLGSEL( WORD DP_FIFOFlag )
{
  EP6GPIFFLGSEL = DP_FIFOFlag;
}

// Set EP8GPIF Decision Point FIFO Flag Select (PF, EF, FF)
void SetEP8GPIFFLGSEL( WORD DP_FIFOFlag )
{
  EP8GPIFFLGSEL = DP_FIFOFlag;
}

// Set EP2GPIF Programmable Flag STOP, overrides Transaction Count
void SetEP2GPIFPFSTOP( void )
{
  EP2GPIFPFSTOP = 0x01;
}

// Set EP4GPIF Programmable Flag STOP, overrides Transaction Count
void SetEP4GPIFPFSTOP( void )
{
  EP4GPIFPFSTOP = 0x01;
}

// Set EP6GPIF Programmable Flag STOP, overrides Transaction Count
void SetEP6GPIFPFSTOP( void )
{
  EP6GPIFPFSTOP = 0x01;
}

// Set EP8GPIF Programmable Flag STOP, overrides Transaction Count
void SetEP8GPIFPFSTOP( void )
{
  EP8GPIFPFSTOP = 0x01;
}

// write single byte to PERIPHERAL, using GPIF
void Peripheral_SingleByteWrite( BYTE gdata )
{
  while( !( GPIFTRIG & 0x80 ) ) // poll GPIFTRIG.7 Done bit
  {
     ;
  }

  XGPIFSGLDATLX = gdata;        // trigger GPIF 
                                // ...single byte write transaction
}

// write single word to PERIPHERAL, using GPIF
void Peripheral_SingleWordWrite( WORD gdata )
{
  while( !( GPIFTRIG & 0x80 ) )  // poll GPIFTRIG.7 Done bit
  {
    ;
  }

// using register(s) in XDATA space
  XGPIFSGLDATH = gdata >> 8;              
  XGPIFSGLDATLX = gdata;        // trigger GPIF 
                                // ...single word write transaction
}

// read single byte from PERIPHERAL, using GPIF
void Peripheral_SingleByteRead( BYTE xdata *gdata )
{
  static BYTE g_data = 0x00;

  while( !( GPIFTRIG & 0x80 ) )  // poll GPIFTRIG.7 Done bit
  {
     ;
  }

// using register(s) in XDATA space, dummy read
  g_data = XGPIFSGLDATLX;       // trigger GPIF 
                                // ...single byte read transaction
  while( !( GPIFTRIG & 0x80 ) ) // poll GPIFTRIG.7 Done bit
  {
     ;
  }

// using register(s) in XDATA space, 
  *gdata = XGPIFSGLDATLNOX;     // ...GPIF reads byte from PERIPHERAL
}

// read single word from PERIPHERAL, using GPIF
void Peripheral_SingleWordRead( WORD xdata *gdata )
{
  BYTE g_data = 0x00;

  while( !( GPIFTRIG & 0x80 ) ) // poll GPIFTRIG.7 Done bit
  {
     ;
  }

// using register(s) in XDATA space, dummy read
  g_data = XGPIFSGLDATLX;       // trigger GPIF 
                                // ...single word read transaction

  while( !( GPIFTRIG & 0x80 ) ) // poll GPIFTRIG.7 Done bit
  {
     ;
  }

// using register(s) in XDATA space, GPIF reads word from PERIPHERAL
  *gdata = ( ( WORD )XGPIFSGLDATH << 8 ) | ( WORD )XGPIFSGLDATLNOX;
}

#define GPIFTRIGWR 0
#define GPIFTRIGRD 4

#define GPIF_EP2 0
#define GPIF_EP4 1
#define GPIF_EP6 2
#define GPIF_EP8 3

// write byte(s)/word(s) to PERIPHERAL, using GPIF and EPxFIFO
// if EPx WORDWIDE=0 then write byte(s)
// if EPx WORDWIDE=1 then write word(s)
void Peripheral_FIFOWrite( BYTE FIFO_EpNum )
{
  while( !( GPIFTRIG & 0x80 ) ) // poll GPIFTRIG.7 Done bit
  {
     ;
  }

  // trigger FIFO write transaction(s), using SFR
  GPIFTRIG = FIFO_EpNum;  // R/W=0, EP[1:0]=FIFO_EpNum for EPx write(s)
}

// read byte(s)/word(s) from PERIPHERAL, using GPIF and EPxFIFO
// if EPx WORDWIDE=0 then read byte(s)
// if EPx WORDWIDE=1 then read word(s)
void Peripheral_FIFORead( BYTE FIFO_EpNum )
{
  while( !( GPIFTRIG & 0x80 ) ) // poll GPIFTRIG.7 GPIF Done bit
  {
     ;
  }

  // trigger FIFO read transaction(s), using SFR
  GPIFTRIG = GPIFTRIGRD | FIFO_EpNum; // R/W=1, EP[1:0]=FIFO_EpNum for EPx read(s)
}

void main( void )
{
  WORD xdata wData = 0x0000;
  BYTE xdata bData = 0x00;
  WORD myi = 0x0000;
  BOOL bResult = 1;

  OtherInit( );
  GpifInit( );
  
  if( bResult == 0 ) 
  { // stub out unused functions; avoid "UNCALLED SEGMENT" link error
    Peripheral_SingleWordWrite( 0x5678 );
    Peripheral_SingleByteWrite( 0xAA );
    Peripheral_SingleWordRead( &wData );
    Peripheral_SingleByteRead( &bData );
    // GPIF automatically throttles when performing FIFO read(s)/write(s)
    // ...what this means is that it doesn't transition from IDLE, while...
    // ...the EPx OUT FIFO is empty... OR ...the EPx IN FIFO is full...
    Peripheral_FIFOWrite( GPIF_EP2 ); // GPIF will not read from an empty FIFO
    Peripheral_FIFORead( GPIF_EP8 );  // GPIF will not write to a full FIFO
    Peripheral_SetEP2GPIFTC( 0x0000 );
    Peripheral_SetEP4GPIFTC( 0x0000 );
    Peripheral_SetEP6GPIFTC( 0x0000 );
    Peripheral_SetEP8GPIFTC( 0x0000 );
    SetEP2GPIFFLGSEL( GPIF_FLGSELPF );
    SetEP4GPIFFLGSEL( GPIF_FLGSELEF );
    SetEP6GPIFFLGSEL( GPIF_FLGSELFF );
    SetEP8GPIFFLGSEL( GPIF_FLGSELPF );
    SetEP2GPIFPFSTOP(); // use GPIF_PF to transition GPIF to done
    SetEP4GPIFPFSTOP(); // use GPIF_PF to transition GPIF to done
    SetEP6GPIFPFSTOP(); // use GPIF_PF to transition GPIF to done
    SetEP8GPIFPFSTOP(); // use GPIF_PF to transition GPIF to done
  }

  Peripheral_SetAddress( 0x0155 );

  while( 1 )
  { // ...the EPx WORDWIDE bits must to be set to
    // ...configure PORTD as FD[15:8] for single transactions
    if( EP2FIFOCFG & 0x01 )  // If 16-bit mode - EPx WORDWIDE=1
    { // illustrate use of efficient 16 bit functions
      Peripheral_SingleWordWrite( 0xAA55 );
      Peripheral_SingleWordRead( &wData );
    }
    else
    {
      Peripheral_SingleByteWrite( 0xA5 );
      Peripheral_SingleByteRead( &bData );
    }
  }
}
#endif