*\******************************************************************************/#define _EMAC_MACSTATUS_ADDR                    (_EMAC_BASE_ADDR+0x0164u)#define EMAC_MACSTATUS                          EMAC_REG(MACSTATUS)#define _EMAC_MACSTATUS_TXERRCODE_MASK          0x00F00000u#define _EMAC_MACSTATUS_TXERRCODE_SHIFT         20u#define  EMAC_MACSTATUS_TXERRCODE_DEFAULT	0x00000000u#define EMAC_MACSTATUS_TXERRCODE_NOERROR        0u#define EMAC_MACSTATUS_TXERRCODE_SOPERROR       1u#define EMAC_MACSTATUS_TXERRCODE_OWNERSHIP      2u#define EMAC_MACSTATUS_TXERRCODE_NOEOP          3u#define EMAC_MACSTATUS_TXERRCODE_NULLPTR        4u#define EMAC_MACSTATUS_TXERRCODE_NULLLEN        5u#define EMAC_MACSTATUS_TXERRCODE_LENRRROR       6u#define _EMAC_MACSTATUS_TXERRCH_MASK            0x00070000u#define _EMAC_MACSTATUS_TXERRCH_SHIFT           16u#define  EMAC_MACSTATUS_TXERRCH_DEFAULT		0x00000000u#define _EMAC_MACSTATUS_RXERRCODE_MASK          0x0000F000u#define _EMAC_MACSTATUS_RXERRCODE_SHIFT         12u#define  EMAC_MACSTATUS_RXERRCODE_DEFAULT	0x00000000u#define EMAC_MACSTATUS_RXERRCODE_NOERROR        0u#define EMAC_MACSTATUS_RXERRCODE_SOPERROR       1u#define EMAC_MACSTATUS_RXERRCODE_OWNERSHIP      2u#define EMAC_MACSTATUS_RXERRCODE_NOEOP          3u#define EMAC_MACSTATUS_RXERRCODE_NULLPTR        4u#define EMAC_MACSTATUS_RXERRCODE_NULLLEN        5u#define EMAC_MACSTATUS_RXERRCODE_LENRRROR       6u#define _EMAC_MACSTATUS_RXERRCH_MASK            0x00000700u#define _EMAC_MACSTATUS_RXERRCH_SHIFT           8u#define  EMAC_MACSTATUS_RXERRCH_DEFAULT		0x00000000u#define _EMAC_MACSTATUS_RXQOSACT_MASK           0x00000004u#define _EMAC_MACSTATUS_RXQOSACT_SHIFT          2u#define  EMAC_MACSTATUS_RXQOSACT_DEFAULT	0x00000000u#define _EMAC_MACSTATUS_RXFLOWACT_MASK          0x00000002u#define _EMAC_MACSTATUS_RXFLOWACT_SHIFT         1u#define  EMAC_MACSTATUS_RXFLOWACT_DEFAULT	0x00000000u#define _EMAC_MACSTATUS_TXFLOWACT_MASK          0x00000001u#define _EMAC_MACSTATUS_TXFLOWACT_SHIFT         0u#define  EMAC_MACSTATUS_TXFLOWACT_DEFAULT	0x00000000u/******************************************************************************\* _____________________* |                   |* |   EMCONTROL       |* |___________________|** EMCONTROL         - Emulation Control Register** FIELDS (msb -> lsb)* (rw)  SOFT    - Emulation Soft Bit* (rw)  FREE    - Emulation Free Bit** MACROS SUPPORTED*  EMAC_FMK     y*  EMAC_FMKS    .*  EMAC_FMKCHF  .*  EMAC_ADDR    y*  EMAC_REG     y*  EMAC_RGET    y*  EMAC_RSET    y*  EMAC_FGET    y*  EMAC_FSET    y*  EMAC_FSETS   .*  EMAC_RGETI   .*  EMAC_RSETI   .*  EMAC_FGETI   .*  EMAC_FSETI   .*  EMAC_FSETSI  .*\******************************************************************************/#define _EMAC_EMCONTROL_ADDR                    (_EMAC_BASE_ADDR+0x0168u)#define EMAC_EMCONTROL                          EMAC_REG(EMCONTROL)#define _EMAC_EMCONTROL_SOFT_MASK               0x00000002u#define _EMAC_EMCONTROL_SOFT_SHIFT              1u#define _EMAC_EMCONTROL_FREE_MASK               0x00000001u#define _EMAC_EMCONTROL_FREE_SHIFT              0u/******************************************************************************\* _____________________* |                   |* |  MACINVECTOR      |* |___________________|** MACINVECTOR       - MAC Input Vector** FIELDS (msb -> lsb)*  (r) USERINT  - MDIO User Interrupt*  (r) LINKINT  - MDIO Link Change Interrupt*  (r) HOSTPEND - Host Pending Interrupt*  (r) STATPEND - Statistics Interrupt*  (r) RXPEND   - RX Pending Interrupt Flags (7-0)*  (r) TXPEND   - TX Pending Interrupt Falgs (7-0)** MACROS SUPPORTED*  EMAC_FMK     y*  EMAC_FMKS    .*  EMAC_FMKCHF  .*  EMAC_ADDR    y*  EMAC_REG     y*  EMAC_RGET    y*  EMAC_RSET    .*  EMAC_FGET    y*  EMAC_FSET    .*  EMAC_FSETS   .*  EMAC_RGETI   .*  EMAC_RSETI   .*  EMAC_FGETI   .*  EMAC_FSETI   .*  EMAC_FSETSI  .*\******************************************************************************/#define _EMAC_MACINVECTOR_ADDR                  (_EMAC_BASE_ADDR+0x0180u)#define EMAC_MACINVECTOR                        EMAC_REG(MACINVECTOR)#define _EMAC_MACINVECTOR_USERINT_MASK          0x80000000u#define _EMAC_MACINVECTOR_USERINT_SHIFT         31u#define  EMAC_MACINVECTOR_USERINT_DEFAULT	0x00000000u#define _EMAC_MACINVECTOR_LINKINT_MASK          0x40000000u#define _EMAC_MACINVECTOR_LINKINT_SHIFT         30u#define  EMAC_MACINVECTOR_LINKINT_DEFAULT	0x00000000u#define _EMAC_MACINVECTOR_HOSTPEND_MASK         0x00020000u#define _EMAC_MACINVECTOR_HOSTPEND_SHIFT        17u#define  EMAC_MACINVECTOR_HOSTPEND_DEFAULT	0x00000000u#define _EMAC_MACINVECTOR_STATPEND_MASK         0x00010000u#define _EMAC_MACINVECTOR_STATPEND_SHIFT        16u#define  EMAC_MACINVECTOR_STATPEND_DEFAULT	0x00000000u#define _EMAC_MACINVECTOR_RXPEND_MASK           0x0000FF00u#define _EMAC_MACINVECTOR_RXPEND_SHIFT          8u#define  EMAC_MACINVECTOR_RXPEND_DEFAULT	0x00000000u#define _EMAC_MACINVECTOR_TXPEND_MASK           0x000000FFu#define _EMAC_MACINVECTOR_TXPEND_SHIFT          0u#define  EMAC_MACINVECTOR_TXPEND_DEFAULT	0x00000000u/******************************************************************************\* _____________________* |                   |* |  MACEOIVECTOR     |* |___________________|** MACEOIVECTOR      - MAC EOI Vector** FIELDS (msb -> lsb)*  (r/w) Flags** MACROS SUPPORTED*  EMAC_FMK     .*  EMAC_FMKS    .*  EMAC_FMKCHF  .*  EMAC_ADDR    y*  EMAC_REG     y*  EMAC_RGET    y*  EMAC_RSET    y*  EMAC_FGET    .*  EMAC_FSET    .*  EMAC_FSETS   .*  EMAC_RGETI   .*  EMAC_RSETI   .*  EMAC_FGETI   .*  EMAC_FSETI   .*  EMAC_FSETSI  .*\******************************************************************************/#define _EMAC_MACEOIVECTOR_ADDR                 (_EMAC_BASE_ADDR+0x0184u)#define EMAC_MACEOIVECTOR                       EMAC_REG(MACEOIVECTOR)/******************************************************************************\* _____________________* |                   |* |  TXINTSTATRAW     |* |  TXINTSTATMASKED  |* |  TXINTMASKSET     |* |  TXINTMASKCLEAR   |* |  RXINTSTATRAW     |* |  RXINTSTATMASKED  |* |  RXINTMASKSET     |* |  RXINTMASKCLEAR   |* |___________________|** TXINTSTATRAW      - TX Interrupt Status Register (Unmasked)* TXINTSTATMASKED   - TX Interrupt Status Register (Masked)* TXINTMASKSET      - TX Interrupt Mask Set Register* TXINTMASKCLEAR    - TX Interrupt Mask Clear Register* RXINTSTATRAW      - RX Interrupt Status Register (Unmasked)* RXINTSTATMASKED   - RX Interrupt Status Register (Masked)* RXINTMASKSET      - RX Interrupt Mask Set Register* RXINTMASKCLEAR    - RX Interrupt Mask Clear Register** FIELDS (msb -> lsb)*  (r)(r/ws)(r/wc) Channel Flags (use EMAC_FMKCHF)** MACROS SUPPORTED*  EMAC_FMK     .*  EMAC_FMKS    .*  EMAC_FMKCHF  y*  EMAC_ADDR    y*  EMAC_REG     y*  EMAC_RGET    y*  EMAC_RSET    y*  EMAC_FGET    .*  EMAC_FSET    .*  EMAC_FSETS   .*  EMAC_RGETI   .*  EMAC_RSETI   .*  EMAC_FGETI   .*  EMAC_FSETI   .*  EMAC_FSETSI  .*\******************************************************************************/#define _EMAC_TXINTSTATRAW_ADDR                 (_EMAC_BASE_ADDR+0x0170u)#define _EMAC_TXINTSTATMASKED_ADDR              (_EMAC_BASE_ADDR+0x0174u)#define _EMAC_TXINTMASKSET_ADDR                 (_EMAC_BASE_ADDR+0x0178u)#define _EMAC_TXINTMASKCLEAR_ADDR               (_EMAC_BASE_ADDR+0x017Cu)#define _EMAC_RXINTSTATRAW_ADDR                 (_EMAC_BASE_ADDR+0x0190u)#define _EMAC_RXINTSTATMASKED_ADDR              (_EMAC_BASE_ADDR+0x0194u)#define _EMAC_RXINTMASKSET_ADDR                 (_EMAC_BASE_ADDR+0x0198u)#define _EMAC_RXINTMASKCLEAR_ADDR               (_EMAC_BASE_ADDR+0x019Cu)#define EMAC_TXINTSTATRAW                       EMAC_REG(TXINTSTATRAW)#define EMAC_TXINTSTATMASKED                    EMAC_REG(TXINTSTATMASKED)#define EMAC_TXINTMASKSET                       EMAC_REG(TXINTMASKSET)#define EMAC_TXINTMASKCLEAR                     EMAC_REG(TXINTMASKCLEAR)#define EMAC_RXINTSTATRAW                       EMAC_REG(RXINTSTATRAW)#define EMAC_RXINTSTATMASKED                    EMAC_REG(RXINTSTATMASKED)#define EMAC_RXINTMASKSET                       EMAC_REG(RXINTMASKSET)#define EMAC_RXINTMASKCLEAR                     EMAC_REG(RXINTMASKCLEAR)/******************************************************************************\* _____________________* |                   |* |  MACINTSTATRAW    |* |  MACINTSTATMASKED |* |  MACINTMASKSET    |* |  MACINTMASKCLEAR  |* |___________________|** MACINTSTATRAW     - MAC Interrupt Status Register (Unmasked)* MACINTSTATMASKED  - MAC Interrupt Status Register (Masked)* MACINTMASKSET     - MAC Interrupt Mask Set Register* MACINTMASKCLEAR   - MAC Interrupt Mask Clear Register** FIELDS (msb -> lsb)* (r)(r/ws)(r/wc) HOSTERRINT  - Host Error Interrupt* (r)(r/ws)(r/wc) STATINT     - Statistics Interrupt** MACROS SUPPORTED*  EMAC_FMK     y*  EMAC_FMKS    .*  EMAC_FMKCHF  .*  EMAC_ADDR    y*  EMAC_REG     y*  EMAC_RGET    y*  EMAC_RSET    y*  EMAC_FGET    y*  EMAC_FSET    y*  EMAC_FSETS   .*  EMAC_RGETI   .*  EMAC_RSETI   .*  EMAC_FGETI   .*  EMAC_FSETI   .*  EMAC_FSETSI  .*\******************************************************************************/#define _EMAC_MACINTSTATRAW_ADDR                (_EMAC_BASE_ADDR+0x01A0u)#define _EMAC_MACINTSTATMASKED_ADDR             (_EMAC_BASE_ADDR+0x01A4u)#define _EMAC_MACINTMASKSET_ADDR                (_EMAC_BASE_ADDR+0x01A8u)#define _EMAC_MACINTMASKCLEAR_ADDR              (_EMAC_BASE_ADDR+0x01ACu)#define EMAC_MACINTSTATRAW                      EMAC_REG(MACINTSTATRAW)#define EMAC_MACINTSTATMASKED                   EMAC_REG(MACINTSTATMASKED)#define EMAC_MACINTMASKSET                      EMAC_REG(MACINTMASKSET)#define EMAC_MACINTMASKCLEAR                    EMAC_REG(MACINTMASKCLEAR)#define _EMAC_MACINTSTATRAW_HOSTERRINT_MASK     0x00000002u#define _EMAC_MACINTSTATMASKED_HOSTERRINT_MASK  0x00000002u#define _EMAC_MACINTMASKSET_HOSTERRINT_MASK     0x00000002u#define _EMAC_MACINTMASKCLEAR_HOSTERRINT_MASK   0x00000002u#define _EMAC_MACINTSTATRAW_HOSTERRINT_SHIFT    1u#define  EMAC_MACINTSTATRAW_HOSTERRINT_DEFAULT	0x00000000u#define _EMAC_MACINTSTATMASKED_HOSTERRINT_SHIFT 1u#define  EMAC_MACINTSTATMASKED_HOSTERRINT_DEFAULT 0x00000000u#define _EMAC_MACINTMASKSET_HOSTERRINT_SHIFT    1u#define  EMAC_MACINTMASKSET_HOSTERRINT_DEFAULT	0x00000000u#define _EMAC_MACINTMASKCLEAR_HOSTERRINT_SHIFT  1u#define  EMAC_MACINTMASKCLEAR_HOSTERRINT_DEFAULT 0x00000000u#define _EMAC_MACINTSTATRAW_STATINT_MASK        0x00000001u#define _EMAC_MACINTSTATMASKED_STATINT_MASK     0x00000001u#define _EMAC_MACINTMASKSET_STATINT_MASK        0x00000001u#define _EMAC_MACINTMASKCLEAR_STATINT_MASK      0x00000001u#define _EMAC_MACINTSTATRAW_STATINT_SHIFT       0u#define  EMAC_MACINTSTATRAW_STATINT_DEFAULT	0x00000000u#define _EMAC_MACINTSTATMASKED_STATINT_SHIFT    0u#define  EMAC_MACINTSTATMASKED_STATINT_DEFAULT	0x00000000u#define _EMAC_MACINTMASKSET_STATINT_SHIFT       0u#define  EMAC_MACINTMASKSET_STATINT_DEFAULT	0x00000000u#define _EMAC_MACINTMASKCLEAR_STATINT_SHIFT     0u#define  EMAC_MACINTMASKCLEAR_STATINT_DEFAULT	0x00000000u/******************************************************************************\* _____________________* |                   |* |   MACADDRL        |* |   MACADDRLn       |* |___________________|** MACADDRL          - MAC Address Lower Byte Register for RSETI/RGETI* MACADDRL0         - MAC Address Channel 0 Lower Byte Register* MACADDRL1         - MAC Address Channel 1 Lower Byte Register* MACADDRL2         - MAC Address Channel 2 Lower Byte Register* MACADDRL3         - MAC Address Channel 3 Lower Byte Register* MACADDRL4         - MAC Address Channel 4 Lower Byte Register* MACADDRL5         - MAC Address Channel 5 Lower Byte Register* MACADDRL6         - MAC Address Channel 6 Lower Byte Register* MACADDRL7         - MAC Address Channel 7 Lower Byte Register** FIELDS (msb -> lsb)*  (rw)  MACADDR8   - 8 bits of MAC Address** MACROS SUPPORTED*  EMAC_FMK     y*  EMAC_FMKS    .*  EMAC_FMKCHF  .*  EMAC_ADDR    y*  EMAC_REG     y*  EMAC_RGET    y*  EMAC_RSET    y*  EMAC_FGET    y*  EMAC_FSET    y*  EMAC_FSETS   .*  EMAC_RGETI   y*  EMAC_RSETI   y*  EMAC_FGETI   y*  EMAC_FSETI   y*  EMAC_FSETSI  .*\******************************************************************************/#define _EMAC_MACADDRL_BASEADDR                 (_EMAC_BASE_ADDR+0x01B0u)#define _EMAC_MACADDRL0_ADDR                    (_EMAC_BASE_ADDR+0x01B0u)#define _EMAC_MACADDRL1_ADDR                    (_EMAC_BASE_ADDR+0x01B4u)#define _EMAC_MACADDRL2_ADDR                    (_EMAC_BASE_ADDR+0x01B8u)#define _EMAC_MACADDRL3_ADDR                    (_EMAC_BASE_ADDR+0x01BCu)#define _EMAC_MACADDRL4_ADDR                    (_EMAC_BASE_ADDR+0x01C0u)#define _EMAC_MACADDRL5_ADDR                    (_EMAC_BASE_ADDR+0x01C4u)#define _EMAC_MACADDRL6_ADDR                    (_EMAC_BASE_ADDR+0x01C8u)#define _EMAC_MACADDRL7_ADDR                    (_EMAC_BASE_ADDR+0x01CCu)