/*--------------------------------------------------------------*/
/* DSK6416.gel                                                  */
/* version 1.30                                                 */
/*                                                              */
/* This GEL file is designed to be used in conjunction with     */
/* CCS 2.2 and the TMS320C6416 DSP based DSK.                   */
/*                                                              */
/*--------------------------------------------------------------*/

/*--------------------------------------------------------------*/
/* The StartUp() function is called each time CCS is started.   */
/* Customize this function to perform desired initialization.   */
/*--------------------------------------------------------------*/

StartUp()
{
    setup_memory_map();
    GEL_Reset();  
    init_emif();
} 

/*--------------------------------------------------------------*/
/* Setup memory map for C6416 DSK.                              */
/*                                                              */
/*--------------------------------------------------------------*/
setup_memory_map()
{

	GEL_MapOn();
	GEL_MapReset();

        /* On-chip memory map */
	GEL_MapAdd(0x00000000, 0, 0x00100000, 1, 1); /* Internal Memory       */
	GEL_MapAdd(0x01800000, 0, 0x00000054, 1, 1); /* EMIFA CTL REGS        */
	GEL_MapAdd(0x01840000, 0, 0x000082FC, 1, 1); /* INT MEM CTL REGS      */
	GEL_MapAdd(0x018C0000, 0, 0x0000003C, 1, 1); /* MCBSP0 CTL REGS       */
	GEL_MapAdd(0x01900000, 0, 0x0000003C, 1, 1); /* MCBSP1 CTL REGS       */
	GEL_MapAdd(0x01940000, 0, 0x00000008, 1, 1); /* TIMER0 CTL REGS       */
	GEL_MapAdd(0x01980000, 0, 0x00000008, 1, 1); /* TIMER1 CTL REGS       */
	GEL_MapAdd(0x019C0000, 0, 0x00000008, 1, 1); /* INT CTL REGS          */
	GEL_MapAdd(0x01A00000, 0, 0x0000FFFC, 1, 1); /* EDMA REGS AND PARAM   */
	GEL_MapAdd(0x01A40000, 0, 0x0000003C, 1, 1); /* MCBSP2 CTL REGS       */
	GEL_MapAdd(0x01A80000, 0, 0x00000054, 1, 1); /* EMIFB CTL REGS        */
	GEL_MapAdd(0x01AC0000, 0, 0x00000008, 1, 1); /* TIMER2 CTL REGS       */
	GEL_MapAdd(0x01B00000, 0, 0x00000024, 1, 1); /* GPIO REGS             */
	GEL_MapAdd(0x02000000, 0, 0x00000030, 1, 1); /* QDMA REGS             */
	GEL_MapAdd(0x30000000, 0, 0x04000000, 1, 1); /* MCBSP0 Data, EDMA map */
	GEL_MapAdd(0x34000000, 0, 0x04000000, 1, 1); /* MCBSP1 Data, EDMA map */
	GEL_MapAdd(0x38000000, 0, 0x04000000, 1, 1); /* MCBSP2 Data, EDMA map */

	/* Off-chip memory map */
	GEL_MapAdd(0x60000000, 0, 0x04000000, 1, 1); /* CPLD  EMIF-B, CE0     */
	GEL_MapAdd(0x64000000, 0, 0x00040000, 1, 1); /* FLASH EMIF-B, CE1     */
	GEL_MapAdd(0x80000000, 0, 0x01000000, 1, 1); /* 16MB SDRAM EMIF-A, CE0*/
	GEL_MapAdd(0x90000000, 0, 0x01000000, 1, 1); 
	GEL_MapAdd(0xA0000000, 0, 0x10000000, 1, 1); /* EMIF-A, CE2 EXPANSION */
	GEL_MapAdd(0xB0000000, 0, 0x10000000, 1, 1); /* EMIF-A, CE3 EXPANSION */
}

/*--------------------------------------------------------------*/
/* init_emif() 		                                            */
/*--------------------------------------------------------------*/
init_emif()
{

#define EMIFA_GCTL       0x01800000
#define EMIFA_CE1        0x01800004
#define EMIFA_CE0        0x01800008
#define EMIFA_CE2        0x01800010
#define EMIFA_CE3        0x01800014
#define EMIFA_SDRAMCTL   0x01800018
#define EMIFA_SDRAMTIM   0x0180001c
#define EMIFA_SDRAMEXT   0x01800020
#define EMIFA_CE1SECCTL  0x01800044
#define EMIFA_CE0SECCTL  0x01800048
#define EMIFA_CE2SECCTL  0x01800050
#define EMIFA_CE3SECCTL  0x01800054

#define EMIFB_GCTL       0x01A80000
#define EMIFB_CE1        0x01A80004
#define EMIFB_CE0        0x01A80008
#define EMIFB_CE2        0x01A80010
#define EMIFB_CE3        0x01A80014
#define EMIFB_SDRAMCTL   0x01A80018
#define EMIFB_SDRAMTIM   0x01A8001c
#define EMIFB_SDRAMEXT   0x01A80020
#define EMIFB_CE1SECCTL  0x01A80044
#define EMIFB_CE0SECCTL  0x01A80048
#define EMIFB_CE2SECCTL  0x01A80050
#define EMIFB_CE3SECCTL  0x01A80054
	
    /* EMIFA */
//	*(int *)EMIFA_GCTL     = 0x00012070;
//	*(int *)EMIFA_CE0      = 0xffffffd3;  /* CE0 SDRAM                     */
//	*(int *)EMIFA_CE2      = 0x22a28a22;  /* CE2 Daughtercard 32-bit async */
//	*(int *)EMIFA_CE3      = 0x22a28a22;  /* CE3 Daughtercard 32-bit async */
//	*(int *)EMIFA_SDRAMCTL = 0x47115000;  /* SDRAM control                 */
//	*(int *)EMIFA_SDRAMTIM = 0x00000618;  /* SDRAM timing (refresh)        */
//	*(int *)EMIFA_SDRAMEXT = 0x000a8529;  /* SDRAM extended control        */

    /* EMIFB */
	*(int *)EMIFB_GCTL     = 0x00002070; 
	*(int *)EMIFB_CE0      = 0x22008800;  /* CE0 CPLD 8-bit                */
	*(int *)EMIFB_CE1      = 0x22008800;  /* CE1 Flash 8-bit               */

}

/*--------------------------------------------------------------*/
/* clear_memory_map()                                           */
/*--------------------------------------------------------------*/
clear_memory_map()
{
    GEL_MapOff();
}

/*--------------------------------------------------------------*/
/* FlushCache()                                                 */
/*--------------------------------------------------------------*/ 
FlushCache()   
{ 
    /* Invalidate L1I and L1D */
    *(int *)0x01840000 = (*(int *)0x01840000 | 0x00000300);
    
    /* Clean L2 */
    *(int *)0x01845004 = 0x1; 
}   


/*--------------------------------------------------------------*/
/* OnReset()                                                    */
/*--------------------------------------------------------------*/
OnReset(int nErrorCode)
{
    init_emif();	
}


/*--------------------------------------------------------------*/
/* OnPreFileLoaded()                                            */
/* This function is called automatically when the 'Load Program'*/
/* Menu item is selected.                                       */
/*--------------------------------------------------------------*/
OnPreFileLoaded()
{
	GEL_Reset(); 	 
	FlushCache(); 
	IER = 0;
	IFR = 0;
	init_emif();
}

/*--------------------------------------------------------------*/
/* OnRestart()                                                  */
/* This function is called by CCS when you do Debug->Restart.   */
/* The goal is to put the C6x into a known good state with      */
/* respect to cache, edma and interrupts.                       */
/* Failure to do this can cause problems when you restart and   */
/* run your application code multiple times.  This is different */
/* then OnPreFileLoaded() which will do a GEL_Reset() to get the*/
/* C6x into a known good state.                                 */
/*--------------------------------------------------------------*/
OnRestart(int nErrorCode )
{
      /* Turn off L2 for all EMIFA CE spaces.  App should
      *  manage these for coherancy in the application.
      *  GEL_TextOut("Turn off cache segment\n");
      */
      *(int *)0x1848200 = 0;  /* MAR0 */
      *(int *)0x1848204 = 0;  /* MAR1 */
      *(int *)0x1848208 = 0;  /* MAR2 */
      *(int *)0x184820c = 0;  /* MAR3 */
      
      /* Disable EDMA events and interrupts and clear any
      *  pending events.
      *  GEL_TextOut("Disable EDMA event\n");  
      */               
      *(int *)0x01A0FFA8 = 0;          /* CIERH */           
      *(int *)0x01A0FFB4 = 0;          /* EERH */
      *(int *)0x01A0FFB8 = 0XFFFFFFFF; /* ECRH */
            
      *(int *)0x01A0FFE8 = 0;          /* CIERL */           
      *(int *)0x01A0FFF4 = 0;          /* EERL */
      *(int *)0x01A0FFF8 = 0xFFFFFFFF; /* ECRL */
      
      /* Disable other interrupts */
      IER = 0;
      IFR = 0;
}	

/*--------------------------------------------------------------*/
/* RESET MENU                                                   */
/*--------------------------------------------------------------*/ 
menuitem "Resets";

hotmenu ClearBreakPts_Reset_EMIFset()
{
	GEL_BreakPtReset();
	GEL_Reset();
	init_emif();
} 

hotmenu Flush_Cache() 
{ 
	FlushCache();
} 

hotmenu InitCpld()
{
	init_cpld();
}

/*--------------------------------------------------------------*/
/* MEMORY MAP MENU                                              */
/*--------------------------------------------------------------*/ 
menuitem "Memory Map";

hotmenu SetMemoryMap()
{
	setup_memory_map();
}

hotmenu ClearMemoryMap()
{
	clear_memory_map();
}

/*--------------------------------------------------------------*/
/* CPLD DEFINITIONS	                                        */
/*--------------------------------------------------------------*/
#define CPLD_STAT         0x60000000
#define CPLD_DC           0x60000001
#define CPLD_REV          0x60000004
#define CPLD_MISC         0x60000006

#define Get_Board_Rev     ((*(char *)CPLD_REV) & 0x07)
#define Get_Cpld_Rev      ((*(char *)CPLD_REV>>4) & 0x0F)
#define Get_Switches      ((*(char *)CPLD_STAT>>4) & 0x0F)
#define LED0_on           *(char *)CPLD_STAT = 0x01
#define LED1_on           *(char *)CPLD_STAT = 0x02
#define LED2_on           *(char *)CPLD_STAT = 0x04
#define LED3_on           *(char *)CPLD_STAT = 0x08
#define LEDs_off          *(char *)CPLD_STAT = 0x00


/*--------------------------------------------------------------*/
/* LED_cycle()                                                  */
/*--------------------------------------------------------------*/
LED_cycle()
{
	LED3_on;
	LED2_on;
	LED1_on;
	LED2_on;
	LED3_on;
	LEDs_off;
}  

/*--------------------------------------------------------------*/
/* init_cpld() - Set CPLD to default state                      */
/*--------------------------------------------------------------*/
init_cpld()
{

	*(char*)CPLD_STAT = 0;
	*(char*)CPLD_DC   = 0;
	*(char*)CPLD_MISC = 0;
}

/*--------------------------------------------------------------*/
/* MEMORY MAP MENU                                              */
/*--------------------------------------------------------------*/ 
menuitem "Check DSK";
hotmenu QuickTest()
{
	LED_cycle();
	LED_cycle();
	LED_cycle();
	GEL_TextOut(" Switches: %d  Board Revision: %d CPLD Revision: %d\n\n","DSKOutput",1,1,1,
	              Get_Switches, Get_Board_Rev, Get_Cpld_Rev);	
}