?? mc9s12dg128.h
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/* Based on CPU DB MC9S12DG128, version 2.87.241 (RegistersPrg V1.052) */
/*
** ###################################################################
** Filename : MC9S12DG128.h
** Processor : MC9S12DG128BCPV
** FileFormat: V1.052
** DataSheet : 9S12DT128BDGV1/D V01.05
** Compiler : Metrowerks C compiler
** Date/Time : 12.02.2004, 16:50
** Abstract :
** This implements an IO devices mapping.
**
** (c) Copyright UNIS, spol. s r.o. 1997-2003
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################
*/
#ifndef _MC9S12DG128_H
#define _MC9S12DG128_H
/* Types definition */
typedef unsigned char byte;
typedef unsigned int word;
typedef unsigned long dword;
typedef unsigned long dlong[2];
#define REG_BASE 0x0000 /* Base address for the I/O register block */
#pragma MESSAGE DISABLE C1106 /* WARNING C1106: Non-standard bitfield type */
/**************** interrupt vector table ****************/
#define VReserved63 0x0000FF80
#define VReserved62 0x0000FF82
#define VReserved61 0x0000FF84
#define VReserved60 0x0000FF86
#define VReserved59 0x0000FF88
#define VReserved58 0x0000FF8A
#define Vpwmesdn 0x0000FF8C
#define Vportp 0x0000FF8E
#define Vcan4tx 0x0000FF90
#define Vcan4rx 0x0000FF92
#define Vcan4err 0x0000FF94
#define Vcan4wkup 0x0000FF96
#define VReserved51 0x0000FF98
#define VReserved50 0x0000FF9A
#define VReserved49 0x0000FF9C
#define VReserved48 0x0000FF9E
#define VReserved47 0x0000FFA0
#define VReserved46 0x0000FFA2
#define VReserved45 0x0000FFA4
#define VReserved44 0x0000FFA6
#define VReserved43 0x0000FFA8
#define VReserved42 0x0000FFAA
#define VReserved41 0x0000FFAC
#define VReserved40 0x0000FFAE
#define Vcan0tx 0x0000FFB0
#define Vcan0rx 0x0000FFB2
#define Vcan0err 0x0000FFB4
#define Vcan0wkup 0x0000FFB6
#define Vflash 0x0000FFB8
#define Veeprom 0x0000FFBA
#define VReserved33 0x0000FFBC
#define Vspi1 0x0000FFBE
#define Viic 0x0000FFC0
#define VReserved30 0x0000FFC2
#define Vcrgscm 0x0000FFC4
#define Vcrgplllck 0x0000FFC6
#define Vtimpabovf 0x0000FFC8
#define Vtimmdcu 0x0000FFCA
#define Vporth 0x0000FFCC
#define Vportj 0x0000FFCE
#define Vatd1 0x0000FFD0
#define Vatd0 0x0000FFD2
#define Vsci1 0x0000FFD4
#define Vsci0 0x0000FFD6
#define Vspi0 0x0000FFD8
#define Vtimpaie 0x0000FFDA
#define Vtimpaaovf 0x0000FFDC
#define Vtimovf 0x0000FFDE
#define Vtimch7 0x0000FFE0
#define Vtimch6 0x0000FFE2
#define Vtimch5 0x0000FFE4
#define Vtimch4 0x0000FFE6
#define Vtimch3 0x0000FFE8
#define Vtimch2 0x0000FFEA
#define Vtimch1 0x0000FFEC
#define Vtimch0 0x0000FFEE
#define Vrti 0x0000FFF0
#define Virq 0x0000FFF2
#define Vxirq 0x0000FFF4
#define Vswi 0x0000FFF6
#define Vtrap 0x0000FFF8
#define Vcop 0x0000FFFA
#define Vclkmon 0x0000FFFC
#define Vreset 0x0000FFFE
/**************** registers I/O map ****************/
/*** PORTAB - Port AB Register; 0x00000000 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PORTA - Port A Register; 0x00000000 ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Port A Bit0, ADDR8, DATA8, DATA0 */
byte BIT1 :1; /* Port A Bit1, ADDR9, DATA9 DATA1 */
byte BIT2 :1; /* Port A Bit2, ADDR10, DATA10, DATA2 */
byte BIT3 :1; /* Port A Bit3, ADDR11, DATA11, DATA3 */
byte BIT4 :1; /* Port A Bit4, ADDR12, DATA12, DATA4 */
byte BIT5 :1; /* Port A Bit5, ADDR13, DATA13, DATA5 */
byte BIT6 :1; /* Port A Bit6, ADDR14, DATA14, DATA6 */
byte BIT7 :1; /* Port A Bit7, ADDR15, DATA15, DATA7 */
} Bits;
struct {
byte grpBIT :8;
} MergedBits;
} PORTASTR;
#define PORTA _PORTAB.Overlap_STR.PORTASTR.Byte
#define PORTA_BIT0 _PORTAB.Overlap_STR.PORTASTR.Bits.BIT0
#define PORTA_BIT1 _PORTAB.Overlap_STR.PORTASTR.Bits.BIT1
#define PORTA_BIT2 _PORTAB.Overlap_STR.PORTASTR.Bits.BIT2
#define PORTA_BIT3 _PORTAB.Overlap_STR.PORTASTR.Bits.BIT3
#define PORTA_BIT4 _PORTAB.Overlap_STR.PORTASTR.Bits.BIT4
#define PORTA_BIT5 _PORTAB.Overlap_STR.PORTASTR.Bits.BIT5
#define PORTA_BIT6 _PORTAB.Overlap_STR.PORTASTR.Bits.BIT6
#define PORTA_BIT7 _PORTAB.Overlap_STR.PORTASTR.Bits.BIT7
#define PORTA_BIT _PORTAB.Overlap_STR.PORTASTR.MergedBits.grpBIT
#define PORTA_BIT0_MASK 1
#define PORTA_BIT1_MASK 2
#define PORTA_BIT2_MASK 4
#define PORTA_BIT3_MASK 8
#define PORTA_BIT4_MASK 16
#define PORTA_BIT5_MASK 32
#define PORTA_BIT6_MASK 64
#define PORTA_BIT7_MASK 128
#define PORTA_BIT_MASK 255
#define PORTA_BIT_BITNUM 0
/*** PORTB - Port B Register; 0x00000001 ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Port B Bit 0, ADDR0, DATA0 */
byte BIT1 :1; /* Port B Bit1, ADDR1, DATA1 */
byte BIT2 :1; /* Port B Bit2, ADDR2, DATA2 */
byte BIT3 :1; /* Port B Bit3, ADDR3, DATA3 */
byte BIT4 :1; /* Port B Bit4, ADDR4, DATA4 */
byte BIT5 :1; /* Port B Bit5, ADDR5, DATA5 */
byte BIT6 :1; /* Port B Bit6, ADDR6, DATA6 */
byte BIT7 :1; /* Port B Bit7, ADDR7, DATA7 */
} Bits;
struct {
byte grpBIT :8;
} MergedBits;
} PORTBSTR;
#define PORTB _PORTAB.Overlap_STR.PORTBSTR.Byte
#define PORTB_BIT0 _PORTAB.Overlap_STR.PORTBSTR.Bits.BIT0
#define PORTB_BIT1 _PORTAB.Overlap_STR.PORTBSTR.Bits.BIT1
#define PORTB_BIT2 _PORTAB.Overlap_STR.PORTBSTR.Bits.BIT2
#define PORTB_BIT3 _PORTAB.Overlap_STR.PORTBSTR.Bits.BIT3
#define PORTB_BIT4 _PORTAB.Overlap_STR.PORTBSTR.Bits.BIT4
#define PORTB_BIT5 _PORTAB.Overlap_STR.PORTBSTR.Bits.BIT5
#define PORTB_BIT6 _PORTAB.Overlap_STR.PORTBSTR.Bits.BIT6
#define PORTB_BIT7 _PORTAB.Overlap_STR.PORTBSTR.Bits.BIT7
#define PORTB_BIT _PORTAB.Overlap_STR.PORTBSTR.MergedBits.grpBIT
#define PORTB_BIT0_MASK 1
#define PORTB_BIT1_MASK 2
#define PORTB_BIT2_MASK 4
#define PORTB_BIT3_MASK 8
#define PORTB_BIT4_MASK 16
#define PORTB_BIT5_MASK 32
#define PORTB_BIT6_MASK 64
#define PORTB_BIT7_MASK 128
#define PORTB_BIT_MASK 255
#define PORTB_BIT_BITNUM 0
} Overlap_STR;
struct {
word BIT0 :1; /* Port B Bit 0, ADDR0, DATA0 */
word BIT1 :1; /* Port B Bit1, ADDR1, DATA1 */
word BIT2 :1; /* Port B Bit2, ADDR2, DATA2 */
word BIT3 :1; /* Port B Bit3, ADDR3, DATA3 */
word BIT4 :1; /* Port B Bit4, ADDR4, DATA4 */
word BIT5 :1; /* Port B Bit5, ADDR5, DATA5 */
word BIT6 :1; /* Port B Bit6, ADDR6, DATA6 */
word BIT7 :1; /* Port B Bit7, ADDR7, DATA7 */
word BIT8 :1; /* Port A Bit0, ADDR8, DATA8, DATA0 */
word BIT9 :1; /* Port A Bit1, ADDR9, DATA9 DATA1 */
word BIT10 :1; /* Port A Bit2, ADDR10, DATA10, DATA2 */
word BIT11 :1; /* Port A Bit3, ADDR11, DATA11, DATA3 */
word BIT12 :1; /* Port A Bit4, ADDR12, DATA12, DATA4 */
word BIT13 :1; /* Port A Bit5, ADDR13, DATA13, DATA5 */
word BIT14 :1; /* Port A Bit6, ADDR14, DATA14, DATA6 */
word BIT15 :1; /* Port A Bit7, ADDR15, DATA15, DATA7 */
} Bits;
struct {
word grpBIT :16;
} MergedBits;
} PORTABSTR;
extern volatile PORTABSTR _PORTAB @(REG_BASE + 0x00000000);
#define PORTAB _PORTAB.Word
#define PORTAB_BIT0 _PORTAB.Bits.BIT0
#define PORTAB_BIT1 _PORTAB.Bits.BIT1
#define PORTAB_BIT2 _PORTAB.Bits.BIT2
#define PORTAB_BIT3 _PORTAB.Bits.BIT3
#define PORTAB_BIT4 _PORTAB.Bits.BIT4
#define PORTAB_BIT5 _PORTAB.Bits.BIT5
#define PORTAB_BIT6 _PORTAB.Bits.BIT6
#define PORTAB_BIT7 _PORTAB.Bits.BIT7
#define PORTAB_BIT8 _PORTAB.Bits.BIT8
#define PORTAB_BIT9 _PORTAB.Bits.BIT9
#define PORTAB_BIT10 _PORTAB.Bits.BIT10
#define PORTAB_BIT11 _PORTAB.Bits.BIT11
#define PORTAB_BIT12 _PORTAB.Bits.BIT12
#define PORTAB_BIT13 _PORTAB.Bits.BIT13
#define PORTAB_BIT14 _PORTAB.Bits.BIT14
#define PORTAB_BIT15 _PORTAB.Bits.BIT15
#define PORTAB_BIT _PORTAB.MergedBits.grpBIT
#define PORTAB_BIT0_MASK 1
#define PORTAB_BIT1_MASK 2
#define PORTAB_BIT2_MASK 4
#define PORTAB_BIT3_MASK 8
#define PORTAB_BIT4_MASK 16
#define PORTAB_BIT5_MASK 32
#define PORTAB_BIT6_MASK 64
#define PORTAB_BIT7_MASK 128
#define PORTAB_BIT8_MASK 256
#define PORTAB_BIT9_MASK 512
#define PORTAB_BIT10_MASK 1024
#define PORTAB_BIT11_MASK 2048
#define PORTAB_BIT12_MASK 4096
#define PORTAB_BIT13_MASK 8192
#define PORTAB_BIT14_MASK 16384
#define PORTAB_BIT15_MASK 32768
#define PORTAB_BIT_MASK 65535
#define PORTAB_BIT_BITNUM 0
/*** DDRAB - Port AB Data Direction Register; 0x00000002 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** DDRA - Port A Data Direction Register; 0x00000002 ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Data Direction Port A Bit 0 */
byte BIT1 :1; /* Data Direction Port A Bit 1 */
byte BIT2 :1; /* Data Direction Port A Bit 2 */
byte BIT3 :1; /* Data Direction Port A Bit 3 */
byte BIT4 :1; /* Data Direction Port A Bit 4 */
byte BIT5 :1; /* Data Direction Port A Bit 5 */
byte BIT6 :1; /* Data Direction Port A Bit 6 */
byte BIT7 :1; /* Data Direction Port A Bit 7 */
} Bits;
struct {
byte grpBIT :8;
} MergedBits;
} DDRASTR;
#define DDRA _DDRAB.Overlap_STR.DDRASTR.Byte
#define DDRA_BIT0 _DDRAB.Overlap_STR.DDRASTR.Bits.BIT0
#define DDRA_BIT1 _DDRAB.Overlap_STR.DDRASTR.Bits.BIT1
#define DDRA_BIT2 _DDRAB.Overlap_STR.DDRASTR.Bits.BIT2
#define DDRA_BIT3 _DDRAB.Overlap_STR.DDRASTR.Bits.BIT3
#define DDRA_BIT4 _DDRAB.Overlap_STR.DDRASTR.Bits.BIT4
#define DDRA_BIT5 _DDRAB.Overlap_STR.DDRASTR.Bits.BIT5
#define DDRA_BIT6 _DDRAB.Overlap_STR.DDRASTR.Bits.BIT6
#define DDRA_BIT7 _DDRAB.Overlap_STR.DDRASTR.Bits.BIT7
#define DDRA_BIT _DDRAB.Overlap_STR.DDRASTR.MergedBits.grpBIT
#define DDRA_BIT0_MASK 1
#define DDRA_BIT1_MASK 2
#define DDRA_BIT2_MASK 4
#define DDRA_BIT3_MASK 8
#define DDRA_BIT4_MASK 16
#define DDRA_BIT5_MASK 32
#define DDRA_BIT6_MASK 64
#define DDRA_BIT7_MASK 128
#define DDRA_BIT_MASK 255
#define DDRA_BIT_BITNUM 0
/*** DDRB - Port B Data Direction Register; 0x00000003 ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Data Direction Port B Bit 0 */
byte BIT1 :1; /* Data Direction Port B Bit 1 */
byte BIT2 :1; /* Data Direction Port B Bit 2 */
byte BIT3 :1; /* Data Direction Port B Bit 3 */
byte BIT4 :1; /* Data Direction Port B Bit 4 */
byte BIT5 :1; /* Data Direction Port B Bit 5 */
byte BIT6 :1; /* Data Direction Port B Bit 6 */
byte BIT7 :1; /* Data Direction Port B Bit 7 */
} Bits;
struct {
byte grpBIT :8;
} MergedBits;
} DDRBSTR;
#define DDRB _DDRAB.Overlap_STR.DDRBSTR.Byte
#define DDRB_BIT0 _DDRAB.Overlap_STR.DDRBSTR.Bits.BIT0
#define DDRB_BIT1 _DDRAB.Overlap_STR.DDRBSTR.Bits.BIT1
#define DDRB_BIT2 _DDRAB.Overlap_STR.DDRBSTR.Bits.BIT2
#define DDRB_BIT3 _DDRAB.Overlap_STR.DDRBSTR.Bits.BIT3
#define DDRB_BIT4 _DDRAB.Overlap_STR.DDRBSTR.Bits.BIT4
#define DDRB_BIT5 _DDRAB.Overlap_STR.DDRBSTR.Bits.BIT5
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