AT91C_SPI_TPR.helpkey="Transmit Pointer Register"
AT91C_SPI_TPR.access=memorymapped
AT91C_SPI_TPR.address=0xFFFE0108
AT91C_SPI_TPR.width=32
AT91C_SPI_TPR.byteEndian=little
AT91C_SPI_TCR.name="AT91C_SPI_TCR"
AT91C_SPI_TCR.description="Transmit Counter Register"
AT91C_SPI_TCR.helpkey="Transmit Counter Register"
AT91C_SPI_TCR.access=memorymapped
AT91C_SPI_TCR.address=0xFFFE010C
AT91C_SPI_TCR.width=32
AT91C_SPI_TCR.byteEndian=little
AT91C_SPI_RCR.name="AT91C_SPI_RCR"
AT91C_SPI_RCR.description="Receive Counter Register"
AT91C_SPI_RCR.helpkey="Receive Counter Register"
AT91C_SPI_RCR.access=memorymapped
AT91C_SPI_RCR.address=0xFFFE0104
AT91C_SPI_RCR.width=32
AT91C_SPI_RCR.byteEndian=little
AT91C_SPI_PTSR.name="AT91C_SPI_PTSR"
AT91C_SPI_PTSR.description="PDC Transfer Status Register"
AT91C_SPI_PTSR.helpkey="PDC Transfer Status Register"
AT91C_SPI_PTSR.access=memorymapped
AT91C_SPI_PTSR.address=0xFFFE0124
AT91C_SPI_PTSR.width=32
AT91C_SPI_PTSR.byteEndian=little
AT91C_SPI_PTSR.permission.write=none
AT91C_SPI_RNPR.name="AT91C_SPI_RNPR"
AT91C_SPI_RNPR.description="Receive Next Pointer Register"
AT91C_SPI_RNPR.helpkey="Receive Next Pointer Register"
AT91C_SPI_RNPR.access=memorymapped
AT91C_SPI_RNPR.address=0xFFFE0110
AT91C_SPI_RNPR.width=32
AT91C_SPI_RNPR.byteEndian=little
AT91C_SPI_RPR.name="AT91C_SPI_RPR"
AT91C_SPI_RPR.description="Receive Pointer Register"
AT91C_SPI_RPR.helpkey="Receive Pointer Register"
AT91C_SPI_RPR.access=memorymapped
AT91C_SPI_RPR.address=0xFFFE0100
AT91C_SPI_RPR.width=32
AT91C_SPI_RPR.byteEndian=little
AT91C_SPI_TNCR.name="AT91C_SPI_TNCR"
AT91C_SPI_TNCR.description="Transmit Next Counter Register"
AT91C_SPI_TNCR.helpkey="Transmit Next Counter Register"
AT91C_SPI_TNCR.access=memorymapped
AT91C_SPI_TNCR.address=0xFFFE011C
AT91C_SPI_TNCR.width=32
AT91C_SPI_TNCR.byteEndian=little
AT91C_SPI_RNCR.name="AT91C_SPI_RNCR"
AT91C_SPI_RNCR.description="Receive Next Counter Register"
AT91C_SPI_RNCR.helpkey="Receive Next Counter Register"
AT91C_SPI_RNCR.access=memorymapped
AT91C_SPI_RNCR.address=0xFFFE0114
AT91C_SPI_RNCR.width=32
AT91C_SPI_RNCR.byteEndian=little
AT91C_SPI_TNPR.name="AT91C_SPI_TNPR"
AT91C_SPI_TNPR.description="Transmit Next Pointer Register"
AT91C_SPI_TNPR.helpkey="Transmit Next Pointer Register"
AT91C_SPI_TNPR.access=memorymapped
AT91C_SPI_TNPR.address=0xFFFE0118
AT91C_SPI_TNPR.width=32
AT91C_SPI_TNPR.byteEndian=little
# ========== Register definition for SPI peripheral ========== 
AT91C_SPI_IER.name="AT91C_SPI_IER"
AT91C_SPI_IER.description="Interrupt Enable Register"
AT91C_SPI_IER.helpkey="Interrupt Enable Register"
AT91C_SPI_IER.access=memorymapped
AT91C_SPI_IER.address=0xFFFE0014
AT91C_SPI_IER.width=32
AT91C_SPI_IER.byteEndian=little
AT91C_SPI_IER.type=enum
AT91C_SPI_IER.enum.0.name=*** Write only ***
AT91C_SPI_IER.enum.1.name=Error
AT91C_SPI_SR.name="AT91C_SPI_SR"
AT91C_SPI_SR.description="Status Register"
AT91C_SPI_SR.helpkey="Status Register"
AT91C_SPI_SR.access=memorymapped
AT91C_SPI_SR.address=0xFFFE0010
AT91C_SPI_SR.width=32
AT91C_SPI_SR.byteEndian=little
AT91C_SPI_SR.permission.write=none
AT91C_SPI_IDR.name="AT91C_SPI_IDR"
AT91C_SPI_IDR.description="Interrupt Disable Register"
AT91C_SPI_IDR.helpkey="Interrupt Disable Register"
AT91C_SPI_IDR.access=memorymapped
AT91C_SPI_IDR.address=0xFFFE0018
AT91C_SPI_IDR.width=32
AT91C_SPI_IDR.byteEndian=little
AT91C_SPI_IDR.type=enum
AT91C_SPI_IDR.enum.0.name=*** Write only ***
AT91C_SPI_IDR.enum.1.name=Error
AT91C_SPI_CR.name="AT91C_SPI_CR"
AT91C_SPI_CR.description="Control Register"
AT91C_SPI_CR.helpkey="Control Register"
AT91C_SPI_CR.access=memorymapped
AT91C_SPI_CR.address=0xFFFE0000
AT91C_SPI_CR.width=32
AT91C_SPI_CR.byteEndian=little
AT91C_SPI_CR.permission.write=none
AT91C_SPI_MR.name="AT91C_SPI_MR"
AT91C_SPI_MR.description="Mode Register"
AT91C_SPI_MR.helpkey="Mode Register"
AT91C_SPI_MR.access=memorymapped
AT91C_SPI_MR.address=0xFFFE0004
AT91C_SPI_MR.width=32
AT91C_SPI_MR.byteEndian=little
AT91C_SPI_IMR.name="AT91C_SPI_IMR"
AT91C_SPI_IMR.description="Interrupt Mask Register"
AT91C_SPI_IMR.helpkey="Interrupt Mask Register"
AT91C_SPI_IMR.access=memorymapped
AT91C_SPI_IMR.address=0xFFFE001C
AT91C_SPI_IMR.width=32
AT91C_SPI_IMR.byteEndian=little
AT91C_SPI_IMR.permission.write=none
AT91C_SPI_TDR.name="AT91C_SPI_TDR"
AT91C_SPI_TDR.description="Transmit Data Register"
AT91C_SPI_TDR.helpkey="Transmit Data Register"
AT91C_SPI_TDR.access=memorymapped
AT91C_SPI_TDR.address=0xFFFE000C
AT91C_SPI_TDR.width=32
AT91C_SPI_TDR.byteEndian=little
AT91C_SPI_TDR.type=enum
AT91C_SPI_TDR.enum.0.name=*** Write only ***
AT91C_SPI_TDR.enum.1.name=Error
AT91C_SPI_RDR.name="AT91C_SPI_RDR"
AT91C_SPI_RDR.description="Receive Data Register"
AT91C_SPI_RDR.helpkey="Receive Data Register"
AT91C_SPI_RDR.access=memorymapped
AT91C_SPI_RDR.address=0xFFFE0008
AT91C_SPI_RDR.width=32
AT91C_SPI_RDR.byteEndian=little
AT91C_SPI_RDR.permission.write=none
AT91C_SPI_CSR.name="AT91C_SPI_CSR"
AT91C_SPI_CSR.description="Chip Select Register"
AT91C_SPI_CSR.helpkey="Chip Select Register"
AT91C_SPI_CSR.access=memorymapped
AT91C_SPI_CSR.address=0xFFFE0030
AT91C_SPI_CSR.width=32
AT91C_SPI_CSR.byteEndian=little
# ========== Register definition for PDC_ADC peripheral ========== 
AT91C_ADC_PTSR.name="AT91C_ADC_PTSR"
AT91C_ADC_PTSR.description="PDC Transfer Status Register"
AT91C_ADC_PTSR.helpkey="PDC Transfer Status Register"
AT91C_ADC_PTSR.access=memorymapped
AT91C_ADC_PTSR.address=0xFFFD8124
AT91C_ADC_PTSR.width=32
AT91C_ADC_PTSR.byteEndian=little
AT91C_ADC_PTSR.permission.write=none
AT91C_ADC_PTCR.name="AT91C_ADC_PTCR"
AT91C_ADC_PTCR.description="PDC Transfer Control Register"
AT91C_ADC_PTCR.helpkey="PDC Transfer Control Register"
AT91C_ADC_PTCR.access=memorymapped
AT91C_ADC_PTCR.address=0xFFFD8120
AT91C_ADC_PTCR.width=32
AT91C_ADC_PTCR.byteEndian=little
AT91C_ADC_PTCR.type=enum
AT91C_ADC_PTCR.enum.0.name=*** Write only ***
AT91C_ADC_PTCR.enum.1.name=Error
AT91C_ADC_TNPR.name="AT91C_ADC_TNPR"
AT91C_ADC_TNPR.description="Transmit Next Pointer Register"
AT91C_ADC_TNPR.helpkey="Transmit Next Pointer Register"
AT91C_ADC_TNPR.access=memorymapped
AT91C_ADC_TNPR.address=0xFFFD8118
AT91C_ADC_TNPR.width=32
AT91C_ADC_TNPR.byteEndian=little
AT91C_ADC_TNCR.name="AT91C_ADC_TNCR"
AT91C_ADC_TNCR.description="Transmit Next Counter Register"
AT91C_ADC_TNCR.helpkey="Transmit Next Counter Register"
AT91C_ADC_TNCR.access=memorymapped
AT91C_ADC_TNCR.address=0xFFFD811C
AT91C_ADC_TNCR.width=32
AT91C_ADC_TNCR.byteEndian=little
AT91C_ADC_RNPR.name="AT91C_ADC_RNPR"
AT91C_ADC_RNPR.description="Receive Next Pointer Register"
AT91C_ADC_RNPR.helpkey="Receive Next Pointer Register"
AT91C_ADC_RNPR.access=memorymapped
AT91C_ADC_RNPR.address=0xFFFD8110
AT91C_ADC_RNPR.width=32
AT91C_ADC_RNPR.byteEndian=little
AT91C_ADC_RNCR.name="AT91C_ADC_RNCR"
AT91C_ADC_RNCR.description="Receive Next Counter Register"
AT91C_ADC_RNCR.helpkey="Receive Next Counter Register"
AT91C_ADC_RNCR.access=memorymapped
AT91C_ADC_RNCR.address=0xFFFD8114
AT91C_ADC_RNCR.width=32
AT91C_ADC_RNCR.byteEndian=little
AT91C_ADC_RPR.name="AT91C_ADC_RPR"
AT91C_ADC_RPR.description="Receive Pointer Register"
AT91C_ADC_RPR.helpkey="Receive Pointer Register"
AT91C_ADC_RPR.access=memorymapped
AT91C_ADC_RPR.address=0xFFFD8100
AT91C_ADC_RPR.width=32
AT91C_ADC_RPR.byteEndian=little
AT91C_ADC_TCR.name="AT91C_ADC_TCR"
AT91C_ADC_TCR.description="Transmit Counter Register"
AT91C_ADC_TCR.helpkey="Transmit Counter Register"
AT91C_ADC_TCR.access=memorymapped
AT91C_ADC_TCR.address=0xFFFD810C
AT91C_ADC_TCR.width=32
AT91C_ADC_TCR.byteEndian=little
AT91C_ADC_TPR.name="AT91C_ADC_TPR"
AT91C_ADC_TPR.description="Transmit Pointer Register"
AT91C_ADC_TPR.helpkey="Transmit Pointer Register"
AT91C_ADC_TPR.access=memorymapped
AT91C_ADC_TPR.address=0xFFFD8108
AT91C_ADC_TPR.width=32
AT91C_ADC_TPR.byteEndian=little
AT91C_ADC_RCR.name="AT91C_ADC_RCR"
AT91C_ADC_RCR.description="Receive Counter Register"
AT91C_ADC_RCR.helpkey="Receive Counter Register"
AT91C_ADC_RCR.access=memorymapped
AT91C_ADC_RCR.address=0xFFFD8104
AT91C_ADC_RCR.width=32
AT91C_ADC_RCR.byteEndian=little
# ========== Register definition for ADC peripheral ========== 
AT91C_ADC_CDR2.name="AT91C_ADC_CDR2"
AT91C_ADC_CDR2.description="ADC Channel Data Register 2"
AT91C_ADC_CDR2.helpkey="ADC Channel Data Register 2"
AT91C_ADC_CDR2.access=memorymapped
AT91C_ADC_CDR2.address=0xFFFD8038
AT91C_ADC_CDR2.width=32
AT91C_ADC_CDR2.byteEndian=little
AT91C_ADC_CDR2.permission.write=none
AT91C_ADC_CDR3.name="AT91C_ADC_CDR3"
AT91C_ADC_CDR3.description="ADC Channel Data Register 3"
AT91C_ADC_CDR3.helpkey="ADC Channel Data Register 3"
AT91C_ADC_CDR3.access=memorymapped
AT91C_ADC_CDR3.address=0xFFFD803C
AT91C_ADC_CDR3.width=32
AT91C_ADC_CDR3.byteEndian=little
AT91C_ADC_CDR3.permission.write=none
AT91C_ADC_CDR0.name="AT91C_ADC_CDR0"
AT91C_ADC_CDR0.description="ADC Channel Data Register 0"
AT91C_ADC_CDR0.helpkey="ADC Channel Data Register 0"
AT91C_ADC_CDR0.access=memorymapped
AT91C_ADC_CDR0.address=0xFFFD8030
AT91C_ADC_CDR0.width=32
AT91C_ADC_CDR0.byteEndian=little
AT91C_ADC_CDR0.permission.write=none
AT91C_ADC_CDR5.name="AT91C_ADC_CDR5"
AT91C_ADC_CDR5.description="ADC Channel Data Register 5"
AT91C_ADC_CDR5.helpkey="ADC Channel Data Register 5"
AT91C_ADC_CDR5.access=memorymapped
AT91C_ADC_CDR5.address=0xFFFD8044
AT91C_ADC_CDR5.width=32
AT91C_ADC_CDR5.byteEndian=little
AT91C_ADC_CDR5.permission.write=none
AT91C_ADC_CHDR.name="AT91C_ADC_CHDR"
AT91C_ADC_CHDR.description="ADC Channel Disable Register"
AT91C_ADC_CHDR.helpkey="ADC Channel Disable Register"
AT91C_ADC_CHDR.access=memorymapped
AT91C_ADC_CHDR.address=0xFFFD8014
AT91C_ADC_CHDR.width=32
AT91C_ADC_CHDR.byteEndian=little
AT91C_ADC_CHDR.type=enum
AT91C_ADC_CHDR.enum.0.name=*** Write only ***
AT91C_ADC_CHDR.enum.1.name=Error
AT91C_ADC_SR.name="AT91C_ADC_SR"
AT91C_ADC_SR.description="ADC Status Register"
AT91C_ADC_SR.helpkey="ADC Status Register"
AT91C_ADC_SR.access=memorymapped
AT91C_ADC_SR.address=0xFFFD801C
AT91C_ADC_SR.width=32
AT91C_ADC_SR.byteEndian=little
AT91C_ADC_SR.permission.write=none
AT91C_ADC_CDR4.name="AT91C_ADC_CDR4"
AT91C_ADC_CDR4.description="ADC Channel Data Register 4"
AT91C_ADC_CDR4.helpkey="ADC Channel Data Register 4"
AT91C_ADC_CDR4.access=memorymapped
AT91C_ADC_CDR4.address=0xFFFD8040
AT91C_ADC_CDR4.width=32
AT91C_ADC_CDR4.byteEndian=little
AT91C_ADC_CDR4.permission.write=none
AT91C_ADC_CDR1.name="AT91C_ADC_CDR1"
AT91C_ADC_CDR1.description="ADC Channel Data Register 1"
AT91C_ADC_CDR1.helpkey="ADC Channel Data Register 1"
AT91C_ADC_CDR1.access=memorymapped
AT91C_ADC_CDR1.address=0xFFFD8034
AT91C_ADC_CDR1.width=32
AT91C_ADC_CDR1.byteEndian=little
AT91C_ADC_CDR1.permission.write=none
AT91C_ADC_LCDR.name="AT91C_ADC_LCDR"
AT91C_ADC_LCDR.description="ADC Last Converted Data Register"
AT91C_ADC_LCDR.helpkey="ADC Last Converted Data Register"
AT91C_ADC_LCDR.access=memorymapped
AT91C_ADC_LCDR.address=0xFFFD8020
AT91C_ADC_LCDR.width=32
AT91C_ADC_LCDR.byteEndian=little
AT91C_ADC_LCDR.permission.write=none
AT91C_ADC_IDR.name="AT91C_ADC_IDR"
AT91C_ADC_IDR.description="ADC Interrupt Disable Register"
AT91C_ADC_IDR.helpkey="ADC Interrupt Disable Register"
AT91C_ADC_IDR.access=memorymapped
AT91C_ADC_IDR.address=0xFFFD8028
AT91C_ADC_IDR.width=32
AT91C_ADC_IDR.byteEndian=little
AT91C_ADC_IDR.type=enum
AT91C_ADC_IDR.enum.0.name=*** Write only ***
AT91C_ADC_IDR.enum.1.name=Error
AT91C_ADC_CR.name="AT91C_ADC_CR"
AT91C_ADC_CR.description="ADC Control Register"
AT91C_ADC_CR.helpkey="ADC Control Register"
AT91C_ADC_CR.access=memorymapped
AT91C_ADC_CR.address=0xFFFD8000
AT91C_ADC_CR.width=32
AT91C_ADC_CR.byteEndian=little
AT91C_ADC_CR.type=enum
AT91C_ADC_CR.enum.0.name=*** Write only ***
AT91C_ADC_CR.enum.1.name=Error
AT91C_ADC_CDR7.name="AT91C_ADC_CDR7"
AT91C_ADC_CDR7.description="ADC Channel Data Register 7"
AT91C_ADC_CDR7.helpkey="ADC Channel Data Register 7"
AT91C_ADC_CDR7.access=memorymapped
AT91C_ADC_CDR7.address=0xFFFD804C
AT91C_ADC_CDR7.width=32
AT91C_ADC_CDR7.byteEndian=little
AT91C_ADC_CDR7.permission.write=none
AT91C_ADC_CDR6.name="AT91C_ADC_CDR6"
AT91C_ADC_CDR6.description="ADC Channel Data Register 6"
AT91C_ADC_CDR6.helpkey="ADC Channel Data Register 6"
AT91C_ADC_CDR6.access=memorymapped
AT91C_ADC_CDR6.address=0xFFFD8048
AT91C_ADC_CDR6.width=32
AT91C_ADC_CDR6.byteEndian=little
AT91C_ADC_CDR6.permission.write=none
AT91C_ADC_IER.name="AT91C_ADC_IER"
AT91C_ADC_IER.description="ADC Interrupt Enable Register"
AT91C_ADC_IER.helpkey="ADC Interrupt Enable Register"
AT91C_ADC_IER.access=memorymapped