AT91C_ADC_IER.address=0xFFFD8024
AT91C_ADC_IER.width=32
AT91C_ADC_IER.byteEndian=little
AT91C_ADC_IER.type=enum
AT91C_ADC_IER.enum.0.name=*** Write only ***
AT91C_ADC_IER.enum.1.name=Error
AT91C_ADC_CHER.name="AT91C_ADC_CHER"
AT91C_ADC_CHER.description="ADC Channel Enable Register"
AT91C_ADC_CHER.helpkey="ADC Channel Enable Register"
AT91C_ADC_CHER.access=memorymapped
AT91C_ADC_CHER.address=0xFFFD8010
AT91C_ADC_CHER.width=32
AT91C_ADC_CHER.byteEndian=little
AT91C_ADC_CHER.type=enum
AT91C_ADC_CHER.enum.0.name=*** Write only ***
AT91C_ADC_CHER.enum.1.name=Error
AT91C_ADC_CHSR.name="AT91C_ADC_CHSR"
AT91C_ADC_CHSR.description="ADC Channel Status Register"
AT91C_ADC_CHSR.helpkey="ADC Channel Status Register"
AT91C_ADC_CHSR.access=memorymapped
AT91C_ADC_CHSR.address=0xFFFD8018
AT91C_ADC_CHSR.width=32
AT91C_ADC_CHSR.byteEndian=little
AT91C_ADC_CHSR.permission.write=none
AT91C_ADC_MR.name="AT91C_ADC_MR"
AT91C_ADC_MR.description="ADC Mode Register"
AT91C_ADC_MR.helpkey="ADC Mode Register"
AT91C_ADC_MR.access=memorymapped
AT91C_ADC_MR.address=0xFFFD8004
AT91C_ADC_MR.width=32
AT91C_ADC_MR.byteEndian=little
AT91C_ADC_IMR.name="AT91C_ADC_IMR"
AT91C_ADC_IMR.description="ADC Interrupt Mask Register"
AT91C_ADC_IMR.helpkey="ADC Interrupt Mask Register"
AT91C_ADC_IMR.access=memorymapped
AT91C_ADC_IMR.address=0xFFFD802C
AT91C_ADC_IMR.width=32
AT91C_ADC_IMR.byteEndian=little
AT91C_ADC_IMR.permission.write=none
# ========== Register definition for PDC_SSC peripheral ========== 
AT91C_SSC_TNCR.name="AT91C_SSC_TNCR"
AT91C_SSC_TNCR.description="Transmit Next Counter Register"
AT91C_SSC_TNCR.helpkey="Transmit Next Counter Register"
AT91C_SSC_TNCR.access=memorymapped
AT91C_SSC_TNCR.address=0xFFFD411C
AT91C_SSC_TNCR.width=32
AT91C_SSC_TNCR.byteEndian=little
AT91C_SSC_RPR.name="AT91C_SSC_RPR"
AT91C_SSC_RPR.description="Receive Pointer Register"
AT91C_SSC_RPR.helpkey="Receive Pointer Register"
AT91C_SSC_RPR.access=memorymapped
AT91C_SSC_RPR.address=0xFFFD4100
AT91C_SSC_RPR.width=32
AT91C_SSC_RPR.byteEndian=little
AT91C_SSC_RNCR.name="AT91C_SSC_RNCR"
AT91C_SSC_RNCR.description="Receive Next Counter Register"
AT91C_SSC_RNCR.helpkey="Receive Next Counter Register"
AT91C_SSC_RNCR.access=memorymapped
AT91C_SSC_RNCR.address=0xFFFD4114
AT91C_SSC_RNCR.width=32
AT91C_SSC_RNCR.byteEndian=little
AT91C_SSC_TPR.name="AT91C_SSC_TPR"
AT91C_SSC_TPR.description="Transmit Pointer Register"
AT91C_SSC_TPR.helpkey="Transmit Pointer Register"
AT91C_SSC_TPR.access=memorymapped
AT91C_SSC_TPR.address=0xFFFD4108
AT91C_SSC_TPR.width=32
AT91C_SSC_TPR.byteEndian=little
AT91C_SSC_PTCR.name="AT91C_SSC_PTCR"
AT91C_SSC_PTCR.description="PDC Transfer Control Register"
AT91C_SSC_PTCR.helpkey="PDC Transfer Control Register"
AT91C_SSC_PTCR.access=memorymapped
AT91C_SSC_PTCR.address=0xFFFD4120
AT91C_SSC_PTCR.width=32
AT91C_SSC_PTCR.byteEndian=little
AT91C_SSC_PTCR.type=enum
AT91C_SSC_PTCR.enum.0.name=*** Write only ***
AT91C_SSC_PTCR.enum.1.name=Error
AT91C_SSC_TCR.name="AT91C_SSC_TCR"
AT91C_SSC_TCR.description="Transmit Counter Register"
AT91C_SSC_TCR.helpkey="Transmit Counter Register"
AT91C_SSC_TCR.access=memorymapped
AT91C_SSC_TCR.address=0xFFFD410C
AT91C_SSC_TCR.width=32
AT91C_SSC_TCR.byteEndian=little
AT91C_SSC_RCR.name="AT91C_SSC_RCR"
AT91C_SSC_RCR.description="Receive Counter Register"
AT91C_SSC_RCR.helpkey="Receive Counter Register"
AT91C_SSC_RCR.access=memorymapped
AT91C_SSC_RCR.address=0xFFFD4104
AT91C_SSC_RCR.width=32
AT91C_SSC_RCR.byteEndian=little
AT91C_SSC_RNPR.name="AT91C_SSC_RNPR"
AT91C_SSC_RNPR.description="Receive Next Pointer Register"
AT91C_SSC_RNPR.helpkey="Receive Next Pointer Register"
AT91C_SSC_RNPR.access=memorymapped
AT91C_SSC_RNPR.address=0xFFFD4110
AT91C_SSC_RNPR.width=32
AT91C_SSC_RNPR.byteEndian=little
AT91C_SSC_TNPR.name="AT91C_SSC_TNPR"
AT91C_SSC_TNPR.description="Transmit Next Pointer Register"
AT91C_SSC_TNPR.helpkey="Transmit Next Pointer Register"
AT91C_SSC_TNPR.access=memorymapped
AT91C_SSC_TNPR.address=0xFFFD4118
AT91C_SSC_TNPR.width=32
AT91C_SSC_TNPR.byteEndian=little
AT91C_SSC_PTSR.name="AT91C_SSC_PTSR"
AT91C_SSC_PTSR.description="PDC Transfer Status Register"
AT91C_SSC_PTSR.helpkey="PDC Transfer Status Register"
AT91C_SSC_PTSR.access=memorymapped
AT91C_SSC_PTSR.address=0xFFFD4124
AT91C_SSC_PTSR.width=32
AT91C_SSC_PTSR.byteEndian=little
AT91C_SSC_PTSR.permission.write=none
# ========== Register definition for SSC peripheral ========== 
AT91C_SSC_RHR.name="AT91C_SSC_RHR"
AT91C_SSC_RHR.description="Receive Holding Register"
AT91C_SSC_RHR.helpkey="Receive Holding Register"
AT91C_SSC_RHR.access=memorymapped
AT91C_SSC_RHR.address=0xFFFD4020
AT91C_SSC_RHR.width=32
AT91C_SSC_RHR.byteEndian=little
AT91C_SSC_RHR.permission.write=none
AT91C_SSC_RSHR.name="AT91C_SSC_RSHR"
AT91C_SSC_RSHR.description="Receive Sync Holding Register"
AT91C_SSC_RSHR.helpkey="Receive Sync Holding Register"
AT91C_SSC_RSHR.access=memorymapped
AT91C_SSC_RSHR.address=0xFFFD4030
AT91C_SSC_RSHR.width=32
AT91C_SSC_RSHR.byteEndian=little
AT91C_SSC_RSHR.permission.write=none
AT91C_SSC_TFMR.name="AT91C_SSC_TFMR"
AT91C_SSC_TFMR.description="Transmit Frame Mode Register"
AT91C_SSC_TFMR.helpkey="Transmit Frame Mode Register"
AT91C_SSC_TFMR.access=memorymapped
AT91C_SSC_TFMR.address=0xFFFD401C
AT91C_SSC_TFMR.width=32
AT91C_SSC_TFMR.byteEndian=little
AT91C_SSC_IDR.name="AT91C_SSC_IDR"
AT91C_SSC_IDR.description="Interrupt Disable Register"
AT91C_SSC_IDR.helpkey="Interrupt Disable Register"
AT91C_SSC_IDR.access=memorymapped
AT91C_SSC_IDR.address=0xFFFD4048
AT91C_SSC_IDR.width=32
AT91C_SSC_IDR.byteEndian=little
AT91C_SSC_IDR.type=enum
AT91C_SSC_IDR.enum.0.name=*** Write only ***
AT91C_SSC_IDR.enum.1.name=Error
AT91C_SSC_THR.name="AT91C_SSC_THR"
AT91C_SSC_THR.description="Transmit Holding Register"
AT91C_SSC_THR.helpkey="Transmit Holding Register"
AT91C_SSC_THR.access=memorymapped
AT91C_SSC_THR.address=0xFFFD4024
AT91C_SSC_THR.width=32
AT91C_SSC_THR.byteEndian=little
AT91C_SSC_THR.type=enum
AT91C_SSC_THR.enum.0.name=*** Write only ***
AT91C_SSC_THR.enum.1.name=Error
AT91C_SSC_RCMR.name="AT91C_SSC_RCMR"
AT91C_SSC_RCMR.description="Receive Clock ModeRegister"
AT91C_SSC_RCMR.helpkey="Receive Clock ModeRegister"
AT91C_SSC_RCMR.access=memorymapped
AT91C_SSC_RCMR.address=0xFFFD4010
AT91C_SSC_RCMR.width=32
AT91C_SSC_RCMR.byteEndian=little
AT91C_SSC_IER.name="AT91C_SSC_IER"
AT91C_SSC_IER.description="Interrupt Enable Register"
AT91C_SSC_IER.helpkey="Interrupt Enable Register"
AT91C_SSC_IER.access=memorymapped
AT91C_SSC_IER.address=0xFFFD4044
AT91C_SSC_IER.width=32
AT91C_SSC_IER.byteEndian=little
AT91C_SSC_IER.type=enum
AT91C_SSC_IER.enum.0.name=*** Write only ***
AT91C_SSC_IER.enum.1.name=Error
AT91C_SSC_TSHR.name="AT91C_SSC_TSHR"
AT91C_SSC_TSHR.description="Transmit Sync Holding Register"
AT91C_SSC_TSHR.helpkey="Transmit Sync Holding Register"
AT91C_SSC_TSHR.access=memorymapped
AT91C_SSC_TSHR.address=0xFFFD4034
AT91C_SSC_TSHR.width=32
AT91C_SSC_TSHR.byteEndian=little
AT91C_SSC_SR.name="AT91C_SSC_SR"
AT91C_SSC_SR.description="Status Register"
AT91C_SSC_SR.helpkey="Status Register"
AT91C_SSC_SR.access=memorymapped
AT91C_SSC_SR.address=0xFFFD4040
AT91C_SSC_SR.width=32
AT91C_SSC_SR.byteEndian=little
AT91C_SSC_SR.permission.write=none
AT91C_SSC_CMR.name="AT91C_SSC_CMR"
AT91C_SSC_CMR.description="Clock Mode Register"
AT91C_SSC_CMR.helpkey="Clock Mode Register"
AT91C_SSC_CMR.access=memorymapped
AT91C_SSC_CMR.address=0xFFFD4004
AT91C_SSC_CMR.width=32
AT91C_SSC_CMR.byteEndian=little
AT91C_SSC_TCMR.name="AT91C_SSC_TCMR"
AT91C_SSC_TCMR.description="Transmit Clock Mode Register"
AT91C_SSC_TCMR.helpkey="Transmit Clock Mode Register"
AT91C_SSC_TCMR.access=memorymapped
AT91C_SSC_TCMR.address=0xFFFD4018
AT91C_SSC_TCMR.width=32
AT91C_SSC_TCMR.byteEndian=little
AT91C_SSC_CR.name="AT91C_SSC_CR"
AT91C_SSC_CR.description="Control Register"
AT91C_SSC_CR.helpkey="Control Register"
AT91C_SSC_CR.access=memorymapped
AT91C_SSC_CR.address=0xFFFD4000
AT91C_SSC_CR.width=32
AT91C_SSC_CR.byteEndian=little
AT91C_SSC_CR.type=enum
AT91C_SSC_CR.enum.0.name=*** Write only ***
AT91C_SSC_CR.enum.1.name=Error
AT91C_SSC_IMR.name="AT91C_SSC_IMR"
AT91C_SSC_IMR.description="Interrupt Mask Register"
AT91C_SSC_IMR.helpkey="Interrupt Mask Register"
AT91C_SSC_IMR.access=memorymapped
AT91C_SSC_IMR.address=0xFFFD404C
AT91C_SSC_IMR.width=32
AT91C_SSC_IMR.byteEndian=little
AT91C_SSC_IMR.permission.write=none
AT91C_SSC_RFMR.name="AT91C_SSC_RFMR"
AT91C_SSC_RFMR.description="Receive Frame Mode Register"
AT91C_SSC_RFMR.helpkey="Receive Frame Mode Register"
AT91C_SSC_RFMR.access=memorymapped
AT91C_SSC_RFMR.address=0xFFFD4014
AT91C_SSC_RFMR.width=32
AT91C_SSC_RFMR.byteEndian=little
# ========== Register definition for PDC_US1 peripheral ========== 
AT91C_US1_RNCR.name="AT91C_US1_RNCR"
AT91C_US1_RNCR.description="Receive Next Counter Register"
AT91C_US1_RNCR.helpkey="Receive Next Counter Register"
AT91C_US1_RNCR.access=memorymapped
AT91C_US1_RNCR.address=0xFFFC4114
AT91C_US1_RNCR.width=32
AT91C_US1_RNCR.byteEndian=little
AT91C_US1_PTCR.name="AT91C_US1_PTCR"
AT91C_US1_PTCR.description="PDC Transfer Control Register"
AT91C_US1_PTCR.helpkey="PDC Transfer Control Register"
AT91C_US1_PTCR.access=memorymapped
AT91C_US1_PTCR.address=0xFFFC4120
AT91C_US1_PTCR.width=32
AT91C_US1_PTCR.byteEndian=little
AT91C_US1_PTCR.type=enum
AT91C_US1_PTCR.enum.0.name=*** Write only ***
AT91C_US1_PTCR.enum.1.name=Error
AT91C_US1_TCR.name="AT91C_US1_TCR"
AT91C_US1_TCR.description="Transmit Counter Register"
AT91C_US1_TCR.helpkey="Transmit Counter Register"
AT91C_US1_TCR.access=memorymapped
AT91C_US1_TCR.address=0xFFFC410C
AT91C_US1_TCR.width=32
AT91C_US1_TCR.byteEndian=little
AT91C_US1_PTSR.name="AT91C_US1_PTSR"
AT91C_US1_PTSR.description="PDC Transfer Status Register"
AT91C_US1_PTSR.helpkey="PDC Transfer Status Register"
AT91C_US1_PTSR.access=memorymapped
AT91C_US1_PTSR.address=0xFFFC4124
AT91C_US1_PTSR.width=32
AT91C_US1_PTSR.byteEndian=little
AT91C_US1_PTSR.permission.write=none
AT91C_US1_TNPR.name="AT91C_US1_TNPR"
AT91C_US1_TNPR.description="Transmit Next Pointer Register"
AT91C_US1_TNPR.helpkey="Transmit Next Pointer Register"
AT91C_US1_TNPR.access=memorymapped
AT91C_US1_TNPR.address=0xFFFC4118
AT91C_US1_TNPR.width=32
AT91C_US1_TNPR.byteEndian=little
AT91C_US1_RCR.name="AT91C_US1_RCR"
AT91C_US1_RCR.description="Receive Counter Register"
AT91C_US1_RCR.helpkey="Receive Counter Register"
AT91C_US1_RCR.access=memorymapped
AT91C_US1_RCR.address=0xFFFC4104
AT91C_US1_RCR.width=32
AT91C_US1_RCR.byteEndian=little
AT91C_US1_RNPR.name="AT91C_US1_RNPR"
AT91C_US1_RNPR.description="Receive Next Pointer Register"
AT91C_US1_RNPR.helpkey="Receive Next Pointer Register"
AT91C_US1_RNPR.access=memorymapped
AT91C_US1_RNPR.address=0xFFFC4110
AT91C_US1_RNPR.width=32
AT91C_US1_RNPR.byteEndian=little
AT91C_US1_RPR.name="AT91C_US1_RPR"
AT91C_US1_RPR.description="Receive Pointer Register"
AT91C_US1_RPR.helpkey="Receive Pointer Register"
AT91C_US1_RPR.access=memorymapped
AT91C_US1_RPR.address=0xFFFC4100
AT91C_US1_RPR.width=32
AT91C_US1_RPR.byteEndian=little
AT91C_US1_TNCR.name="AT91C_US1_TNCR"
AT91C_US1_TNCR.description="Transmit Next Counter Register"
AT91C_US1_TNCR.helpkey="Transmit Next Counter Register"
AT91C_US1_TNCR.access=memorymapped
AT91C_US1_TNCR.address=0xFFFC411C
AT91C_US1_TNCR.width=32
AT91C_US1_TNCR.byteEndian=little
AT91C_US1_TPR.name="AT91C_US1_TPR"
AT91C_US1_TPR.description="Transmit Pointer Register"
AT91C_US1_TPR.helpkey="Transmit Pointer Register"
AT91C_US1_TPR.access=memorymapped
AT91C_US1_TPR.address=0xFFFC4108
AT91C_US1_TPR.width=32
AT91C_US1_TPR.byteEndian=little
# ========== Register definition for US1 peripheral ========== 
AT91C_US1_IF.name="AT91C_US1_IF"
AT91C_US1_IF.description="IRDA_FILTER Register"
AT91C_US1_IF.helpkey="IRDA_FILTER Register"
AT91C_US1_IF.access=memorymapped
AT91C_US1_IF.address=0xFFFC404C
AT91C_US1_IF.width=32
AT91C_US1_IF.byteEndian=little
AT91C_US1_NER.name="AT91C_US1_NER"
AT91C_US1_NER.description="Nb Errors Register"
AT91C_US1_NER.helpkey="Nb Errors Register"
AT91C_US1_NER.access=memorymapped
AT91C_US1_NER.address=0xFFFC4044
AT91C_US1_NER.width=32
AT91C_US1_NER.byteEndian=little
AT91C_US1_NER.permission.write=none
AT91C_US1_RTOR.name="AT91C_US1_RTOR"
AT91C_US1_RTOR.description="Receiver Time-out Register"
AT91C_US1_RTOR.helpkey="Receiver Time-out Register"
AT91C_US1_RTOR.access=memorymapped
AT91C_US1_RTOR.address=0xFFFC4024
AT91C_US1_RTOR.width=32
AT91C_US