PClk     : 8M





void ILI9325_971711_Init()//CMO 2.8"
{

    DelayX1mS(100); 
    
  //************* Start Initial Sequence **********//
  
    ssp_write(0x7000E3, 0x723008);                                                 
    ssp_write(0x7000E7, 0x720012);                                                 
    ssp_write(0x7000EF, 0x721231);                                              

    ssp_write(0x700000, 0x720001);     // Start internal OSC.
    ssp_write(0x700001, 0x720100);    // set SS and SM bit
    ssp_write(0x700002, 0x720700);    // set 1 line inversion
    ssp_write(0x700003, 0x721030);    // set GRAM write direction and BGR=1. 
    ssp_write(0x700004, 0x720000);    // Resize register
    
    ssp_write(0x700008, 0x720303);    // set the back porch and front porch
                                       // FP=3
                                       // BP=3
    ssp_write(0x700009, 0x720000);    // set non-display area refresh cycle ISC[3:0]
    ssp_write(0x70000A, 0x720000);    // FMARK function
    ssp_write(0x70000C, 0x720111);     // RGB interface setting
                                       // 16bit RGB interface
                                       
    ssp_write(0x70000D, 0x720000);    // Frame marker Position
    ssp_write(0x70000F, 0x720000);     // RGB interface polarity   //0x1a      Vsyn  Hsyn  Pclk and Enable  (adjust)
    
  //*************Power On sequence ****************//
    ssp_write(0x700010, 0x720000);         // SAP, BT[3:0], AP, DSTB, SLP, STB
    ssp_write(0x700011, 0x720007);         // DC1[2:0], DC0[2:0], VC[2:0]
    ssp_write(0x700012, 0x720000);         // VREG1OUT voltage
    ssp_write(0x700013, 0x720000);         // VDV[4:0] for VCOM amplitude
    DelayX1mS(200);                                // Dis-charge capacitor power voltage
  
    ssp_write(0x700010, 0x7217B0);         // SAP, BT[3:0], AP, DSTB, SLP, STB
    ssp_write(0x700011, 0x720227);         // DC1[2:0], DC0[2:0], VC[2:0]
    DelayX1mS(50);              // Delay 50ms  
    ssp_write(0x700012, 0x72001B);         // VREG1OUT voltage
    DelayX1mS(50);              // Delay 50ms
    ssp_write(0x700013, 0x721600);         // VDV[4:0] for VCOM amplitude
    ssp_write(0x700029, 0x720018);         // VCM[4:0] for VCOMH
    DelayX1mS(50);    
    
    ssp_write(0x700020, 0x720000);         // GRAM horizontal Address
    ssp_write(0x700021, 0x720000);         // GRAM Vertical Address
    ssp_write(0x70002B, 0x72000C);         // GRAM Vertical Address
  
  // ----------- Adjust the Gamma  Curve ----------//
    ssp_write(0x700030, 0x720000);  
    ssp_write(0x700031, 0x720404);  
    ssp_write(0x700032, 0x720304);     
    ssp_write(0x700035, 0x720005);  
    ssp_write(0x700036, 0x721604);  
    ssp_write(0x700037, 0x720304);  
    ssp_write(0x700038, 0x720303);  
    ssp_write(0x700039, 0x720707);    
    ssp_write(0x70003C, 0x720500);  
    ssp_write(0x70003D, 0x72000F); 
  
  //------------------ Set GRAM area ---------------//
    ssp_write(0x700050, 0x720000);     // Horizontal GRAM Start Address
    ssp_write(0x700051, 0x7200EF);     // Horizontal GRAM End Address
    ssp_write(0x700052, 0x720000);     // Vertical GRAM Start Address
    ssp_write(0x700053, 0x72013F);     // Vertical GRAM Start Address
    
      
    ssp_write(0x700060, 0x72A700);     // Gate Scan Line
    ssp_write(0x700061, 0x720001);     // NDL,VLE, REV
    ssp_write(0x70006A, 0x720000);     // set scrolling line
  
  //-------------- Partial Display Control ---------//
    ssp_write(0x700080, 0x720000);
    ssp_write(0x700081, 0x720000);
    ssp_write(0x700082, 0x720000);
    ssp_write(0x700083, 0x720000);
    ssp_write(0x700084, 0x720000);
    ssp_write(0x700085, 0x720000);
    
  //-------------- Panel Control -------------------//
    ssp_write(0x700090, 0x720010);
    ssp_write(0x700092, 0x720600);

  
    ssp_write(0x700007, 0x720133);     // 262K color and display ON
                                        //RGB 0x0110
    Write_Serial(0x700022);
    
    
    
}