;            reg -> R20
	.even
_SPI_Read_Buf::
	rcall push_gset4
	movw R12,R18
	mov R20,R16
	ldd R10,y+8
	.dbline -1
	.dbline 333
; }
; /**************************************************
; Function: SPI_Read_Buf();
; 
; Description:
;   Reads 'bytes' #of bytes from register 'reg'
;   Typically used to read RX payload, Rx/Tx address */
; /**************************************************/
; unsigned char SPI_Read_Buf(unsigned char reg, unsigned char *pBuf, unsigned char bytes)
; {
	.dbline 335
; 	unsigned char status,byte_ctr;
; 	nRF24L01_CSNL;
	cbi 0xb,6
	.dbline 336
; 	delay();
	rcall _delay
	.dbline 337
;   	status = SPI_RW(reg);       		// Select register to write to and read status byte
	mov R16,R20
	rcall _SPI_RW
	mov R20,R16
	.dbline 338
; 	for(byte_ctr=0;byte_ctr<bytes;byte_ctr++)
	clr R22
	rjmp L48
L45:
	.dbline 339
	clr R16
	rcall _SPI_RW
	mov R30,R22
	clr R31
	add R30,R12
	adc R31,R13
	std z+0,R16
L46:
	.dbline 338
	inc R22
L48:
	.dbline 338
	cp R22,R10
	brlo L45
	.dbline 340
;     	pBuf[byte_ctr] = SPI_RW(0);    // Perform SPI_RW to read byte from nRF24L01
; 	nRF24L01_CSNH;
	sbi 0xb,6
	.dbline 341
; 	delay();
	rcall _delay
	.dbline 342
;   	return(status);                    // return nRF24L01 status byte
	mov R16,R20
	.dbline -2
L44:
	rcall pop_gset4
	.dbline 0 ; func end
	ret
	.dbsym r status 20 c
	.dbsym r byte_ctr 22 c
	.dbsym r bytes 10 c
	.dbsym r pBuf 12 pc
	.dbsym r reg 20 c
	.dbend
	.dbfunc e SPI_Write_Buf _SPI_Write_Buf fc
;         status -> R20
;       byte_ctr -> R22
;          bytes -> R10
;           pBuf -> R12,R13
;            reg -> R20
	.even
_SPI_Write_Buf::
	rcall push_gset4
	movw R12,R18
	mov R20,R16
	ldd R10,y+8
	.dbline -1
	.dbline 352
; }
; /**************************************************
; Function: SPI_Write_Buf();
; 
; Description:
;   Writes contents of buffer '*pBuf' to nRF24L01
;   Typically used to write TX payload, Rx/Tx address */
; /**************************************************/
; unsigned char SPI_Write_Buf(unsigned char reg, unsigned char *pBuf, unsigned char bytes)
; {
	.dbline 354
; 	unsigned char status,byte_ctr;
; 	nRF24L01_CSNL;                   		// Set nRF24L01_CSN low, init SPI tranaction
	cbi 0xb,6
	.dbline 355
;   	delay();
	rcall _delay
	.dbline 356
; 	status = SPI_RW(reg);    					// Select register to write to and read status byte
	mov R16,R20
	rcall _SPI_RW
	mov R20,R16
	.dbline 357
;   	for(byte_ctr=0; byte_ctr<bytes; byte_ctr++) // then write all byte in buffer(*pBuf)
	clr R22
	rjmp L53
L50:
	.dbline 358
	movw R30,R12
	ld R16,Z+
	movw R12,R30
	rcall _SPI_RW
	mov R20,R16
L51:
	.dbline 357
	inc R22
L53:
	.dbline 357
	cp R22,R10
	brlo L50
	.dbline 359
;     	status = SPI_RW(*pBuf++);            
; 	nRF24L01_CSNH; 								// Set nRF24L01_CSN high again
	sbi 0xb,6
	.dbline 360
; 	delay();
	rcall _delay
	.dbline 361
;   	return(status);          					// return nRF24L01 status byte
	mov R16,R20
	.dbline -2
L49:
	rcall pop_gset4
	.dbline 0 ; func end
	ret
	.dbsym r status 20 c
	.dbsym r byte_ctr 22 c
	.dbsym r bytes 10 c
	.dbsym r pBuf 12 pc
	.dbsym r reg 20 c
	.dbend
	.dbfunc e RX_Mode _RX_Mode fV
	.even
_RX_Mode::
	sbiw R28,1
	.dbline -1
	.dbline 374
; }
; /**************************************************
; Function: RX_Mode();
; 
; Description:
;   This function initializes one nRF24L01 device to
;   RX Mode, set RX address, writes RX payload width,
;   select RF channel, datarate & LNA HCURR.
;   After init, CE is toggled high, which means that
;   this device is now ready to receive a datapacket. */
; /**************************************************/
; void RX_Mode(void)
; {
	.dbline 375
; 	nRF24L01_CEL;
	cbi 0xb,5
	.dbline 376
; 	delay();
	rcall _delay
	.dbline 377
;   	SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, TX_ADDRESS, TX_ADR_WIDTH); // Use the same address on the RX device as the TX device
	ldi R24,5
	std y+0,R24
	ldi R18,<_TX_ADDRESS
	ldi R19,>_TX_ADDRESS
	ldi R16,42
	rcall _SPI_Write_Buf
	.dbline 379
; 
;   	SPI_RW_Reg(WRITE_REG + EN_AA, 0x01);      // Enable Auto.Ack:Pipe0
	ldi R18,1
	ldi R16,33
	rcall _SPI_RW_Reg
	.dbline 380
;   	SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01);  // Enable Pipe0
	ldi R18,1
	ldi R16,34
	rcall _SPI_RW_Reg
	.dbline 381
;   	SPI_RW_Reg(WRITE_REG + RF_CH, 40);        // Select RF channel 40
	ldi R18,40
	ldi R16,37
	rcall _SPI_RW_Reg
	.dbline 382
;   	SPI_RW_Reg(WRITE_REG + RX_PW_P0, TX_PLOAD_WIDTH); // Select same RX payload width as TX Payload width
	ldi R18,20
	ldi R16,49
	rcall _SPI_RW_Reg
	.dbline 383
;   	SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07);   // TX_PWR:0dBm, Datarate:2Mbps, LNA:HCURR
	ldi R18,7
	ldi R16,38
	rcall _SPI_RW_Reg
	.dbline 384
;   	SPI_RW_Reg(WRITE_REG + CONFIG, 0x0f);     // Set PWR_UP bit, enable CRC(2 bytes) & Prim:RX. RX_DR enabled..
	ldi R18,15
	ldi R16,32
	rcall _SPI_RW_Reg
	.dbline 385
;   	nRF24L01_CEH;
	sbi 0xb,5
	.dbline 386
; 	delay();
	rcall _delay
	.dbline -2
L54:
	adiw R28,1
	.dbline 0 ; func end
	ret
	.dbend
	.dbfunc e TX_Mode _TX_Mode fV
	.even
_TX_Mode::
	sbiw R28,1
	.dbline -1
	.dbline 406
; 	//  This device is now ready to receive one packet of 16 bytes payload from a TX device sending to address
;   //  '3443101001', with auto acknowledgment, retransmit count of 10, RF channel 40 and datarate = 2Mbps.
; 
; }
; /**************************************************/
; 
; /**************************************************
; Function: TX_Mode();
; 
; Description:
;   This function initializes one nRF24L01 device to
;   TX mode, set TX address, set RX address for auto.ack,
;   fill TX payload, select RF channel, datarate & TX pwr.
;   PWR_UP is set, CRC(2 bytes) is enabled, & PRIM:TX.
; 
;   ToDo: One high pulse(>10us) on CE will now send this
;   packet and expext an acknowledgment from the RX device. */
; /**************************************************/
; void TX_Mode(void)
; {
	.dbline 407
; 	nRF24L01_CEL;
	cbi 0xb,5
	.dbline 408
; 	delay();
	rcall _delay
	.dbline 409
;   	SPI_Write_Buf(WRITE_REG + TX_ADDR, TX_ADDRESS, TX_ADR_WIDTH);    // Writes TX_Address to nRF24L01
	ldi R24,5
	std y+0,R24
	ldi R18,<_TX_ADDRESS
	ldi R19,>_TX_ADDRESS
	ldi R16,48
	rcall _SPI_Write_Buf
	.dbline 410
;   	SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, TX_ADDRESS, TX_ADR_WIDTH); // RX_Addr0 same as TX_Adr for Auto.Ack
	ldi R24,5
	std y+0,R24
	ldi R18,<_TX_ADDRESS
	ldi R19,>_TX_ADDRESS
	ldi R16,42
	rcall _SPI_Write_Buf
	.dbline 411
;   	SPI_Write_Buf(WR_TX_PLOAD, Buffer, TX_PLOAD_WIDTH); // Writes data to TX payload
	ldi R24,20
	std y+0,R24
	ldi R18,<_Buffer
	ldi R19,>_Buffer
	ldi R16,160
	rcall _SPI_Write_Buf
	.dbline 413
; 
;   	SPI_RW_Reg(WRITE_REG + EN_AA, 0x01);      // Enable Auto.Ack:Pipe0
	ldi R18,1
	ldi R16,33
	rcall _SPI_RW_Reg
	.dbline 414
;   	SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01);  // Enable Pipe0
	ldi R18,1
	ldi R16,34
	rcall _SPI_RW_Reg
	.dbline 415
;   	SPI_RW_Reg(WRITE_REG + SETUP_RETR, 0x1a); // 500us + 86us, 10 retrans...
	ldi R18,26
	ldi R16,36
	rcall _SPI_RW_Reg
	.dbline 416
;   	SPI_RW_Reg(WRITE_REG + RF_CH, 40);        // Select RF channel 40
	ldi R18,40
	ldi R16,37
	rcall _SPI_RW_Reg
	.dbline 417
;   	SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07);   // TX_PWR:0dBm, Datarate:2Mbps, LNA:HCURR
	ldi R18,7
	ldi R16,38
	rcall _SPI_RW_Reg
	.dbline 418
;   	SPI_RW_Reg(WRITE_REG + CONFIG, 0x0e);     // Set PWR_UP bit, enable CRC(2 bytes) & Prim:TX. MAX_RT & TX_DS enabled..
	ldi R18,14
	ldi R16,32
	rcall _SPI_RW_Reg
	.dbline 419
; 	nRF24L01_CEH;
	sbi 0xb,5
	.dbline 420
; 	delay();
	rcall _delay
	.dbline -2
L55:
	adiw R28,1
	.dbline 0 ; func end
	ret
	.dbend
	.dbfunc e timer0_init _timer0_init fV
	.even
_timer0_init::
	.dbline -1
	.dbline 425
; 	
; }
; //------------------------------------------------------
; void timer0_init(void)
; {
	.dbline 426
;  TCCR0B = 0x00; //stop
	clr R2
	out 0x25,R2
	.dbline 427
;  TCNT0 = 0x06; //set count
	ldi R24,6
	out 0x26,R24
	.dbline 428
;  TCCR0A = 0x00; 
	out 0x24,R2
	.dbline 429
;  TCCR0B = 0x02; //start timer
	ldi R24,2
	out 0x25,R24
	.dbline -2
L56:
	.dbline 0 ; func end
	ret
	.dbend
	.area vector(rom, abs)
	.org 32
	rjmp _timer0_ovf_isr
	.area text(rom, con, rel)
	.dbfile E:\項目\PS2無~1\progamme\acceptavrnrf24l01\acceptavrnrf24l01\main.c
	.dbfunc e timer0_ovf_isr _timer0_ovf_isr fV
	.even
_timer0_ovf_isr::
	st -y,R2
	st -y,R24
	in R2,0x3f
	st -y,R2
	.dbline -1
	.dbline 433
	.dbline 435
	ldi R24,6
	out 0x26,R24
	.dbline 437
	lds R24,_t20ms
	subi R24,1
	mov R2,R24
	sts _t20ms,R2
	tst R24
	brne L58
	.dbline 438
	.dbline 439
	.dbline 439
	lds R24,_flag
	ori R24,1
	sts _flag,R24
	.dbline 439
	.dbline 439
	.dbline 440
	ldi R24,80
	sts _t20ms,R24
	.dbline 442
	nop
	.dbline 449
L58:
	.dbline -2
L57:
	ld R2,y+
	out 0x3f,R2
	ld R24,y+
	ld R2,y+
	.dbline 0 ; func end
	reti
	.dbend
	.area bss(ram, con, rel)
	.dbfile E:\項目\PS2無~1\progamme\acceptavrnrf24l01\acceptavrnrf24l01\main.c
_key6_time::
	.blkb 1
	.dbsym e key6_time _key6_time c
_key5_time::
	.blkb 1
	.dbsym e key5_time _key5_time c
_key4_time::
	.blkb 1
	.dbsym e key4_time _key4_time c
_key3_time::
	.blkb 1
	.dbsym e key3_time _key3_time c
_key2_time::
	.blkb 1
	.dbsym e key2_time _key2_time c
_key1_time::
	.blkb 1
	.dbsym e key1_time _key1_time c
_key6_flag::
	.blkb 1
	.dbsym e key6_flag _key6_flag c
_key5_flag::
	.blkb 1
	.dbsym e key5_flag _key5_flag c
_key4_flag::
	.blkb 1
	.dbsym e key4_flag _key4_flag c
_key3_flag::
	.blkb 1
	.dbsym e key3_flag _key3_flag c
_key2_flag::
	.blkb 1
	.dbsym e key2_flag _key2_flag c
_key1_flag::
	.blkb 1
	.dbsym e key1_flag _key1_flag c
_key6_pulse::
	.blkb 1
	.dbsym e key6_pulse _key6_pulse c
_key5_pulse::
	.blkb 1
	.dbsym e key5_pulse _key5_pulse c
_key4_pulse::
	.blkb 1
	.dbsym e key4_pulse _key4_pulse c
_key3_pulse::
	.blkb 1
	.dbsym e key3_pulse _key3_pulse c
_key2_pulse::
	.blkb 1
	.dbsym e key2_pulse _key2_pulse c
_key1_pulse::
	.blkb 1
	.dbsym e key1_pulse _key1_pulse c
_flag::
	.blkb 1
	.dbsym e flag _flag c
_t20ms::
	.blkb 1
	.dbsym e t20ms _t20ms c
_key_debug::
	.blkb 1
	.dbsym e key_debug _key_debug c