?? int.s
字號:
;* OUTPUTS
;*
;* None
;*
;* HISTORY
;*
;* NAME DATE REMARKS
;*
;* W. Lamie 08-27-1994 Created initial version 1.0
;* D. Lamie 08-27-1994 Verified version 1.0
;*
;************************************************************************
;VOID INT_Initialize(void)
;{
.def _c_int00
_c_int00
.def _INT_Initialize
_INT_Initialize:
; Insure that the processor is in supervisor mode.
MRS r0,CPSR ; Pickup current CPSR
BIC r0,r0,#MODE_MASK ; Clear the mode bits
ORR r0,r0,#SUP_MODE ; Set the supervisor mode bits
ORR r0,r0,#LOCKOUT ; Insure IRQ/FIQ interrupts are
; locked out
MSR CPSR,r0 ; Setup the new CPSR
; Clear the un-initialized global and static C data areas.
LDR r0,BSS_Start ; Pickup the start of the BSS area
MOV r2,#0 ; Clear value in r2
LDR r1,BSS_End ; Pickup the end of the BSS area
INT_BSS_Clear_Loop
STR r2,[r0],#4 ; Clear a word
INT_BSS_Clear_Check
CMP r0,r1 ; Are the start and end equal?
BNE INT_BSS_Clear_Loop ; If so, continue with BSS clear
; Perform auto-initialization. if cinit is -1, then there is none.
LDR r0, c_cinit
CMN r0, #1
BLNE _auto_init
; Turn-on the I-Cache for the TI 925T Processor
MRC p15,#0,r1,C1,C0,#0 ; Read the control register.
ORR r1,r1,#0x1000 ; Set the I bit to enable Instruction Cache
NOP
MCR p15,#0,r1,C1,C0,#0 ; Write the control register.
; Setup the vectors loaded flag to indicate to other routines in the
; system whether or not all of the default vectors have been loaded.
; If INT_Loaded_Flag is 1, all of the default vectors have been loaded.
; Otherwise, if INT_Loaded_Flag is 0, registering an LISR cause the
; default vector to be loaded. In the ARM60 this variable is always
; set to 1. All vectors must be setup by this function.
; INT_Loaded_Flag = 0;
MOV r0,#1 ; All vectors are assumed loaded
LDR r1,Loaded_Flag ; Build address of loaded flag
STR r0,[r1,#0] ; Initialize loaded flag
; Initialize the system stack pointers. This is done after the BSS is
; clear because the TCD_System_Stack pointer is a BSS variable! It is
; assumed that available memory starts immediately after the end of the
; BSS section.
LDR r10,System_Stk_Limit ; Pickup the system stack limit (bottom of system stack)
LDR r3,System_Limit ; Pickup sys stack limit addr
STR r10,[r3, #0] ; Save stack limit
LDR sp,System_Stack_SP ; Set-up the system stack pointer
LDR r3,System_Stack ; Pickup system stack address
STR sp,[r3, #0] ; Save stack pointer
MRS r0,CPSR ; Pickup current CPSR
BIC r0,r0,#MODE_MASK ; Clear the mode bits
ORR r0,r0,#IRQ_MODE ; Set the IRQ mode bits
MSR CPSR,r0 ; Move to IRQ mode
LDR sp,IRQ_Stack_SP ; Setup IRQ stack pointer
MRS r0,CPSR ; Pickup current CPSR
BIC r0,r0,#MODE_MASK ; Clear the mode bits
ORR r0,r0,#FIQ_MODE ; Set the FIQ mode bits
MSR CPSR,r0 ; Move to the FIQ mode
LDR sp,FIQ_Stack_SP ; Setup FIQ stack pointer
MRS r0,CPSR ; Pickup current CPSR
BIC r0,r0,#MODE_MASK ; Clear mode bits
ORR r0,r0,#SUP_MODE ; Set the supervisor mode bits
MSR CPSR,r0 ; All interrupt stacks are setup,
; return to supervisor mode
; Define the global data structures that need to be initialized by this
; routine. These structures are used to define the system timer
; management HISR.
; TMD_HISR_Stack_Ptr = (VOID *) r2;
; TMD_HISR_Stack_Size = TIMER_SIZE;
; TMD_HISR_Priority = TIMER_PRIORITY;
LDR r2,HISR_Stack_Mem ; Get HISR stack memory address
LDR r3,HISR_Stack_Ptr ; Pickup variable's address
STR r2,[r3, #0] ; Setup timer HISR stack pointer
MOV r1,#HISR_STACK_SIZE ; Pickup the timer HISR stack size
LDR r3,HISR_Stack_Size ; Pickup variable's address
STR r1,[r3, #0] ; Setup timer HISR stack size
MOV r1,#HISR_PRIORITY ; Pickup timer HISR priority (0-2)
LDR r3,HISR_Priority ; Pickup variable's address
STR r1,[r3, #0] ; Setup timer HISR priority
; Make a call to begin all board specific initialization.
; Begin with Initializing the Vector table and replacing
; default interrupts with Plus IRQs. Then setup the timer
; and begin the system clock.
.if $$isdefed("NU_ROM_SUPPORT")
BL _INT_Timer_Initialize ; Initialize the timer
.else
BL INT_Install_Vector_Table ; Install the vector table
BL _INT_Timer_Initialize ; Initialize the timer
.endif
; Call INC_Initialize with a pointer to the first available memory
; address after the compiler's global data. This memory may be used
; by the application.
; INC_Initialize(first_available_memory);
LDR r0,First_Avail_Mem ; Get address of first available memory
B _INC_Initialize ; to high-level initialization
;}
;************************************************************************
;*
;* FUNCTION
;*
;* INT_Vectors_Loaded
;*
;* DESCRIPTION
;*
;* This function returns the flag that indicates whether or not
;* all the default vectors have been loaded. If it is false,
;* each LISR register also loads the ISR shell into the actual
;* vector table.
;*
;*
;* Major Revision:
;*
;* M. Kyle Craig, Accelerated Technology, Inc.
;*
;*
;*
;* CALLED BY
;*
;* TCC_Register_LISR Register LISR for vector
;*
;* CALLS
;*
;* None
;*
;* INPUTS
;*
;* None
;*
;* OUTPUTS
;*
;* None
;*
;* HISTORY
;*
;* NAME DATE REMARKS
;*
;* W. Lamie 08-27-1994 Created initial version 1.0
;* D. Lamie 08-27-1994 Verified version 1.0
;*
;************************************************************************
;INT INT_Vectors_Loaded(void)
;{
.def $INT_Vectors_Loaded
$INT_Vectors_Loaded ; Dual-state interworking veneer
.state16
BX pc
NOP
.state32
B _INT_Vectors_Loaded
.def _INT_Vectors_Loaded
_INT_Vectors_Loaded
; Just return the loaded vectors flag.
; return(INT_Loaded_Flag);
LDR r0,Loaded_Flag ; Get the address
LDR r0,[r0,#0] ; Load current value
BX lr ; Return to caller
;}
;************************************************************************
;*
;* FUNCTION
;*
;* INT_Setup_Vector
;*
;* DESCRIPTION
;*
;* This function sets up the specified vector with the new vector
;* value. The previous vector value is returned to the caller.
;*
;*
;* Major Revision:
;*
;* M. Kyle Craig, Accelerated Technology, Inc.
;*
;*
;*
;* CALLED BY
;*
;* Application
;* TCC_Register_LISR Register LISR for vector
;*
;* CALLS
;*
;* None
;*
;* INPUTS
;*
;* vector Vector number to setup
;* new Pointer to new assembly
;* language ISR
;*
;* OUTPUTS
;*
;* old vector contents
;*
;* HISTORY
;*
;* NAME DATE REMARKS
;*
;* W. Lamie 08-27-1994 Created initial version 1.0
;* D. Lamie 08-27-1994 Verified version 1.0
;*
;************************************************************************
;VOID *INT_Setup_Vector(INT vector, VOID *new)
;{
.def $INT_Setup_Vector
$INT_Setup_Vector ; Dual-state interworking veneer
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