'\" t
.so wrs.an
.\" wrSbcArm7/target.nr - SBCARM7 target specific documentation
.\"
.\" Copyright 1984-2000 Wind River Systems, Inc.
.\"
.\" modification history
.\" --------------------
.\" 02a,27aug01,dgp  change manual pages to reference entries per SPR 23698
.\" 01a,11apr01,g_l  baseline version
.\"
.\"
.TH wrSbcArm7 T "Wind River SBCARM7 single board computer, ARM7tdmi" "Rev: 10 Oct 01" "TORNADO REFERENCE: VXWORKS"

.SH "NAME"
.aX "Wind River SBCARM7 single board computer, ARM7tdmi"

.SH "INTRODUCTION"

This reference entry provides board-specific information necessary to run
VxWorks for the wrSbcArm7 BSP.  Before running VxWorks, verify that the 
board runs in the factory configuration using the Wind River visionWARE supplied
on the board flash.

.SS "Samsung S3C4510X01 Device"

This BSP is designed around the capabilities of the S3C4510X01 Samsung chip.

Note that there is an inconsistency in the Samsung part numbering scheme.  
Some documents refer to this Samsung chip as part number KS32C50100.  This 
document refers to the chip as the S3C4510X01 which is the current part 
number for this device.  Both numbers refer to the same device.

.SS "Little-Endian Byte Order"

If the BSP is to be used in little-endian byte order mode, set the
'Configuration' DIP switch 'S5-6' to the 'closed' position.  Boot ROM
and VxWorks images built from either of the following directories may
be used: 'wrSbcArm7' or 'wrSbcArm7_t'.  Make sure the switch is
'fully' in its closed position.

For correct operation, both the boot ROM image, which resides in
flash, and the VxWorks image, which is downloaded, must be compiled for
little-endian mode.

.SS "Big-Endian Byte Order"

If the BSP is to be used in big-endian byte order mode, set the
'Configuration' DIP switch 'S5-6' to the 'open' position.  Boot ROM
and VxWorks images built from either of the following directories may
be used: 'wrSbcArm7_be' or 'wrSbcArm7_tbe'.  Make sure the switch is
'fully' in its closed position.

For correct operation, both the boot ROM image, which resides in flash,
and the VxWorks image, which is downloaded, must be compiled for
big-endian mode.

If the board is booted in big-endian mode, a '(BE)' is displayed on
the LCD screen.

.SS "Thumb mode"

No special DIP-switch settings are necessary to use this BSP in 16-bit
thumb mode.  Boot ROM and VxWorks images built from either of the
following directories run the CPU in thumb mode: 'wrSbcArm7_t' or
'wrSbcArm7_tbe'.  The other two wrSbcArm7 related directories
operate the CPU in the more commonly used 32-bit ARM mode.

Although the operating system appears to function correctly when the
boot ROM thumb/ARM mode does not match the VxWorks thumb/ARM mode, this
configuration has not been thoroughly tested and is not supported by
Wind River.  It is recommended that if VxWorks is built in thumb
mode, then the boot ROM in flash should also be built in thumb mode.
Similarly, if one image is built in ARM mode, the other image
should also be built in ARM mode.

If the board is booted with a thumb image, lower case '(t)' is
displayed on the LCD screen.  If the board is running in big-endian
and thumb mode then the label is '(tBE)'.

.SS "BOOT ROMS"

The boot ROM images, 'bootrom_uncmp.bin' and 'bootrom.bin', are provided 
with this BSP. The boot ROM is configured to be placed in memory at a ROM 
base address of 0x0.  This BSP is configured to work in little-endian mode 
and to use the 2 MB on-board flash ROM, the Samsung S3C4510X01 100\10BaseT
Ethernet as the default boot device, and the Samsung S3C4510X01 UART as 
the console device.

.SS "Programming the Boot ROM Images to the SBCARM7 Flash"

To program the boot ROMs, first install the visionPROBE II or visionICE II 
and power it on.  Connect the visionPROBE II or visionICE II JTAG interface 
cable to the SBCARM7 board JTAG connector (JP2, the JTAG port) at the top 
edge of the board next to the LCD display.

Once all of the connections have been made, power up the SBCARM7 board
and start the visionCLICK executable on the host.

.IP "Configuring the visionCLICK Project"

At this point, the 'Welcome To visionCLICK' window appears.  In this 
window, click the 'Configure' button, this invokes the 'PROJECTS/LOAD' 
window. In this window, click the '+' left to 
'ARM7TDMI_C_Demo_LE_GNU_0x01000000.prj', this shows the project 
configuration.  Use the mouse to select the 'Microprocessors' option and 
right-click, select the following type of CPU: 'ARM->ARM7->ARM7TDMI'.  Now 
verify that the 'Target Control' option points to 'visionPROBE' for 
visionPROBE I/II or 'visionICE' for visionICE I/II. Also, select the 
'Communications' tab and verify that the 'Normal Port/Rate' and 
'Download Port/Rate' settings are correct for your connection, for example: 
'LPT1' for visionPROBE II. Now click the 'Save' button at the bottom of 
the window and then click the 'Activate' button.

.IP "Programming visionPROBE II / visionICE II with the Proper Register Setting"

Go to the 'Tools' menu and select the 'Log Output/Playback Scripts' option, 
the 'Record / Playback' dialog box appears. In this dialog box, go to the 
'Playback Commands From File' group and click the 'Browse' button.  
Navigate to the location of the register file that matches your board, for 
example: 'samsungKS32c_RamAt0.reg' for the SBCARM7 board with the Samsung 
S3C4510X01 50Mhz.  After choosing the register file, click the 'Open' 
button to confirm the selected register file. This returns you to the 
'Record / Playback' dialog box.  Now click the 'Start' button located in 
the same group.  In the 'Terminal' window, visionCLICK is running the 
script.  When visionCLICK finishes the playback, the '>BKM>' or the '>ERR>' 
prompt will appear.
   
Note that you should select a proper register file that correctly
represents the endian byte order of the board switch settings.
Usually, the endian is configured in the first few lines of the
register file.  If your board is little-endian byte order, the
configuration line must read:

.CS
   "CF LENDIAN   YES"
.CE

If your board is big-endian byte order, the configuration line must be
set to the following:

.CS
   "CF LENDIAN   NO"
.CE


.IP "Getting into Background Mode"
 
Execute the 'IN' command to reset the board and initialize it with the 
register setting.
.LP
.CS
   	IN
.CE
.IP " "
This command is the reset command to initialize the board. After you get 
the '>BKM>' prompt continue with the instructions in the next section.

.IP "Converting 'bootrom' or 'bootrom_uncmp' and other rom images"

To convert 'bootrom' or 'bootrom_uncmp' to 'bootrom.bin' or 
'bootrom_uncmp.bin', complete the following steps:

1)
In the 'Tools' menu, choose 'Convert Object Modules'.
	
2)
The 'CONVERT BINARY AND SYMBOL OBJs' dialog appears.

Specify the file to convert by browsing for or typing in the path to a
file in the field labeled 'Select Input Object Module To Convert'.
For example, you might enter 'd:\tornado\target\config\wrSbcArm7\bootrom'.
 
Check the 'Create Flat BIN File For Flash Programming' box only
(unless you also want to create debug files as well).

In the field labeled 'In Range Of 0x', enter one of the following numbers:


.TS
expand;
1 1 .
File | Number  
_
'bootrom' | 6000
'bootrom_uncmp' | 480000 
'vxWorks.res_rom' | 1000000 
.TE
             

In the 'To 0x' edit box, enter a large enough number such as the following:

.TS
expand;
1 1 .
File | Number  
_
'bootrom' | FFFFFFFF
'bootrom_uncmp' | FFFFFFFF
'vxWorks.res_rom' | FFFFFFFF
.TE

Note that the user may choose to check multiple boxes at the same
time to generate multiple output file types.  The symbol file
and RAM download files are useful for debugging scenarios not
discussed in this example covering flash download.

3) 
In the 'Miscellaneous Parameters' edit box, enter the following extra 
parameters:	
.LP
.CS	
	-w -t arm -g
.CE
.IP " "
Make sure you have at least one space between each parameter.

4) 
After configuring the 'convert' dialog box, click the 'Convert' button.  
A DOS window appears and asks you to press any key. Pressing any key 
will close this window and finish the convert utility work.

Do not click the 'OK' button until after you have converted the image.  
The 'OK' button simply closes the dialog box.

5) 
Now click the 'OK' button to close the dialog box and continue with the 
next step, 'Programming the SBCARM7 Flash'.
.LP
		
.IP "Programming the SBCARM7 Flash"

In visionCLICK, select 'Program Flash Devices' from the Tools pull-down 
menu, this invokes the 'TF FLASH PROGRAMMING' window. If you are not using 
visionCLICK, you can also invoke this window using the 
'visionICE Utilities Panel'.  Complete the following steps:

1) 
In the 'Flash Card or PC Host File Name and Path' group, enter the full 
path to the location of the 'bootrom_uncmp.bin' or the 'bootrom.bin' file 
in the edit box.  You can also use the 'Select' button to browse for the 
file location.

2) 
In the 'Flash Card or PC Host File Name and Path' group, click the 
'Select' button. The 'CHOOSE A FILE FROM HOST PC' dialog box appears.  Go 
to the '+/- Bias' group and enter the number that corresponds to your 
boot ROM file:
       
.TS
expand;
1 1 .
File | Number  
_
'bootrom.bin' | -6000
'bootrom_uncmp.bin' | -480000 
'vxWorks.bin (res_rom)' | -1000000 
or
'bootrom.bin' | FFA000
'bootrom_uncmp.bin' | B80000
'vxWorks.bin (res_rom)' | 0

.TE
       
Click the 'OK' button to continue.

The negative numbers above assume flash has been initialized to 0x0.
The positive numbers assume flash has been initialized to 0x1000000.
This forces the image that was built to start at 0x6000 or 0x480000 to be 
programmed at the beginning of flash (that is, 0x6000-0x6000=0x0 or
0x6000+FFA000=0x1000000).

If you are unsure about where flash begins, reset the target, then try
to write to memory at either 0x0 or 0x1000000 using the visionProbe
connected to the visionClick debugger.  If the write fails, this is
probably the initialized location of flash.  If you do not reset the
target before doing this and cache is enabled, you may be able to
modify a FLASH address temporarily if it has been cached.

3) 
In the 'Programming Algorithm' group, click the 'Select' button and select 
the following flash device:

For the 2 MB on-board flash : 'AMD 29F800T ( 512 x 16 ) 2 Devices'

4)
Set the proper address of the flash to 0 (or 01000000) and check
the 'Erase to 0x' radio button.  Set the upper limit of flash to 6ffff
(or 106ffff).  Set the 'Available RAM Workspace Start Address' setting
to 01000000 (or 00000000) and the 'Bytes Of Target RAM Required' to
around 60000 (this precise number is not important here).

Note: limiting the region of flash to be erased ensures that NVRAM is
not erased.  If the 'Erase All' button is pressed, then NVRAM will be
erased.

The 'RAM Workspace' is scratch memory in RAM used by the visionPROBE flash
programming algorithm.

5) 
Click the 'Erase and Program' button.
.LP