16 | Ethernet controller BDMA Tx Interrupt
17 | Ethernet controller BDMA Rx Interrupt
18 | Ethernet controller MAC Tx Interrupt
19 | Ethernet controller MAC Rx Interrupt
20 | IIC -Bus Interrupt
.TE

.SS "Ethernet Port"

The BSP configures itself to use the KS32C50100 Ethernet Controller as its 
Ethernet port.  The name `sng' should be specified as the boot device
to the boot ROMs when booting VxWorks via Ethernet. This BSP is 
configured to use an END-style network driver.

.SS " NVRAM Support" 

The booting parameters (otherwise known as the boot line) are automatically 
saved in NVRAM after the user configures startup information the first 
time the boot ROM is executed.  This allows unattended booting during 
future power off/on cycles.

.SS "Changing the Ethernet Address"

The SBCARM7 boards do not have unique Ethernet hardware addresses. If
the boards are to be connected to a network, unique hardware addresses
must be provided.  Thus, the user must provide a suitable 6-byte
Ethernet address for each board used on a network.  If the board uses
a 'bootrom' type image and not 'visionWare' image to boot, the default
Ethernet address is specified in the 'wrSbcArm7.h' file in the
following line:

.CS
    #define ETHERNET_MAC_ADRS { 0x00,  0xA0,  0x88, 0x88, 0x88, 0x00 }
.CE

This address is modified during initialization by DIP-switch settings
on the 'user switches', 'S4'.  The least significant byte (the 6th byte
using network order) takes on the 8-bit value of 'S4' where any 'open'
position becomes a binary '0' and any 'closed' position becomes a
binary '1'.

To change any other byte of the MAC address, the ETHERNET_MAC_ADRS
macro must be modified, a new boot ROM must be built and burned into
flash, and a new VxWorks image must be built.

Check with your system administrator to ensure that you have a unique
MAC address for your site.

.SS "CPU Speed"

Two types of clock inputs are used on the board.  The first, main
clock, is a 50 MHz 1:1 Oscillator plugged into the UX1 socket to drive
the CPU clock at 50 MHz.  The second is a 16 MHz 1:1 Oscillator used for
the HDLC channel that is plugged into the UX4 socket.  By default the
UX3 and UX2 sockets are empty.  These sockets are used for the CAN bus
Oscillator.

.SS "Serial Configuration"

SMC1 is configured as a UART device with 8 data bits, 1 stop bit,
hardware handshaking, and parity disabled.

.SS "Serial Connections"

COM1 and COM2 may be connected via a simple 3 wire connection using
standard phone jacks. 

   pin 1 = RIN
   pin 2 = TOUT
   pin 3 = NC
   pin 4 = GND

Alternatively, COM1 may be connected through a standard male DB9
connector.

.SS "Network Configuration"

The Ethernet is configured as a 100\10 Mb/s Ethernet port

.SS "ROM Considerations"

Go to the 'Build' menu in Tornado II and choose 'Build Boot Rom...'.
In the dialog box, choose 'wrSbcArm7' on the left side and 'bootrom' on
the right side.  Use the visionPROBE II or visionICE II to convert the
'bootrom' image to a 'bootrom.bin' image and to program the flash.  Make
sure the file is loaded into flash at the starting address 0x0.

.SS "Delivered Objects"

Does not apply.

.SS "Make Targets"

Only 'bootrom_uncmp', 'bootrom', and 'vxWorks' have been tested.

.SS "Unix Distribution"

At the current time, Wind River only supplies a PC version of this BSP.

.SH "SPECIAL CONSIDERATIONS"

This section describes miscellaneous information about this BSP.

.SS "Known Problems"

The following items are known problems for this release: 
.IP " " 
There appears to be a hardware bug in the Samsung KS32C50100.  The
instruction 'LDR rx, [ry]' will cause a 'data abort' to occur when
'ry' is not aligned on a word boundary.  According to the
specifications, neither a 'data abort', nor any other exception, should occur 
if the memory referenced by 'ry' is in a legal range, regardless of 
alignment.
.LP
.IP " "
As a consequence of this bug, the standard checksum function used in
other ARMARCH4 processors will fail.  The file sbcCksum.c is provided
in the 'wrSbcArm7' BSP directory as a workaround to this problem.
.LP

.SH "BOARD LAYOUT"

The diagrams below show the relevant jumpers for VxWorks configuration.

Note: When changing any DIP switches, make sure the switch is left
fully in the 'on' position or in the 'off' position.  If a switch is
left at an intermediate state, the results are unpredictable.

.bS
     ____   ____
   _|JP25|_|JP26|______________________________________________________________
  | |____| |____| |JP3 | |JP2 | |                                              |
 ---               ----   ----  |                                              |
|   |   ---           ___       |                   LCD                        |
|   |  |SW2|         |   |      |                                              |
|P1 |   ---          |   |      |                                              |
|   |  ________      |96 |      |______________________________________________|
|   |  |||||||||D5   |   |      __  ___________                                |
|___|  --------      |PIN|     |  ||    J3     |                               |
  |     --------     |   |     |J2||___________|       -- JP4                  |
  |    |   S4   |    |DIN|     |  | ___________    ___                      ___|
 ---    --------     |   |     |  ||        ARM|  |UX1|                    |JP |
|   |   ___   ___    |Exp|     |__||SAMSUNG    |  |___|                    |22 |
|   |  |SW3| |UX3|   |   |      __ |S3C4510X01 |   ___________             |___|
|P2 |  |___| |___|   |   |     |  ||           |  |     S3    |                |
|   |    ___         |JP |     |J4||___________|  |___________|                |
|   |   |UX4|        |18 |     |  |             _  ___________              ___|
|___|   |___|        |___|     |  |JP17    JP14|S||     S5    |            |   |
  |    ___                     |__|||| ||| ||| |W||___________|            |JP1|
  |   |UX2|                            JP16    |1|                         |___|
 ---  |___|                                    |_|                             |
|   |                                                         Wind River H.S.I |
|COM|                JP12                                         SBC ARM7     |
| 1 |                |||||                        JP5                          |
|___|           JP11       JP23     JP24          ||||                         |
  |             |||||      ||||     ||||                              __       |
  |     ____    ____      ____   ____    ____      S2  __   __   __  |  |      |
  |____|COM1|__|COM2|____|CAN1|_|CAN2|__|Ethe|_____||_|D4|_|D3|_|D2|_|S1|______|
       |____|  |____|    |____| |____|  |____|     || |__| |__| |__| |__|
   
.bE

Key:

.TS
expand;
1 1 .
SW1 - Ethernet Configuration Switch Box
_
SW1-1 | TXSLEW0 
SW1-2 | TXSLEW1
SW1-3 | The LXT972 advertises pause capabilities.
SW1-4 | The LXT972 is in PWRDWN mode.
SW1-5 | The MDIO is disabled.
SW1-6 | ON Sets the device address (ON=LOW), (OFF=HIGH)
.TE

.TS
expand;
1 1 .
SW2 - RS232 / RS485 Select
_
SW2-1 | HDLC Port A, When on, the nRTSA controls the RS485 transmit enable.
SW2-2 | HDLC Port A, When on, the CPU port pin P5 controls the RS485 transmit enable.
SW2-3 | HDLC Port B, When on, the nRTSB controls the RS485 transmit enable
SW2-4 | HDLC Port B, When on, the CPU Port pin P6 controls the RS485 transmit enable.
SW2-5 | HDLC Port A, Signal SELA ON for the RS232 drivers and OFF for the RS485 drivers.
SW2-6 | HDLC Port B, Signal SELB ON for the RS232 drivers and OFF for the RS485 drivers.
.TE

.TS
expand;
1 1 .
SW3 - Switch Descriptions
_
SW3-1 | When on, the incoming receive clock is used as HDLC Port A (RXCA)
SW3-2 | When on, the external oscillator UX3 is used as RXCA
SW3-3 | When on, the external oscillator UX3 is used as a transmit clock on  
      | HDLC Port A (TXCA)
SW3-4 | When on, the external oscillator UX3 is used as the receive clock on
      | HDLC Port B (RXCB)
SW3-5 | When on, external oscillator UX3 is used as a transmit clock on HDLC
      | Port B (TXCB)
SW3-6 | When on, the incoming receive clock is used as HDLC Port B (RXCB).
.TE

.TS
expand;
1 1 .
S3 - Chip Select Isolation Switch Box
_
S3-1 | nECS1 User I/O, 8 Switch Bank, 8 LEDs, LCD Display
S3-2 | nECS2 CAN 1 Controller IC
S3-3 | nECS3 CAN2 Controller IC
S3-4 | nRCS1 Mailbox Connector
S3-5 | nRCS0 2 MB Boot Flash
S3-6 | nRCS0 16 MB Boot Flash
S3-7 | nRCS2 8 Kb x 8 EEPROM
S3-8 | nRAS0 16 MB SDRAM (nSDRAM_CS)
.TE

.TS
expand;
S4 - User Switches
_
The user switches are used to set a unique MAC address.


.TE

.TS
expand;
1 1 .
S5 - CPU Configuration Switch Box
_
S5-1 | TMODE/PLL MF.  The functionality depends on the position of the CLKSEL switch.  
     | If the CLKSEL Switch is CLOSED then CLOSED=Normal operating mode and  OPEN=Test 
     | Mode.  But if the CLKSEL Switch is CLOSED then CLOSED = PLL MF OF 5 (5x), and  
     | OPEN=PLL MF 0F 6.6(6.6X).
S5-2 | nP4RESET OPEN When enabled, a low on CPU Port bit P4 will
     | reset both CAN interfaces and the ethernet chip.
S5-3 | EN_nTRST When CLOSED, a power on reset will issue a JTAG TRST.
S5-4 | BOSIZE0
S5-5 | BOSIZE1
S5-6 | LITTLE When set to CLOSED, Little-endian is enabled. When set to OPEN, 
     | Big-endian is enabled.
.TE

.TS
expand;
1 1 .
Other Connections
_
P1 | HDLC Ports A (RS232 Drivers)
P2 | HDLC Ports B (RS232 Drivers)
S1 | Power/Reset switch
S2 | Interrupt 0 switch
D2 | Power LED
D3-4 | D3 and D4 are amber LEDs that reflect what is on port bits 0 and 1, 
  | two general purpose I/O pins on the processor. If you write a 0 to 
  | either of these pins, the LEDs will turn on.
D5 | User LED's
J2 | Mictor Connectors
J3 | Mictor Connectors
J4 | Mictor Connectors
JP1 | +5V/+12 Power
JP2 | 14-Pin JTAG Debug Interface
JP3 | Wind River Mailbox Connector
JP4 | CHN_JTAG
JP11 | 10-Pin IDE Connector on UART1
JP12 | IRDA 
JP14 | Ethernet LED Configuration Bits LED/CFG1
JP16 | Ethernet LED Configuration Bits LED/CFG2
JP17 | Ethernet LED Configuration Bits LED/CFG3
JP18 | 96-Pin DIN Expansion Connector
JP22 | +5V/+12V Power
JP23 | CAN1 Interfaces - Jumper Options
JP24 | CAN2 Interfaces - Jumper Options
JP25 | HDLC Ports A (RS485 Drivers)
JP26 | HDLC Ports B (RS485 Drivers)
UX1 | CPU Oscillator
UX2 | CAN Oscillator
UX3 | CAN Oscillator
UX4 | HDLC Oscillator
.TE

.SH SEE ALSO
.tG "Getting Started," 
.pG "Configuration."

.SH "BIBLIOGRAPHY"

.iB "Wind River HSI ARM7 Reference Design"
 
.iB "Advanced RISC Machines, ARM 7TDMI Data Sheet"
 
.iB "Samsung KS32C50100 User's Manual"
 
.iB "Samsung KS32C50100/5000A Application Notes"