/*****************************************************************************
*  Copyright Statement:
*  --------------------
*  This software is protected by Copyright and the information contained
*  herein is confidential. The software may not be copied and the information
*  contained herein may not be used or disclosed except with the written
*  permission of MediaTek Inc. (C) 2005
*
*  BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
*  THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
*  RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
*  AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
*  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
*  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
*  NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
*  SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
*  SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
*  THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
*  NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
*  SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
*
*  BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
*  LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
*  AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
*  OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
*  MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE. 
*
*  THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
*  WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
*  LAWS PRINCIPLES.  ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
*  RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
*  THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
*
*****************************************************************************/

/*****************************************************************************
 *
 * Filename:
 * --------- 
 *    uart_vfifo.c      
 *
 * Project:
 * --------
 *   Maui_Software
 *
 * Description:
 * ------------
 *   This Module defines the functions for virtual FIFO
 *
 * Author:
 * -------
 * -------
 *
 *============================================================================
 *             HISTORY
 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
 *------------------------------------------------------------------------------
 *------------------------------------------------------------------------------
 * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
 *============================================================================
 ****************************************************************************/
#include    "kal_release.h"
#include    "stack_common.h"
#include    "stack_msgs.h"
#include    "app_ltlcom.h"       /* Task message communiction */
#include    "stack_buff_pool.h"
#include    "app_buff_alloc.h"
#include    "drv_comm.h"
#include    "reg_base.h"
#include    "uart_hw.h"
#include    "bmd.h"
#include    "intrCtrl.h"
#include    "drvpdn.h"
#include    "stack_ltlcom.h"       /*msg_send_ext_queue.....definitions*/
#include    "stack_config.h"        /*MOD_UART1_HISR,MOD_UART2_HISR*/
#include    "uart_sw.h"
#include    "dma_hw.h"
#include    "dma_sw.h"
#include    "gpt_sw.h"
#include    "init.h"
#ifdef __ROMSA_SUPPORT__
#ifndef __ROMSA_EXPORT_UART_H__
#include "romsa_export_uart.h"
#endif
#include    "gpt_hw.h"
#endif

#ifdef __DMA_UART_VIRTUAL_FIFO__

/*variable*/
extern const kal_uint32 UART_BaseAddr[MAX_UART_PORT_NUM];
extern UARTStruct UARTPort[MAX_UART_PORT_NUM];
extern const UART_rings_struct *UART_rings;
extern kal_uint8 uart_escape_state;
extern kal_uint8 send_Rxilm[MAX_UART_PORT_NUM];
extern kal_uint8 send_Txilm[MAX_UART_PORT_NUM];
/*function*/ 
extern void UART_sendilm(UART_PORT port, msg_type msgid);
extern void UART_Calback(void *parameter);
/*UART API*/
kal_uint16 U_GetTxISRRoomLeft_VFIFO(UART_PORT port)
{ 
   kal_uint16 real_count; 
	real_count=DMA_GetVFIFO_Roomleft(UARTPort[port].Tx_DMA_Ch);

   /*temp solution: to cover L1 trace bug*/
   if(real_count<=16)
   	real_count=0;
   else
     real_count-=16;
     
   return real_count;
}
kal_uint16 U_GetTxRoomLeft_VFIFO(UART_PORT port)
{
   kal_uint16 real_count;
   kal_uint32  savedMask;
   savedMask = SaveAndSetIRQMask();
	real_count=DMA_GetVFIFO_Roomleft(UARTPort[port].Tx_DMA_Ch);
	RestoreIRQMask(savedMask);
 
   return real_count;
}
kal_uint16 U_GetBytesAvail_VFIFO(UART_PORT port)
{	
   kal_uint16 real_count;
   real_count=DMA_GetVFIFO_Avail(UARTPort[port].Rx_DMA_Ch);
   return real_count;
}
kal_uint8 U_GetUARTByte_VFIFO(UART_PORT port)
{

  kal_uint8 data;
  kal_uint8 ch = UARTPort[port].Rx_DMA_Ch;
  kal_uint16  real_count=0;
  while(1)
  {
     real_count=DMA_GetVFIFO_Avail(ch);
     if (real_count!=0)
     {
        data = DMA_POP(ch);;
        if( uart_support_autoescape()==KAL_TRUE)              
        {
           return data;
        }  
        //#else
        else
        {
           if(UARTPort[port].DCB.flowControl==fc_sw)
           {     
              if(uart_escape_state==0)
              {
                 if(data==0x77)            
                    uart_escape_state=0x77;
                 else            
                    return data;
              }
              else if (uart_escape_state==0x77)
              {
                 uart_escape_state=0x0; 
                 switch(data)
                 {
                    case 0x01:
                       return UARTPort[port].DCB.xonChar;
                       break;
                    case 0x02:
                       return UARTPort[port].DCB.xoffChar;
                       break;               
                    case 0x03:
                       return 0x77;                  
                       break;      
                    default:                     
                       break;      
                 }                                            
              }                           
           }
           else
              return data;            
         }       
     }
  }        
}
void U_PutUARTByte_VFIFO(UART_PORT port, kal_uint8 data)
{
  kal_uint16 ffsta;
  kal_uint8 ch = UARTPort[port].Tx_DMA_Ch;

  while(1)
  {
    ffsta = DRV_Reg(DMA_FFSTA(ch));
    if (!(ffsta & DMA_FFSTA_FULL)) // fifo not full
    {
      DMA_PUSH(ch,data);
      break;
    }
  }
}
void PutUARTData_VFIFO(UART_PORT port, kal_uint8 escape_char, kal_uint8 data)
{
          
   if( (stack_query_boot_mode()== FACTORY_BOOT && UARTPort[port].DCB.flowControl==fc_sw)||
       (uart_support_autoescape()==KAL_FALSE))     
   {
		if (data == UARTPort[port].DCB.xonChar)
   	{
         PutUARTByte(port, escape_char);
         PutUARTByte(port, 0x01);            
   	}
   	else if (data == UARTPort[port].DCB.xoffChar)
   	{
   		PutUARTByte(port, escape_char);
         PutUARTByte(port, 0x02);            
   	}
   	else if (data == escape_char)
   	{
         PutUARTByte(port, escape_char);
         PutUARTByte(port, 0x03);            
   	}
   	else
   	{
   		PutUARTByte(port, data);
   	}         
   }
   else
   {
   	PutUARTByte(port, data);
   }        
}
kal_uint16 U_GetBytes_VFIFO(UART_PORT port, kal_uint8 *Buffaddr, kal_uint16 Length, kal_uint8 *status, module_type ownerid)
{
   kal_uint16  real_count,index;
   kal_uint8 ch = UARTPort[port].Rx_DMA_Ch;
   kal_uint16   data_count=0;
   EXT_ASSERT( (UARTPort[port].ownerid == ownerid), (kal_uint32) ownerid, (kal_uint32)port, (kal_uint32)UARTPort[port].ownerid);

   if (status != NULL)
      *status = 0;

   // get available bytes in rx ring buffer
	real_count = DMA_GetVFIFO_Avail(ch);
   
   if (status != NULL)
   {
      if (UARTPort[port].EscFound)
      {
         *status |= UART_STAT_EscDet;
         UARTPort[port].EscFound = KAL_FALSE;
      }
      if (UARTPort[port].breakDet)
      {
         *status |= UART_STAT_Break;
         UARTPort[port].breakDet = KAL_FALSE;
      }
   }
   do
   {      
      real_count = DMA_GetVFIFO_Avail(ch);      
      if( (stack_query_boot_mode()== FACTORY_BOOT && UARTPort[port].DCB.flowControl==fc_sw)||
          (uart_support_autoescape()==KAL_FALSE&& UARTPort[port].DCB.flowControl==fc_sw ))
      {  
         for (index = 0; (index < real_count)&& (data_count<Length) ; index++)
         {                
            *(Buffaddr+data_count) = DMA_POP(ch); 
            /*The following are for software flow control*/
            if(uart_escape_state==0)
            {
               if(*(Buffaddr+data_count)==0x77)
               {
                  uart_escape_state=0x77;               
               }   
               else   
               {
                  data_count++;
               }   
            }  
            else if (uart_escape_state==0x77)
            {
               switch(*(Buffaddr+data_count))
               {
                  case 0x01:
                     *(Buffaddr+data_count)=UARTPort[port].DCB.xonChar;
                     data_count++;
                     break;
                  case 0x02:                  
                     *(Buffaddr+data_count)=UARTPort[port].DCB.xoffChar; 
                     data_count++;                 
                     break;               
                  case 0x03:                  
                     *(Buffaddr+data_count)=0x77;
                     data_count++;
                     break;      
                  default:                  
                     break;      
               }                         
               uart_escape_state=0x0;        
            }                          
         }   
      }
      else/*HW flow control*/
      {
         for (index = 0; (index < real_count)&& (data_count<Length) ; index++)
         {            
            *(Buffaddr+data_count) = DMA_POP(ch); 
            data_count++;
         }   
      }         
      /*satisfy uart owner request, so break*/
      if (data_count == Length) break;            
      /* disable interrupt*/      
      DMA_DisableINT(ch);      
      real_count = DMA_GetVFIFO_Avail(ch);
       /*there is no data in ringbuffer, so break*/       
      if (real_count==0)
      {
        send_Rxilm[port] = KAL_TRUE;          
        DMA_EnableINT(ch);
        /* enable interrupt*/
        break;
      }      
      DMA_EnableINT(ch);
      /* enable interrupt*/
   }while(KAL_TRUE);      
     
   DMA_EnableINT(ch);
   return data_count;	   
}


kal_uint16 U_PutBytes_VFIFO(UART_PORT port, kal_uint8 *Buffaddr, kal_uint16 Length, module_type ownerid)
{
	kal_uint8 ch = UARTPort[port].Tx_DMA_Ch;
#ifndef DRV_DEBUG
   kal_uint16  real_count,index;
   kal_uint32  savedMask;
    
	EXT_ASSERT( (UARTPort[port].ownerid == ownerid), (kal_uint32) ownerid,  (kal_uint32)port, (kal_uint32)UARTPort[port].ownerid);
   if(UARTPort[port].EnableTX == KAL_FALSE)
   {
   	return Length;
   }
   if (UARTPort[port].sleep_on_tx == uart_sleep_on_tx_forbid)
   {
	   switch(port)
	   {
	      case uart_port1:
	         DRVPDN_Disable(DRVPDN_CON1,DRVPDN_CON1_UART1,PDN_UART1);
	         break;
	      case uart_port2:
	         DRVPDN_Disable(DRVPDN_CON1,DRVPDN_CON1_UART2,PDN_UART2);
	         break;
	#ifdef __UART3_SUPPORT__
	      case uart_port3:
	         #if ( (defined(MT6219))||defined(MT6226M)||(defined(MT6228))|| defined(MT6229)|| (defined(MT6226))|| (defined(MT6227)) )