<tr><td align="CENTER" bgcolor="#FFFFCC">7</td><td align="CENTER"><a name="US_TXDIS"></a><b>US_TXDIS</b><font size="-2"><br><a href="AT91SAM7S64_h.html#AT91C_US_TXDIS">AT91C_US_TXDIS</a></font></td><td><b>Transmitter Disable</b><br>0 = No effect.<br>1 = The transmitter is disabled.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">8</td><td align="CENTER"><a name="US_RSTSTA"></a><b>US_RSTSTA</b><font size="-2"><br><a href="AT91SAM7S64_h.html#AT91C_US_RSTSTA">AT91C_US_RSTSTA</a></font></td><td><b>Reset Status Bits</b><br>0 = No effect.<br>1 = Resets the status bits PARE, FRAME, OVRE and RXBRK in the US_CSR.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">9</td><td align="CENTER"><a name="US_STTBRK"></a><b>US_STTBRK</b><font size="-2"><br><a href="AT91SAM7S64_h.html#AT91C_US_STTBRK">AT91C_US_STTBRK</a></font></td><td><b>Start Break</b><br>0 = No effect.<br>1 = If break is not being transmitted, start transmission of a break after the characters present in US_THR and the Transmit Shift Register have been transmitted.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">10</td><td align="CENTER"><a name="US_STPBRK"></a><b>US_STPBRK</b><font size="-2"><br><a href="AT91SAM7S64_h.html#AT91C_US_STPBRK">AT91C_US_STPBRK</a></font></td><td><b>Stop Break</b><br>0 = No effect.<br>1 = If a break is being transmitted, stop transmission of the break after a minimum of one character length and transmit a high level during 12-bit periods.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">11</td><td align="CENTER"><a name="US_STTTO"></a><b>US_STTTO</b><font size="-2"><br><a href="AT91SAM7S64_h.html#AT91C_US_STTTO">AT91C_US_STTTO</a></font></td><td><b>Start Time-out</b><br>0 = No effect<br>1 = Start waiting for a character before clocking the time-out counter.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">12</td><td align="CENTER"><a name="US_SENDA"></a><b>US_SENDA</b><font size="-2"><br><a href="AT91SAM7S64_h.html#AT91C_US_SENDA">AT91C_US_SENDA</a></font></td><td><b>Send Address</b><br>0 = No effect.<br>1 = In Multi-drop Mode only, the next character written to the US_THR is sent with the address bit set.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">13</td><td align="CENTER"><a name="US_RSTIT"></a><b>US_RSTIT</b><font size="-2"><br><a href="AT91SAM7S64_h.html#AT91C_US_RSTIT">AT91C_US_RSTIT</a></font></td><td><b>Reset Iterations</b><br>Note: This bit only has an effect in ISO7816 Mode.<br>0 = No effect.<br>1 = Resets the status bit Iteration.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">14</td><td align="CENTER"><a name="US_RSTNACK"></a><b>US_RSTNACK</b><font size="-2"><br><a href="AT91SAM7S64_h.html#AT91C_US_RSTNACK">AT91C_US_RSTNACK</a></font></td><td><b>Reset Non Acknowledge</b><br>0 = No effect<br>1 = Resets the status bit Nack</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">15</td><td align="CENTER"><a name="US_RETTO"></a><b>US_RETTO</b><font size="-2"><br><a href="AT91SAM7S64_h.html#AT91C_US_RETTO">AT91C_US_RETTO</a></font></td><td><b>Rearm Time-out</b><br>0 = No effect<br>1 = Restart Time-out</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">16</td><td align="CENTER"><a name="US_DTREN"></a><b>US_DTREN</b><font size="-2"><br><a href="AT91SAM7S64_h.html#AT91C_US_DTREN">AT91C_US_DTREN</a></font></td><td><b>Data Terminal ready Enable</b><br>0 = No effect.<br>1 = The DTR pin is forced to 0.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">17</td><td align="CENTER"><a name="US_DTRDIS"></a><b>US_DTRDIS</b><font size="-2"><br><a href="AT91SAM7S64_h.html#AT91C_US_DTRDIS">AT91C_US_DTRDIS</a></font></td><td><b>Data Terminal ready Disable</b><br>0 = No effect.<br>1 = The DTR pin is forced to 1.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">18</td><td align="CENTER"><a name="US_RTSEN"></a><b>US_RTSEN</b><font size="-2"><br><a href="AT91SAM7S64_h.html#AT91C_US_RTSEN">AT91C_US_RTSEN</a></font></td><td><b>Request to Send enable</b><br>0 = No effect.<br>1 = The RTS pin is forced to 0.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">19</td><td align="CENTER"><a name="US_RTSDIS"></a><b>US_RTSDIS</b><font size="-2"><br><a href="AT91SAM7S64_h.html#AT91C_US_RTSDIS">AT91C_US_RTSDIS</a></font></td><td><b>Request to Send Disable</b><br>0 = No effect.<br>1 = The RTS pin is forced to 1.</td></tr>
</null></table>
<a name="US_MR"></a><h4><a href="#USART">USART</a>: <i><a href="AT91SAM7S64_h.html#AT91_REG">AT91_REG</a></i> US_MR  <i>Mode Register</i></h4><ul><null><font size="-2"><li><b>US1</b> <i><a href="AT91SAM7S64_h.html#AT91C_US1_MR">AT91C_US1_MR</a></i> 0xFFFC4004</font><font size="-2"><li><b>US0</b> <i><a href="AT91SAM7S64_h.html#AT91C_US0_MR">AT91C_US0_MR</a></i> 0xFFFC0004</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">3..0</td><td align="CENTER"><a name="US_USMODE"></a><b>US_USMODE</b><font size="-2"><br><a href="AT91SAM7S64_h.html#AT91C_US_USMODE">AT91C_US_USMODE</a></font></td><td><b>Usart mode</b><br>The Baud Rate Clock used in mode IS07816 can be configured via the register FI_DI_RATIO.<font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="US_USMODE_NORMAL"></a><b>US_USMODE_NORMAL</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_US_USMODE_NORMAL">AT91C_US_USMODE_NORMAL</a></font></td><td><br>Normal</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="US_USMODE_RS485"></a><b>US_USMODE_RS485</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_US_USMODE_RS485">AT91C_US_USMODE_RS485</a></font></td><td><br>RS485</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="US_USMODE_HWHSH"></a><b>US_USMODE_HWHSH</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_US_USMODE_HWHSH">AT91C_US_USMODE_HWHSH</a></font></td><td><br>Hardware Handshaking</td></tr>
<tr><td align="CENTER">3</td><td align="CENTER"><a name="US_USMODE_MODEM"></a><b>US_USMODE_MODEM</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_US_USMODE_MODEM">AT91C_US_USMODE_MODEM</a></font></td><td><br>Modem</td></tr>
<tr><td align="CENTER">4</td><td align="CENTER"><a name="US_USMODE_ISO7816_0"></a><b>US_USMODE_ISO7816_0</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_US_USMODE_ISO7816_0">AT91C_US_USMODE_ISO7816_0</a></font></td><td><br>ISO7816 protocol: T = 0</td></tr>
<tr><td align="CENTER">6</td><td align="CENTER"><a name="US_USMODE_ISO7816_1"></a><b>US_USMODE_ISO7816_1</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_US_USMODE_ISO7816_1">AT91C_US_USMODE_ISO7816_1</a></font></td><td><br>ISO7816 protocol: T = 1</td></tr>
<tr><td align="CENTER">8</td><td align="CENTER"><a name="US_USMODE_IRDA"></a><b>US_USMODE_IRDA</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_US_USMODE_IRDA">AT91C_US_USMODE_IRDA</a></font></td><td><br>IrDA</td></tr>
<tr><td align="CENTER">12</td><td align="CENTER"><a name="US_USMODE_SWHSH"></a><b>US_USMODE_SWHSH</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_US_USMODE_SWHSH">AT91C_US_USMODE_SWHSH</a></font></td><td><br>Software Handshaking</td></tr>
</null></table></font>
</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">5..4</td><td align="CENTER"><a name="US_CLKS"></a><b>US_CLKS</b><font size="-2"><br><a href="AT91SAM7S64_h.html#AT91C_US_CLKS">AT91C_US_CLKS</a></font></td><td><b>Clock Selection (Baud Rate generator Input Clock</b><font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="US_CLKS_CLOCK"></a><b>US_CLKS_CLOCK</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_US_CLKS_CLOCK">AT91C_US_CLKS_CLOCK</a></font></td><td><br>Clock</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="US_CLKS_FDIV1"></a><b>US_CLKS_FDIV1</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_US_CLKS_FDIV1">AT91C_US_CLKS_FDIV1</a></font></td><td><br>fdiv1</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="US_CLKS_SLOW"></a><b>US_CLKS_SLOW</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_US_CLKS_SLOW">AT91C_US_CLKS_SLOW</a></font></td><td><br>slow_clock (ARM)</td></tr>
<tr><td align="CENTER">3</td><td align="CENTER"><a name="US_CLKS_EXT"></a><b>US_CLKS_EXT</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_US_CLKS_EXT">AT91C_US_CLKS_EXT</a></font></td><td><br>External (SCK)</td></tr>
</null></table></font>
</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">7..6</td><td align="CENTER"><a name="US_CHRL"></a><b>US_CHRL</b><font size="-2"><br><a href="AT91SAM7S64_h.html#AT91C_US_CHRL">AT91C_US_CHRL</a></font></td><td><b>Clock Selection (Baud Rate generator Input Clock</b><br>Start, stop and parity bits are added to the character length.<font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="US_CHRL_5_BITS"></a><b>US_CHRL_5_BITS</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_US_CHRL_5_BITS">AT91C_US_CHRL_5_BITS</a></font></td><td><br>Character Length: 5 bits</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="US_CHRL_6_BITS"></a><b>US_CHRL_6_BITS</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_US_CHRL_6_BITS">AT91C_US_CHRL_6_BITS</a></font></td><td><br>Character Length: 6 bits</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="US_CHRL_7_BITS"></a><b>US_CHRL_7_BITS</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_US_CHRL_7_BITS">AT91C_US_CHRL_7_BITS</a></font></td><td><br>Character Length: 7 bits</td></tr>
<tr><td align="CENTER">3</td><td align="CENTER"><a name="US_CHRL_8_BITS"></a><b>US_CHRL_8_BITS</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_US_CHRL_8_BITS">AT91C_US_CHRL_8_BITS</a></font></td><td><br>Character Length: 8 bits</td></tr>
</null></table></font>
</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">8</td><td align="CENTER"><a name="US_SYNC"></a><b>US_SYNC</b><font size="-2"><br><a href="AT91SAM7S64_h.html#AT91C_US_SYNC">AT91C_US_SYNC</a></font></td><td><b>Synchronous Mode Select</b><br>0 = USART operates in Asynchronous Mode.<br>1 = USART operates in Synchronous Mode</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">11..9</td><td align="CENTER"><a name="US_PAR"></a><b>US_PAR</b><font size="-2"><br><a href="AT91SAM7S64_h.html#AT91C_US_PAR">AT91C_US_PAR</a></font></td><td><b>Parity type</b><br>When the PAR field is set to Even parity, the parity bit is set (&#147;1&#148;) if the data parity is Odd in order to ensure an even parity on the Data and Parity field.<font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="US_PAR_EVEN"></a><b>US_PAR_EVEN</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_US_PAR_EVEN">AT91C_US_PAR_EVEN</a></font></td><td><br>Even Parity</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="US_PAR_ODD"></a><b>US_PAR_ODD</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_US_PAR_ODD">AT91C_US_PAR_ODD</a></font></td><td><br>Odd Parity</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="US_PAR_SPACE"></a><b>US_PAR_SPACE</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_US_PAR_SPACE">AT91C_US_PAR_SPACE</a></font></td><td><br>Parity forced to 0 (Space)</td></tr>
<tr><td align="CENTER">3</td><td align="CENTER"><a name="US_PAR_MARK"></a><b>US_PAR_MARK</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_US_PAR_MARK">AT91C_US_PAR_MARK</a></font></td><td><br>Parity forced to 1 (Mark)</td></tr>