<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x148</b></font></td><td><font size="-1"><a href="AT91SAM7S64_AIC.html#AIC_FFSR">AIC_FFSR</a></font></td><td><font size="-1">Fast Forcing Status Register</font></td></tr>
</null></table><br><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><font size="-1"><b>Function</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Description</b></font></th><tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7S64_h.html#AT91F_AIC_ConfigureIt">AT91F_AIC_ConfigureIt</a></b></font></td><td><font size="-1">Interrupt Handler Initialization</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7S64_h.html#AT91F_AIC_Open">AT91F_AIC_Open</a></b></font></td><td><font size="-1">Set exception vectors and AIC registers to default values</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7S64_h.html#AT91F_AIC_ClearIt">AT91F_AIC_ClearIt</a></b></font></td><td><font size="-1">Clear corresponding IT number</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7S64_h.html#AT91F_AIC_AcknowledgeIt">AT91F_AIC_AcknowledgeIt</a></b></font></td><td><font size="-1">Acknowledge corresponding IT number</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7S64_h.html#AT91F_AIC_IsPending">AT91F_AIC_IsPending</a></b></font></td><td><font size="-1">Test if an IT is pending</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7S64_h.html#AT91F_AIC_DisableIt">AT91F_AIC_DisableIt</a></b></font></td><td><font size="-1">Disable corresponding IT number</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7S64_h.html#AT91F_AIC_Trig">AT91F_AIC_Trig</a></b></font></td><td><font size="-1">Trig an IT</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7S64_h.html#AT91F_AIC_EnableIt">AT91F_AIC_EnableIt</a></b></font></td><td><font size="-1">Enable corresponding IT number</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7S64_h.html#AT91F_AIC_IsActive">AT91F_AIC_IsActive</a></b></font></td><td><font size="-1">Test if an IT is active</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7S64_h.html#AT91F_AIC_SetExceptionVector">AT91F_AIC_SetExceptionVector</a></b></font></td><td><font size="-1">Configure vector handler</font></td></tr>
</null></table></null><h2>AIC Register Description</h2>
<null><a name="AIC_SMR"></a><h4><a href="#AIC">AIC</a>: <i><a href="AT91SAM7S64_h.html#AT91_REG">AT91_REG</a></i> AIC_SMR  <i>Source Mode Register</i></h4><ul><null><font size="-2"><li><b>AIC</b> <i><a href="AT91SAM7S64_h.html#AT91C_AIC_SMR">AT91C_AIC_SMR</a></i> 0xFFFFF000</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">2..0</td><td align="CENTER"><a name="AIC_PRIOR"></a><b>AIC_PRIOR</b><font size="-2"><br><a href="AT91SAM7S64_h.html#AT91C_AIC_PRIOR">AT91C_AIC_PRIOR</a></font></td><td><b>Priority Level</b><br>Program the priority level for all sources except source 0 (FIQ).<br>The priority level can be between 0 (lowest) and 7 (highest).<br>The priority level is not used for the FIQ, in the SMR0.<font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="AIC_PRIOR_LOWEST"></a><b>AIC_PRIOR_LOWEST</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_AIC_PRIOR_LOWEST">AT91C_AIC_PRIOR_LOWEST</a></font></td><td><br>Lowest priority level</td></tr>
<tr><td align="CENTER">7</td><td align="CENTER"><a name="AIC_PRIOR_HIGHEST"></a><b>AIC_PRIOR_HIGHEST</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_AIC_PRIOR_HIGHEST">AT91C_AIC_PRIOR_HIGHEST</a></font></td><td><br>Highest priority level</td></tr>
</null></table></font>
</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">6..5</td><td align="CENTER"><a name="AIC_SRCTYPE"></a><b>AIC_SRCTYPE</b><font size="-2"><br><a href="AT91SAM7S64_h.html#AT91C_AIC_SRCTYPE">AT91C_AIC_SRCTYPE</a></font></td><td><b>Interrupt Source Type</b><br>Program the input to be positive or negative edge-triggered or positive or negative level sensitive.<br>The active level or edge is not programmable for the internal sources.<font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0b</td><td align="CENTER"><a name="AIC_SRCTYPE_INT_HIGH_LEVEL"></a><b>AIC_SRCTYPE_INT_HIGH_LEVEL</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL">AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL</a></font></td><td><br>Internal Sources Code Label High-level Sensitive</td></tr>
<tr><td align="CENTER">0a</td><td align="CENTER"><a name="AIC_SRCTYPE_EXT_LOW_LEVEL"></a><b>AIC_SRCTYPE_EXT_LOW_LEVEL</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_AIC_SRCTYPE_EXT_LOW_LEVEL">AT91C_AIC_SRCTYPE_EXT_LOW_LEVEL</a></font></td><td><br>External Sources Code Label Low-level Sensitive</td></tr>
<tr><td align="CENTER">1b</td><td align="CENTER"><a name="AIC_SRCTYPE_INT_POSITIVE_EDGE"></a><b>AIC_SRCTYPE_INT_POSITIVE_EDGE</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_AIC_SRCTYPE_INT_POSITIVE_EDGE">AT91C_AIC_SRCTYPE_INT_POSITIVE_EDGE</a></font></td><td><br>Internal Sources Code Label Positive Edge triggered</td></tr>
<tr><td align="CENTER">1a</td><td align="CENTER"><a name="AIC_SRCTYPE_EXT_NEGATIVE_EDGE"></a><b>AIC_SRCTYPE_EXT_NEGATIVE_EDGE</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_AIC_SRCTYPE_EXT_NEGATIVE_EDGE">AT91C_AIC_SRCTYPE_EXT_NEGATIVE_EDGE</a></font></td><td><br>External Sources Code Label Negative Edge triggered</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="AIC_SRCTYPE_HIGH_LEVEL"></a><b>AIC_SRCTYPE_HIGH_LEVEL</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_AIC_SRCTYPE_HIGH_LEVEL">AT91C_AIC_SRCTYPE_HIGH_LEVEL</a></font></td><td><br>Internal Or External Sources Code Label High-level Sensitive</td></tr>
<tr><td align="CENTER">3</td><td align="CENTER"><a name="AIC_SRCTYPE_POSITIVE_EDGE"></a><b>AIC_SRCTYPE_POSITIVE_EDGE</b><font size="-1"><br><a href="AT91SAM7S64_h.html#AT91C_AIC_SRCTYPE_POSITIVE_EDGE">AT91C_AIC_SRCTYPE_POSITIVE_EDGE</a></font></td><td><br>Internal Or External Sources Code Label Positive Edge triggered</td></tr>
</null></table></font>
</td></tr>
</null></table>
<a name="AIC_SVR"></a><h4><a href="#AIC">AIC</a>: <i><a href="AT91SAM7S64_h.html#AT91_REG">AT91_REG</a></i> AIC_SVR  <i>Source Vector Register</i></h4><ul><null><font size="-2"><li><b>AIC</b> <i><a href="AT91SAM7S64_h.html#AT91C_AIC_SVR">AT91C_AIC_SVR</a></i> 0xFFFFF080</font></null></ul><br>The user may store in these registers the addresses of the corresponding handler for each interrupt source.<a name="AIC_IVR"></a><h4><a href="#AIC">AIC</a>: <i><a href="AT91SAM7S64_h.html#AT91_REG">AT91_REG</a></i> AIC_IVR  <i>IRQ Vector Register</i></h4><ul><null><font size="-2"><li><b>AIC</b> <i><a href="AT91SAM7S64_h.html#AT91C_AIC_IVR">AT91C_AIC_IVR</a></i> 0xFFFFF100</font></null></ul><br>The IRQ Vector Register contains the vector programmed by the user in the Source Vector Register corresponding to<br>the current interrupt.<br>The Source Vector Register (1 to 31) is indexed using the current interrupt number when the Interrupt Vector Register is read.<br>When there is no current interrupt, the IRQ Vector Register reads the value stored in AIC_SPU.<a name="AIC_FVR"></a><h4><a href="#AIC">AIC</a>: <i><a href="AT91SAM7S64_h.html#AT91_REG">AT91_REG</a></i> AIC_FVR  <i>FIQ Vector Register</i></h4><ul><null><font size="-2"><li><b>AIC</b> <i><a href="AT91SAM7S64_h.html#AT91C_AIC_FVR">AT91C_AIC_FVR</a></i> 0xFFFFF104</font></null></ul><br>The FIQ Vector Register contains the vector programmed by the user in the Source Vector Register 0 which corre-sponds to FIQ.<a name="AIC_ISR"></a><h4><a href="#AIC">AIC</a>: <i><a href="AT91SAM7S64_h.html#AT91_REG">AT91_REG</a></i> AIC_ISR  <i>Interrupt Status Register</i></h4><ul><null><font size="-2"><li><b>AIC</b> <i><a href="AT91SAM7S64_h.html#AT91C_AIC_ISR">AT91C_AIC_ISR</a></i> 0xFFFFF108</font></null></ul><br>The Interrupt Status Register returns the current interrupt source number.<a name="AIC_IPR"></a><h4><a href="#AIC">AIC</a>: <i><a href="AT91SAM7S64_h.html#AT91_REG">AT91_REG</a></i> AIC_IPR  <i>Interrupt Pending Register</i></h4><ul><null><font size="-2"><li><b>AIC</b> <i><a href="AT91SAM7S64_h.html#AT91C_AIC_IPR">AT91C_AIC_IPR</a></i> 0xFFFFF10C</font></null></ul><br>0 = Corresponding interrupt is inactive.<br>1 = Corresponding interrupt is pending.<a name="AIC_IMR"></a><h4><a href="#AIC">AIC</a>: <i><a href="AT91SAM7S64_h.html#AT91_REG">AT91_REG</a></i> AIC_IMR  <i>Interrupt Mask Register</i></h4><ul><null><font size="-2"><li><b>AIC</b> <i><a href="AT91SAM7S64_h.html#AT91C_AIC_IMR">AT91C_AIC_IMR</a></i> 0xFFFFF110</font></null></ul><br>0 = Corresponding interrupt is disabled.<br>1 = Corresponding interrupt is enabled.<a name="AIC_CISR"></a><h4><a href="#AIC">AIC</a>: <i><a href="AT91SAM7S64_h.html#AT91_REG">AT91_REG</a></i> AIC_CISR  <i>Core Interrupt Status Register</i></h4><ul><null><font size="-2"><li><b>AIC</b> <i><a href="AT91SAM7S64_h.html#AT91C_AIC_CISR">AT91C_AIC_CISR</a></i> 0xFFFFF114</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">0</td><td align="CENTER"><a name="AIC_NFIQ"></a><b>AIC_NFIQ</b><font size="-2"><br><a href="AT91SAM7S64_h.html#AT91C_AIC_NFIQ">AT91C_AIC_NFIQ</a></font></td><td><b>NFIQ Status</b><br>0 = NFIQ line inactive.<br>1 = NFIQ line active.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">1</td><td align="CENTER"><a name="AIC_NIRQ"></a><b>AIC_NIRQ</b><font size="-2"><br><a href="AT91SAM7S64_h.html#AT91C_AIC_NIRQ">AT91C_AIC_NIRQ</a></font></td><td><b>NIRQ Status</b><br>0 = NIRQ line inactive.<br>1 = NIRQ line active.</td></tr>
</null></table>
<a name="AIC_IECR"></a><h4><a href="#AIC">AIC</a>: <i><a href="AT91SAM7S64_h.html#AT91_REG">AT91_REG</a></i> AIC_IECR  <i>Interrupt Enable Command Register</i></h4><ul><null><font size="-2"><li><b>AIC</b> <i><a href="AT91SAM7S64_h.html#AT91C_AIC_IECR">AT91C_AIC_IECR</a></i> 0xFFFFF120</font></null></ul><br>0 = No effect.<br>1 = Enables corresponding interrupt.<a name="AIC_IDCR"></a><h4><a href="#AIC">AIC</a>: <i><a href="AT91SAM7S64_h.html#AT91_REG">AT91_REG</a></i> AIC_IDCR  <i>Interrupt Disable Command Register</i></h4><ul><null><font size="-2"><li><b>AIC</b> <i><a href="AT91SAM7S64_h.html#AT91C_AIC_IDCR">AT91C_AIC_IDCR</a></i> 0xFFFFF124</font></null></ul><br>0 = No effect.<br>1 = Disables corresponding interrupt.<a name="AIC_ICCR"></a><h4><a href="#AIC">AIC</a>: <i><a href="AT91SAM7S64_h.html#AT91_REG">AT91_REG</a></i> AIC_ICCR  <i>Interrupt Clear Command Register</i></h4><ul><null><font size="-2"><li><b>AIC</b> <i><a href="AT91SAM7S64_h.html#AT91C_AIC_ICCR">AT91C_AIC_ICCR</a></i> 0xFFFFF128</font></null></ul><br>0 = No effect.<br>1 = Clears corresponding interrupt.<a name="AIC_ISCR"></a><h4><a href="#AIC">AIC</a>: <i><a href="AT91SAM7S64_h.html#AT91_REG">AT91_REG</a></i> AIC_ISCR  <i>Interrupt Set Command Register</i></h4><ul><null><font size="-2"><li><b>AIC</b> <i><a href="AT91SAM7S64_h.html#AT91C_AIC_ISCR">AT91C_AIC_ISCR</a></i> 0xFFFFF12C</font></null></ul><br>0 = No effect.<br>1 = Sets corresponding interrupt.<a name="AIC_EOICR"></a><h4><a href="#AIC">AIC</a>: <i><a href="AT91SAM7S64_h.html#AT91_REG">AT91_REG</a></i> AIC_EOICR  <i>End of Interrupt Command Register</i></h4><ul><null><font size="-2"><li><b>AIC</b> <i><a href="AT91SAM7S64_h.html#AT91C_AIC_EOICR">AT91C_AIC_EOICR</a></i> 0xFFFFF130</font></null></ul><br>The End of Interrupt Command Register is used by the interrupt routine to indicate that the interrupt treatment is complete.<br>Any value can be written because it is only necessary to make a write to this register location to signal the end of interrupt<br>treatment.<a name="AIC_SPU"></a><h4><a href="#AIC">AIC</a>: <i><a href="AT91SAM7S64_h.html#AT91_REG">AT91_REG</a></i> AIC_SPU  <i>Spurious Vector Register</i></h4><ul><null><font size="-2"><li><b>AIC</b> <i><a href="AT91SAM7S64_h.html#AT91C_AIC_SPU">AT91C_AIC_SPU</a></i> 0xFFFFF134</font></null></ul><br>Spurious Interrupt Vector Handler Address<br>The user may store the address of the spurious interrupt handler in this register.<a name="AIC_DCR"></a><h4><a href="#AIC">AIC</a>: <i><a href="AT91SAM7S64_h.html#AT91_REG">AT91_REG</a></i> AIC_DCR  <i>Debug Control Register (Protect)</i></h4><ul><null><font size="-2"><li><b>AIC</b> <i><a href="AT91SAM7S64_h.html#AT91C_AIC_DCR">AT91C_AIC_DCR</a></i> 0xFFFFF138</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">0</td><td align="CENTER"><a name="AIC_DCR_PROT"></a><b>AIC_DCR_PROT</b><font size="-2"><br><a href="AT91SAM7S64_h.html#AT91C_AIC_DCR_PROT">AT91C_AIC_DCR_PROT</a></font></td><td><b>Protection Mode</b><br>0: The protection Mode is disabled<br>1: The Protection mode is enabled</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">1</td><td align="CENTER"><a name="AIC_DCR_GMSK"></a><b>AIC_DCR_GMSK</b><font size="-2"><br><a href="AT91SAM7S64_h.html#AT91C_AIC_DCR_GMSK">AT91C_AIC_DCR_GMSK</a></font></td><td><b>General Mask</b><br>0: The nIRQ qnd nFIQ lines are normally controled by the AIC<br>1: The nIRQ and nFIQ lines are tied to their inactive mode</td></tr>
</null></table>
<a name="AIC_FFER"></a><h4><a href="#AIC">AIC</a>: <i><a href="AT91SAM7S64_h.html#AT91_REG">AT91_REG</a></i> AIC_FFER  <i>Fast Forcing Enable Register</i></h4><ul><null><font size="-2"><li><b>AIC</b> <i><a href="AT91SAM7S64_h.html#AT91C_AIC_FFER">AT91C_AIC_FFER</a></i> 0xFFFFF140</font></null></ul><br>0 = No effect.<br>1 = Enables fast forcing feature on corresponding interrupt.<a name="AIC_FFDR"></a><h4><a href="#AIC">AIC</a>: <i><a href="AT91SAM7S64_h.html#AT91_REG">AT91_REG</a></i> AIC_FFDR  <i>Fast Forcing Disable Register</i></h4><ul><null><font size="-2"><li><b>AIC</b> <i><a href="AT91SAM7S64_h.html#AT91C_AIC_FFDR">AT91C_AIC_FFDR</a></i> 0xFFFFF144</font></null></ul><br>0 = No effect.<br>1 = Disables fast forcing feature on corresponding interrupt.<a name="AIC_FFSR"></a><h4><a href="#AIC">AIC</a>: <i><a href="AT91SAM7S64_h.html#AT91_REG">AT91_REG</a></i> AIC_FFSR  <i>Fast Forcing Status Register</i></h4><ul><null><font size="-2"><li><b>AIC</b> <i><a href="AT91SAM7S64_h.html#AT91C_AIC_FFSR">AT91C_AIC_FFSR</a></i> 0xFFFFF148</font></null></ul><br>0 = Disabled.<br>1 = Fast forcing feature enabled on corresponding interrupt.</null><hr></html>