; POWER_UP_LEVEL ; Low   ; -    ; pro2:rcnt[17] ;
; POWER_UP_LEVEL ; Low   ; -    ; pro2:rcnt[18] ;
; POWER_UP_LEVEL ; Low   ; -    ; pro2:rcnt[19] ;
; POWER_UP_LEVEL ; Low   ; -    ; pro2:rcnt[20] ;
; POWER_UP_LEVEL ; Low   ; -    ; pro2:rcnt[21] ;
; POWER_UP_LEVEL ; Low   ; -    ; pro2:rcnt[22] ;
; POWER_UP_LEVEL ; Low   ; -    ; pro2:rcnt[23] ;
; POWER_UP_LEVEL ; Low   ; -    ; pro2:rcnt[24] ;
; POWER_UP_LEVEL ; Low   ; -    ; pro2:rcnt[25] ;
; POWER_UP_LEVEL ; Low   ; -    ; pro2:rcnt[26] ;
; POWER_UP_LEVEL ; Low   ; -    ; pro2:rcnt[27] ;
; POWER_UP_LEVEL ; Low   ; -    ; pro2:rcnt[28] ;
; POWER_UP_LEVEL ; Low   ; -    ; pro2:rcnt[29] ;
; POWER_UP_LEVEL ; Low   ; -    ; pro2:rcnt[30] ;
; POWER_UP_LEVEL ; Low   ; -    ; pro2:rcnt[31] ;
+----------------+-------+------+---------------+


+---------------------------------------------+
; Source assignments for top:inst|transfer:u3 ;
+----------------+-------+------+-------------+
; Assignment     ; Value ; From ; To          ;
+----------------+-------+------+-------------+
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[0]  ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[1]  ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[2]  ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[3]  ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[4]  ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[5]  ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[6]  ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[7]  ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[8]  ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[9]  ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[10] ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[11] ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[12] ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[13] ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[14] ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[15] ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[16] ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[17] ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[18] ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[19] ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[20] ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[21] ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[22] ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[23] ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[24] ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[25] ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[26] ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[27] ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[28] ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[29] ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[30] ;
; POWER_UP_LEVEL ; Low   ; -    ; xbitcnt[31] ;
; POWER_UP_LEVEL ; Low   ; -    ; xcnt16[0]   ;
; POWER_UP_LEVEL ; Low   ; -    ; xcnt16[1]   ;
; POWER_UP_LEVEL ; Low   ; -    ; xcnt16[2]   ;
; POWER_UP_LEVEL ; Low   ; -    ; xcnt16[3]   ;
; POWER_UP_LEVEL ; Low   ; -    ; xcnt16[4]   ;
+----------------+-------+------+-------------+


+-------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: top:inst|reciever:u2 ;
+----------------+-------+------------------------------------------+
; Parameter Name ; Value ; Type                                     ;
+----------------+-------+------------------------------------------+
; framlenr       ; 8     ; Integer                                  ;
+----------------+-------+------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: top:inst|transfer:u3 ;
+----------------+-------+------------------------------------------+
; Parameter Name ; Value ; Type                                     ;
+----------------+-------+------------------------------------------+
; framlent       ; 8     ; Integer                                  ;
+----------------+-------+------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 6.0 Build 202 06/20/2006 Service Pack 1 SJ Full Version
    Info: Processing started: Sun Mar 02 17:40:45 2008
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off abce -c top
Info: Found 1 design units, including 1 entities, in source file top1.bdf
    Info: Found entity 1: top1
Info: Found 2 design units, including 1 entities, in source file baud.vhd
    Info: Found design unit 1: baud-behavioral
    Info: Found entity 1: baud
Info: Found 2 design units, including 1 entities, in source file reciever.vhd
    Info: Found design unit 1: reciever-behavioral
    Info: Found entity 1: reciever
Info: Found 2 design units, including 1 entities, in source file top.vhd
    Info: Found design unit 1: top-behavioral
    Info: Found entity 1: top
Info: Found 2 design units, including 1 entities, in source file transfer.vhd
    Info: Found design unit 1: transfer-behavioral
    Info: Found entity 1: transfer
Info: Elaborating entity "top1" for the top level hierarchy
Warning: Port "xmit_cmd_p_in" of type top and instance "inst" is missing source signal
Info: Elaborating entity "top" for hierarchy "top:inst"
Info: Elaborating entity "baud" for hierarchy "top:inst|baud:u1"
Info: Elaborating entity "reciever" for hierarchy "top:inst|reciever:u2"
Info: Elaborating entity "transfer" for hierarchy "top:inst|transfer:u3"
Info: State machine "|top1|top:inst|transfer:u3|state" contains 5 states
Info: State machine "|top1|top:inst|reciever:u2|state" contains 5 states
Info: Selected Auto state machine encoding method for state machine "|top1|top:inst|transfer:u3|state"
Info: Encoding result for state machine "|top1|top:inst|transfer:u3|state"
    Info: Completed encoding using 5 state bits
        Info: Encoded state bit "top:inst|transfer:u3|state.x_stop"
        Info: Encoded state bit "top:inst|transfer:u3|state.x_shift"
        Info: Encoded state bit "top:inst|transfer:u3|state.x_wait"
        Info: Encoded state bit "top:inst|transfer:u3|state.x_start"
        Info: Encoded state bit "top:inst|transfer:u3|state.x_idle"
    Info: State "|top1|top:inst|transfer:u3|state.x_idle" uses code string "00000"
    Info: State "|top1|top:inst|transfer:u3|state.x_start" uses code string "00011"
    Info: State "|top1|top:inst|transfer:u3|state.x_wait" uses code string "00101"
    Info: State "|top1|top:inst|transfer:u3|state.x_shift" uses code string "01001"
    Info: State "|top1|top:inst|transfer:u3|state.x_stop" uses code string "10001"
Info: Selected Auto state machine encoding method for state machine "|top1|top:inst|reciever:u2|state"
Info: Encoding result for state machine "|top1|top:inst|reciever:u2|state"
    Info: Completed encoding using 5 state bits
        Info: Encoded state bit "top:inst|reciever:u2|state.r_stop"
        Info: Encoded state bit "top:inst|reciever:u2|state.r_sample"
        Info: Encoded state bit "top:inst|reciever:u2|state.r_wait"
        Info: Encoded state bit "top:inst|reciever:u2|state.r_center"
        Info: Encoded state bit "top:inst|reciever:u2|state.r_start"
    Info: State "|top1|top:inst|reciever:u2|state.r_start" uses code string "00000"
    Info: State "|top1|top:inst|reciever:u2|state.r_center" uses code string "00011"
    Info: State "|top1|top:inst|reciever:u2|state.r_wait" uses code string "00101"
    Info: State "|top1|top:inst|reciever:u2|state.r_sample" uses code string "01001"
    Info: State "|top1|top:inst|reciever:u2|state.r_stop" uses code string "10001"
Warning: Reduced register "top:inst|transfer:u3|state.x_start" with stuck data_in port to stuck value GND
Info: Implemented 196 device resources after synthesis - the final resource count might be different
    Info: Implemented 2 input pins
    Info: Implemented 1 output pins
    Info: Implemented 193 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 2 warnings
    Info: Processing ended: Sun Mar 02 17:40:47 2008
    Info: Elapsed time: 00:00:03