?? f6.inc
字號:
#define _Z STATUS,Z
#define _C STATUS,C
#define _BANK1 STATUS,RP0
;----- LoadOn Bits --------------------------------------------------------
#define CMD_Charge LoadOn,0
#define CMD_DisCharge LoadOn,1
#define CMD_Standby LoadOn,2
;#define CMD_Start LoadOn,3
#define CMD_Stop LoadOn,4
;----- WorkFlag Bits --------------------------------------------------------
#define Charging WorkFlag,0 ;正在充電
#define disCharging WorkFlag,1 ;正在放電
#define Standing WorkFlag,2
;----- fCOMM Bits --------------------------------------------------------
#define Rise_Down fCOMM,0 ;0/1:做上升波形/做下降波形
#define RECEIVING fCOMM,1
#define Txmt_Success fCOMM,2
#define CommSuccess fCOMM,3
#define aFRAME fCOMM,4 ;收到一幀
#define RX9D_copy fCOMM,5
#define BattOn fCOMM,6
;----- fFLAG Bits --------------------------------------------------------
#define TimerArrived fFLAG,0
#define SEC1 fFLAG,1
#define MIN1 fFLAG,2
#define DetectBatt fFLAG,3
#define Pass_1s fFLAG,4
#define isCR_1OS fFLAG,5 ;是對通道1的失調進行步進校準
#define CorrCH2 fFLAG,6
#define TopPoint fFLAG,7
;----- fFLAG2 Bits --------------------------------------------------------
#define ReadedCH1 fFLAG2,1
#define ReadedCH2 fFLAG2,2
#define Mode_0CH1_1CH2 fFLAG2,3
#define OverCapacity fFLAG2,6
#define OverTermTime fFLAG2,7
AARGB3 set (BFIIC+0)
AARGB2 set (BFIIC+1)
AARGB3 set (BFIIC+0)
AARGB2 set (BFIIC+1)
AARGB1 set (BFIIC+2)
AARGB0 set (BFIIC+3) ;AARG MSB
BARGB1 set (BFIIC+4)
BARGB0 set (BFIIC+5) ;BARG MSB
REMB1 set (BFIIC+6)
REMB0 set (BFIIC+7) ;remainder MSB
LOOPCOUNT set J
CBLOCK 0x7F
W_TEMP ; W 的臨時備份寄存器
ENDC
;//BANK1:A0--AFH:unused
CBLOCK 0xA0
;//預設參數(shù)區(qū) -----------------------------------------------------
Current_LOW ;充放電電流,3 bytes
Current_MID
Current_HI
ConstantV_LOW ;截止/恒壓電壓,3 bytes
ConstantV_MID
ConstantV_HI
ChargeTermI_LOW ;充電截止電流,3 bytes
ChargeTermI_MID
ChargeTermI_HI
TerminalT_LOW ;充放電截止時長
TerminalT_HI
DisCHTermV_LOW ;放電截止電壓
DisCHTermV_MID
DisCHTermV_HI
StandBy ;靜置時間,1 bytes
Iaddend1 ; CH1波形數(shù)據(jù)累加和
; ----------------------------------------------------------------
Iaddend2
Iaddend3
Iaddend4
Vaddend1 ; CH2波形數(shù)據(jù)累加和
Vaddend2
Vaddend3
Vaddend4
I_Waveform1 ; CH1波形數(shù)據(jù)的每秒平均值
I_Waveform2
I_Waveform3
V_Waveform1 ; CH2波形數(shù)據(jù)的每秒平均值
V_Waveform2
V_Waveform3
V_Start_LOW
V_Start_MID
V_Start_HI
; ----------------------------------------------------------------
V_Half_LOW
V_Half_MID
V_Half_HI
V_Full_LOW
V_Full_MID
V_Full_HI
RB0_I1
RB0_I2
RB0_I3
RB0_V1
RB0_V2
RB0_V3
PARITY
J_H ;截止(=4AH)/恒壓電壓(=48H)指示
APGAIN1_LOW
APGAIN1_HI
APGAIN2_LOW
APGAIN2_HI
ENDC
CBLOCK 0xFC ;備份區(qū)
STATUS_TEMP ;STATUS 的臨時備份寄存器
FSR_TEMP ;FSR 的臨時備份寄存器
PCLATH_TEMP ;PCLATH 的臨時備份寄存器
;FFH:used for W_TEMP's backup
ENDC
; ------------------------------------------------------------------------------------------
;//24C02 數(shù)據(jù)地址定義
AT_DeviceNO equ 0x10 ;10H--12H,5位設備號+1位通道號(BCD碼)
;20H--2FH(7756用)
AT_CH1OS equ 0x20 ;CH1失調校正寄存器值,1 bytes
AT_CH2OS equ 0x21 ;CH2失調校正寄存器值,1 bytes
AT_APGAIN equ 0x22 ;22h,23h
AT_Current equ 0x30 ;充放電電流,3 bytes
AT_ConstantV equ 0x33 ;截止/恒壓電壓,3 bytes
;//跨頁不能單寫
AT_ChargeTermI equ 0x36 ;充電截止電流,3 bytes
AT_TerminalT equ 0x39 ;充放電截止時長,2 bytes
AT_TermC equ 0x3B ;截止容量,3 bytes
AT_DisCHTermV equ 0x40 ;放電截止電壓,3 bytes
AT_HandleTime equ 0x48 ;靜置時限,1 bytes,單位:分
;//***************************** ADE7756 initinal *************************************************************
;★MODE_INIT equ H'500D' ;B'0101000000001101',CH1,7kSPS,禁止SAG,CF,HPF
;;;MODE_INIT equ H'580D' ;B'0101100000001101',CH1,3.5kSPS,禁止SAG,CF,HPF
MODE_INIT equ H'580D' ;B'0101100000001101',CH1,3.5kSPS,禁止SAG,CF,HPF
;/*
;bit15 TEST1 Writing a Logic 1 to this bit position places the ADE7756 in test mode.This is intended for factory testing only and should be left at zero.
;bit14,13 WAVSEL1 0
; 0 0 Active Power signal (output of LPF2)
; 0 1 RESERVED
; 1 0 Channel 1
; 1 1 Channel 2
;bit12,11 DTRT1 0
; 0 0 27.9 kSPS (CLKIN/128) (35us)
; 0 1 14 kSPS (CLKIN/256) (71us)
; 1 0 7 kSPS (CLKIN/512) (142us)
; 1 1 3.5 kSPS (CLKIN/1024) (285us)
;bit10 SWAP By setting this bit to Logic 1 the analog inputs V2P and V2N are connected to ADC 1 and the
; analog inputs V1P and V1N are connected to ADC 2.
;bit9 DISCH2 ADC 2 (Channel 2)inputs are internally shorted together.
;bit8 DISCH1 ADC 1 (Channel 1)inputs are internally shorted together.
;bit7 CMODE Setting this bit to a Logic 1 places the chip in calibration mode.
;bit6 SWRST Software Chip Reset.A data transfer should not take place to the ADE7756 for at least 18 μs
; after a software reset.
;bit5 TEMPSEL The temperature conversion starts when this bit is set to one.This bit is automatically reset to
; zero when the temperature conversion is finished.
;bit4 ASUSPEND By setting this bit to Logic 1,both ADE7756 ’s A/D converters can be turned off.In normal
; operation,this bit should be left at Logic 0.All digital functionality can be stopped by sus-
; pending the clock signal at CLKIN pin.
;bit3 DISSAG The line voltage Sag detection is disabled when this bit is set.
;bit2 DISCF The frequency output CF is disabled when this bit is set.
;bit1 DISLPF2 The LPF (Low-Pass Filter)after the multiplier (LPF2)is disabled when this bit is set.
;bit0 DISHPF The HFP (High-Pass Filter)in Channel 1 is disabled when this bit is set.
;*/
IRQEN_INIT equ B'00001000'
; 7756參數(shù)定義
ADDR_CFDIV equ 0x07 ; 12bits
ADDR_ZXTOUT equ 0x0E ; 12bits
ADDR_SAGCYC equ 0x0F ; 8bits
#define GAIN8FS1 ; 錳銅片10毫歐姆,增益8
;#define GAIN16FS1 ; 錳銅片5毫歐姆,增益16
#ifdef GAIN8FS1
;/*
;bit7,6,5 000 = x1 PGA2 Gain select
;bit7,6,5 001 = x2
;bit7,6,5 010 = x4
;bit7,6,5 011 = x8
;bit7,6,5 100 = x16
;bit4,3 00 = 1V Channel 1 FS select
;bit4,3 01 = 0.5V Channel 1 FS select
;bit4,3 10 = 0.25V Channel 1 FS select
;bit2,1,0 000 = x1 PGA1 Gain select
;bit2,1,0 001 = x2
;bit2,1,0 010 = x4
;bit2,1,0 011 = x8
;bit2,1,0 100 = x16
;*/
;;;GAIN_INIT equ B'00000011' ; PGA2=1,CH1:1V,PGA1=8,通道1最大信號0.125V
GAIN_INIT equ B'00000000'
;GAIN_SWAP equ B'01100000'
I_Code equ H'0600' ; ;電池檢測時,大于該值高字節(jié)認為有電池
;(1.36mV,即 0700H*125mV/165151=1.36mV,1.36mV/10mΩ=136mA)
I200mA equ H'0A52'
ChymicI equ H'67A8' ; 1/5C=2A,2A*10mΩ=20mV
;Δ = |I_sample - 指標值|
Accord equ H'FE' ; Δ <= Accord,不用調整占空比
FineADJ equ H'0200' ; 其次,Δ <=high Accord,調電阻網(wǎng)絡
; 否則,Δ >high Accord,調10位DC值
L_ChargeI_LOW equ H'14'
L_ChargeI_MID equ H'23'
L_ChargeI_HI equ H'01'
#endif
#ifdef GAIN16FS1
GAIN_INIT equ B'00000100' ; PGA2=1,CH1:1V,PGA1=16,通道1最大信號0.0625V
I_Code equ H'0600' ; ;電池檢測時,大于該值高字節(jié)認為有電池
;(0.678mV,即 0700H*62.5mV/165151=0.678mV,0.678mV/5mΩ=136mA)
I200mA equ H'0A52'
ChymicI equ H'67A8' ; 1/5C=2A,2A*10mΩ=20mV
ChargeTermI equ H'0600' ; 充電截止電流(1.16mV,即 0300H*250mV/165151=1.16mV,1.16mV/10mΩ=116mA)
Accord equ H'FE' ; Δ <= Accord,不用調整占空比
FineADJ equ H'0200' ; 其次,Δ <=high Accord,調電阻網(wǎng)絡
; 否則,Δ >high Accord,調10位DC值
L_ChargeI_LOW equ H'14'
L_ChargeI_MID equ H'23'
L_ChargeI_HI equ H'01' ; 5.64A,校準APGAIN所用
#endif
APGAIN_err equ H'A5' ;APGAIN的誤差值,對應0.25mV,滿度的千分之一
V_Region equ H'0300' ;相對于V0的震蕩范圍不超過V_Code(2mV),則有電池
V_Code equ H'8106' ;200mV*5=1V
;V42 equ H'021DE6' ;4.2V(4.2*165151/5=138726)
;V5008 equ H'028627' ;5.008V(5.008*165151/5=165415)
V36_LOW equ H'7C'
V36_MID equ H'D0'
V36_HI equ H'01' ;3.6V變成的0.72V(化成第二階段)
V42_LOW equ H'E6'
V42_MID equ H'1D'
V42_HI equ H'02' ;4.2V
V42_Fine equ H'21'
DisCHTerV_LOW equ H'5D'
DisCHTerV_MID equ H'5C'
DisCHTerV_HI equ H'01' ;2.7V
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