/* * Network device driver for the BMAC ethernet controller on * Apple Powermacs.  Assumes it's under a DBDMA controller. * * Copyright (C) 1998 Randy Gobbel. */#include <linux/config.h>#include <linux/module.h>#include <linux/kernel.h>#include <linux/netdevice.h>#include <linux/etherdevice.h>#include <linux/delay.h>#include <linux/string.h>#include <linux/timer.h>#include <linux/proc_fs.h>#include <asm/prom.h>#include <asm/dbdma.h>#include <asm/io.h>#include <asm/page.h>#include <asm/pgtable.h>#include <asm/feature.h>#include "bmac.h"#define trunc_page(x)	((void *)(((unsigned long)(x)) & ~((unsigned long)(PAGE_SIZE - 1))))#define round_page(x)	trunc_page(((unsigned long)(x)) + ((unsigned long)(PAGE_SIZE - 1)))/* * CRC polynomial - used in working out multicast filter bits. */#define ENET_CRCPOLY 0x04c11db7/* switch to use multicast code lifted from sunhme driver */#define SUNHME_MULTICAST#define N_RX_RING	64#define N_TX_RING	32#define MAX_TX_ACTIVE	1#define ETHERCRC	4#define ETHERMINPACKET	64#define ETHERMTU	1500#define RX_BUFLEN	(ETHERMTU + 14 + ETHERCRC + 2)#define TX_TIMEOUT	HZ	/* 1 second *//* Bits in transmit DMA status */#define TX_DMA_ERR	0x80#define XXDEBUG(args)struct bmac_data {	/* volatile struct bmac *bmac; */	struct sk_buff_head *queue;	volatile struct dbdma_regs *tx_dma;	int tx_dma_intr;	volatile struct dbdma_regs *rx_dma;	int rx_dma_intr;	volatile struct dbdma_cmd *tx_cmds;	/* xmit dma command list */	volatile struct dbdma_cmd *rx_cmds;	/* recv dma command list */	struct device_node *node;	struct sk_buff *rx_bufs[N_RX_RING];	int rx_fill;	int rx_empty;	struct sk_buff *tx_bufs[N_TX_RING];	int tx_fill;	int tx_empty;	unsigned char tx_fullup;	struct net_device_stats stats;	struct timer_list tx_timeout;	int timeout_active;	int reset_and_enabled;	int rx_allocated;	int tx_allocated;	unsigned short hash_use_count[64];	unsigned short hash_table_mask[4];};typedef struct bmac_reg_entry {	char *name;	unsigned short reg_offset;} bmac_reg_entry_t;#define N_REG_ENTRIES 31bmac_reg_entry_t reg_entries[N_REG_ENTRIES] = {	{"MEMADD", MEMADD},	{"MEMDATAHI", MEMDATAHI},	{"MEMDATALO", MEMDATALO},	{"TXPNTR", TXPNTR},	{"RXPNTR", RXPNTR},	{"IPG1", IPG1},	{"IPG2", IPG2},	{"ALIMIT", ALIMIT},	{"SLOT", SLOT},	{"PALEN", PALEN},	{"PAPAT", PAPAT},	{"TXSFD", TXSFD},	{"JAM", JAM},	{"TXCFG", TXCFG},	{"TXMAX", TXMAX},	{"TXMIN", TXMIN},	{"PAREG", PAREG},	{"DCNT", DCNT},	{"NCCNT", NCCNT},	{"NTCNT", NTCNT},	{"EXCNT", EXCNT},	{"LTCNT", LTCNT},	{"TXSM", TXSM},	{"RXCFG", RXCFG},	{"RXMAX", RXMAX},	{"RXMIN", RXMIN},	{"FRCNT", FRCNT},	{"AECNT", AECNT},	{"FECNT", FECNT},	{"RXSM", RXSM},	{"RXCV", RXCV}};struct device *bmac_devs = NULL;static int is_bmac_plus;#if 0/* * If we can't get a skbuff when we need it, we use this area for DMA. */static unsigned char dummy_buf[RX_BUFLEN];#endif/* * Number of bytes of private data per BMAC: allow enough for * the rx and tx dma commands plus a branch dma command each, * and another 16 bytes to allow us to align the dma command * buffers on a 16 byte boundary. */#define PRIV_BYTES	(sizeof(struct bmac_data) \	+ (N_RX_RING + N_TX_RING + 4) * sizeof(struct dbdma_cmd) \	+ sizeof(struct sk_buff_head))static unsigned char bitrev(unsigned char b);static int bmac_open(struct device *dev);static int bmac_close(struct device *dev);static int bmac_transmit_packet(struct sk_buff *skb, struct device *dev);static struct net_device_stats *bmac_stats(struct device *dev);static void bmac_set_multicast(struct device *dev);static int bmac_reset_and_enable(struct device *dev, int enable);static void bmac_start_chip(struct device *dev);static int bmac_init_chip(struct device *dev);static void bmac_init_registers(struct device *dev);static void bmac_reset_chip(struct device *dev);static int bmac_set_address(struct device *dev, void *addr);static void bmac_misc_intr(int irq, void *dev_id, struct pt_regs *regs);static void bmac_txdma_intr(int irq, void *dev_id, struct pt_regs *regs);static void bmac_rxdma_intr(int irq, void *dev_id, struct pt_regs *regs);static void bmac_set_timeout(struct device *dev);static void bmac_tx_timeout(unsigned long data);static int bmac_proc_info ( char *buffer, char **start, off_t offset, int length, int dummy);static int bmac_output(struct sk_buff *skb, struct device *dev);static void bmac_start(struct device *dev);#define	DBDMA_SET(x)	( ((x) | (x) << 16) )#define	DBDMA_CLEAR(x)	( (x) << 16)static __inline__ voiddbdma_st32(volatile unsigned long *a, unsigned long x){	__asm__ volatile( "stwbrx %0,0,%1" : : "r" (x), "r" (a) : "memory");	return;}static __inline__ unsigned longdbdma_ld32(volatile unsigned long *a){	unsigned long swap;	__asm__ volatile ("lwbrx %0,0,%1" :  "=r" (swap) : "r" (a));	return swap;}voiddbdma_stop(volatile struct dbdma_regs *dmap){	dbdma_st32((volatile unsigned long *)&dmap->control, DBDMA_CLEAR(RUN) | DBDMA_SET(FLUSH));	eieio();  	while (dbdma_ld32((volatile unsigned long *)&dmap->status) & (ACTIVE|FLUSH))		eieio();}static voiddbdma_continue(volatile struct dbdma_regs *dmap){	dbdma_st32((volatile unsigned long *)&dmap->control,		   DBDMA_SET(RUN|WAKE) | DBDMA_CLEAR(PAUSE|DEAD));	eieio();}static voiddbdma_reset(volatile struct dbdma_regs *dmap){	dbdma_st32((volatile unsigned long *)&dmap->control, 		   DBDMA_CLEAR(ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN));      	eieio();	while (dbdma_ld32((volatile unsigned long *)&dmap->status) & RUN) eieio();}static voiddbdma_setcmd(volatile struct dbdma_cmd *cp,	     unsigned short cmd, unsigned count, unsigned long addr,	     unsigned long cmd_dep){	out_le16(&cp->command, cmd);	out_le16(&cp->req_count, count);	out_le32(&cp->phy_addr, addr);	out_le32(&cp->cmd_dep, cmd_dep);	out_le16(&cp->xfer_status, 0);	out_le16(&cp->res_count, 0);}static __inline__void bmwrite(struct device *dev, unsigned long reg_offset, unsigned data ){	out_le16((void *)dev->base_addr + reg_offset, data);}static __inline__volatile unsigned short bmread(struct device *dev, unsigned long reg_offset ){	return in_le16((void *)dev->base_addr + reg_offset); }static voidbmac_reset_chip(struct device *dev){	struct bmac_data *bp = (struct bmac_data *) dev->priv;	volatile struct dbdma_regs *rd = bp->rx_dma;	volatile struct dbdma_regs *td = bp->tx_dma;	 	dbdma_reset(rd);	dbdma_reset(td);	feature_set(bp->node, FEATURE_BMac_IO_enable);	udelay(10000);	feature_set(bp->node, FEATURE_BMac_reset);	udelay(10000);	feature_clear(bp->node, FEATURE_BMac_reset);	udelay(10000);}#define MIFDELAY	udelay(500)static unsigned intbmac_mif_readbits(struct device *dev, int nb){	unsigned int val = 0;	while (--nb >= 0) {		bmwrite(dev, MIFCSR, 0);		MIFDELAY;		if (bmread(dev, MIFCSR) & 8)			val |= 1 << nb;		bmwrite(dev, MIFCSR, 1);		MIFDELAY;	}	bmwrite(dev, MIFCSR, 0);	MIFDELAY;	bmwrite(dev, MIFCSR, 1);	MIFDELAY;	return val;}static voidbmac_mif_writebits(struct device *dev, unsigned int val, int nb){	int b;	while (--nb >= 0) {		b = (val & (1 << nb))? 6: 4;		bmwrite(dev, MIFCSR, b);		MIFDELAY;		bmwrite(dev, MIFCSR, b|1);		MIFDELAY;	}}static unsigned intbmac_mif_read(struct device *dev, unsigned int addr){	unsigned int val;	bmwrite(dev, MIFCSR, 4);	MIFDELAY;	bmac_mif_writebits(dev, ~0U, 32);	bmac_mif_writebits(dev, 6, 4);	bmac_mif_writebits(dev, addr, 10);	bmwrite(dev, MIFCSR, 2);	MIFDELAY;	bmwrite(dev, MIFCSR, 1);	MIFDELAY;	val = bmac_mif_readbits(dev, 17);	bmwrite(dev, MIFCSR, 4);	MIFDELAY;	/* printk(KERN_DEBUG "bmac_mif_read(%x) -> %x\n", addr, val); */	return val;}static voidbmac_mif_write(struct device *dev, unsigned int addr, unsigned int val){	bmwrite(dev, MIFCSR, 4);	MIFDELAY;	bmac_mif_writebits(dev, ~0U, 32);	bmac_mif_writebits(dev, 5, 4);	bmac_mif_writebits(dev, addr, 10);	bmac_mif_writebits(dev, 2, 2);	bmac_mif_writebits(dev, val, 16);	bmac_mif_writebits(dev, 3, 2);}static voidbmac_init_registers(struct device *dev){	struct bmac_data *bp = (struct bmac_data *) dev->priv;	volatile unsigned short regValue;	unsigned short *pWord16;	int i;	/* XXDEBUG(("bmac: enter init_registers\n")); */	bmwrite(dev, RXRST, RxResetValue);	bmwrite(dev, TXRST, TxResetBit);	i = 100;	do {		--i;		udelay(10000);		regValue = bmread(dev, TXRST); /* wait for reset to clear..acknowledge */	} while ((regValue & TxResetBit) && i > 0);	if (!is_bmac_plus) {		regValue = bmread(dev, XCVRIF);		regValue |= ClkBit | SerialMode | COLActiveLow;		bmwrite(dev, XCVRIF, regValue);		udelay(10000);	}	bmwrite(dev, RSEED, (unsigned short)0x1968);			regValue = bmread(dev, XIFC);	regValue |= TxOutputEnable;	bmwrite(dev, XIFC, regValue);	bmread(dev, PAREG);	/* set collision counters to 0 */	bmwrite(dev, NCCNT, 0);	bmwrite(dev, NTCNT, 0);	bmwrite(dev, EXCNT, 0);	bmwrite(dev, LTCNT, 0);	/* set rx counters to 0 */	bmwrite(dev, FRCNT, 0);	bmwrite(dev, LECNT, 0);	bmwrite(dev, AECNT, 0);	bmwrite(dev, FECNT, 0);	bmwrite(dev, RXCV, 0);	/* set tx fifo information */	bmwrite(dev, TXTH, 4);	/* 4 octets before tx starts */	bmwrite(dev, TXFIFOCSR, 0);	/* first disable txFIFO */	bmwrite(dev, TXFIFOCSR, TxFIFOEnable );	/* set rx fifo information */	bmwrite(dev, RXFIFOCSR, 0);	/* first disable rxFIFO */	bmwrite(dev, RXFIFOCSR, RxFIFOEnable ); 	//bmwrite(dev, TXCFG, TxMACEnable);	       	/* TxNeverGiveUp maybe later */	bmread(dev, STATUS);		/* read it just to clear it */	/* zero out the chip Hash Filter registers */	for (i=0; i<4; i++) bp->hash_table_mask[i] = 0;	bmwrite(dev, BHASH3, bp->hash_table_mask[0]); 	/* bits 15 - 0 */	bmwrite(dev, BHASH2, bp->hash_table_mask[1]); 	/* bits 31 - 16 */	bmwrite(dev, BHASH1, bp->hash_table_mask[2]); 	/* bits 47 - 32 */	bmwrite(dev, BHASH0, bp->hash_table_mask[3]); 	/* bits 63 - 48 */		pWord16 = (unsigned short *)dev->dev_addr;	bmwrite(dev, MADD0, *pWord16++);	bmwrite(dev, MADD1, *pWord16++);	bmwrite(dev, MADD2, *pWord16);	bmwrite(dev, RXCFG, RxCRCNoStrip | RxHashFilterEnable | RxRejectOwnPackets);	bmwrite(dev, INTDISABLE, EnableNormal);	return;}#if 0static voidbmac_disable_interrupts(struct device *dev){	bmwrite(dev, INTDISABLE, DisableAll);}static voidbmac_enable_interrupts(struct device *dev){	bmwrite(dev, INTDISABLE, EnableNormal);}#endifstatic voidbmac_start_chip(struct device *dev){	struct bmac_data *bp = (struct bmac_data *) dev->priv;	volatile struct dbdma_regs *rd = bp->rx_dma;	unsigned short	oldConfig;	/* enable rx dma channel */	dbdma_continue(rd); 	oldConfig = bmread(dev, TXCFG);			bmwrite(dev, TXCFG, oldConfig | TxMACEnable );    	/* turn on rx plus any other bits already on (promiscuous possibly) */	oldConfig = bmread(dev, RXCFG);			bmwrite(dev, RXCFG, oldConfig | RxMACEnable ); 	udelay(20000);}static intbmac_init_chip(struct device *dev){	if (is_bmac_plus && bmac_mif_read(dev, 2) == 0x7810) {		if (bmac_mif_read(dev, 4) == 0xa1) {			bmac_mif_write(dev, 0, 0x1000);		} else {			bmac_mif_write(dev, 4, 0xa1);			bmac_mif_write(dev, 0, 0x1200);		}#if 0		/* XXX debugging */		bmac_mif_read(dev, 0);		bmac_mif_read(dev, 4);#endif	}	bmac_init_registers(dev);	return 1;}static int bmac_set_address(struct device *dev, void *addr){	unsigned char *p = addr;	unsigned short *pWord16;	unsigned long flags;	int i;	XXDEBUG(("bmac: enter set_address\n"));	save_flags(flags); cli();	for (i = 0; i < 6; ++i) {		dev->dev_addr[i] = p[i];	}	/* load up the hardware address */	pWord16  = (unsigned short *)dev->dev_addr;	bmwrite(dev, MADD0, *pWord16++);	bmwrite(dev, MADD1, *pWord16++);	bmwrite(dev, MADD2, *pWord16);	restore_flags(flags);	XXDEBUG(("bmac: exit set_address\n"));	return 0;}static inline void bmac_set_timeout(struct device *dev){	struct bmac_data *bp = (struct bmac_data *) dev->priv;	unsigned long flags;	save_flags(flags);	cli();	if (bp->timeout_active)		del_timer(&bp->tx_timeout);	bp->tx_timeout.expires = jiffies + TX_TIMEOUT;	bp->tx_timeout.function = bmac_tx_timeout;	bp->tx_timeout.data = (unsigned long) dev;	add_timer(&bp->tx_timeout);	bp->timeout_active = 1;	restore_flags(flags);}static voidbmac_construct_xmt(struct sk_buff *skb, volatile struct dbdma_cmd *cp){	void *vaddr;	unsigned long baddr;	unsigned long len;	len = skb->len;	vaddr = skb->data;	baddr = virt_to_bus(vaddr);	dbdma_setcmd(cp, (OUTPUT_LAST | INTR_ALWAYS | WAIT_IFCLR), len, baddr, 0);}static voidbmac_construct_rxbuff(unsigned char *addr, volatile struct dbdma_cmd *cp){	dbdma_setcmd(cp, (INPUT_LAST | INTR_ALWAYS), RX_BUFLEN, virt_to_bus(addr), 0);}/* Bit-reverse one byte of an ethernet hardware address. */static unsigned charbitrev(unsigned char b){	int d = 0, i;	for (i = 0; i < 8; ++i, b >>= 1)		d = (d << 1) | (b & 1);	return d;}