?? 1602test.lst
字號:
01BD E18A LDI R24,0x1A
01BE 93800080 STS 0x80,R24
(0132) d_a_s(0,str1);
01C0 E620 LDI R18,0x60
01C1 E030 LDI R19,0
01C2 2700 CLR R16
01C3 D14A RCALL _d_a_s
(0133) d_a_s(1,str2);
01C4 E721 LDI R18,0x71
01C5 E030 LDI R19,0
01C6 E001 LDI R16,1
01C7 D146 RCALL _d_a_s
(0134)
(0135) delay_nms(1000);
01C8 EE08 LDI R16,0xE8
01C9 E013 LDI R17,3
01CA D17D RCALL _delay_nms
(0136) PORTC=0X00;
01CB 2422 CLR R2
01CC BA25 OUT 0x15,R2
(0137) delay_nms(1000);
01CD EE08 LDI R16,0xE8
01CE E013 LDI R17,3
01CF D178 RCALL _delay_nms
(0138) d_a_s(1,str2);
01D0 E721 LDI R18,0x71
01D1 E030 LDI R19,0
01D2 E001 LDI R16,1
01D3 D13A RCALL _d_a_s
01D4 CF13 RJMP 0x00E8
(0139) }
(0140) }
01D5 9508 RET
(0141) void adc_init(void)
(0142) {
(0143) DDRA=0x00;
_adc_init:
01D6 2422 CLR R2
01D7 BA2A OUT 0x1A,R2
(0144) PORTA=0x00;
01D8 BA2B OUT 0x1B,R2
(0145) ADCSRA = 0x00;
01D9 B826 OUT 0x06,R2
(0146) ADMUX =(1<<REFS0)|(adc_mux&0x0f);//選擇內部AVCC為基準
01DA 918000A7 LDS R24,_adc_mux
01DC 708F ANDI R24,0xF
01DD 6480 ORI R24,0x40
01DE B987 OUT 0x07,R24
(0147) ACSR =(1<<ACD);//關閉模擬比較器
01DF E880 LDI R24,0x80
01E0 B988 OUT 0x08,R24
(0148) ADCSRA=(1<<ADEN)|(1<<ADSC)|(1<<ADPS2)|(1<<ADPS1) ;//64分頻
01E1 EC86 LDI R24,0xC6
01E2 B986 OUT 0x06,R24
(0149) }
01E3 9508 RET
_hex_asc:
g --> R20
dt_meas --> R22
01E4 940E038F CALL push_gset2
01E6 01A9 MOVW R20,R18
01E7 01B8 MOVW R22,R16
(0150)
(0151) //將無符號的整形數轉換為asc碼，保存于指針g開始的連續四個空間
(0152) void hex_asc(unsigned int dt_meas,unsigned char *g)
(0153) {
(0154) *g=(unsigned char)(dt_meas/0x1000);
01E8 E02C LDI R18,0xC
01E9 E030 LDI R19,0
01EA 018B MOVW R16,R22
01EB 940E039B CALL lsr16
01ED 01FA MOVW R30,R20
01EE 8300 STD Z+0,R16
(0155) if(*g<10)
01EF 8180 LDD R24,Z+0
01F0 308A CPI R24,0xA
01F1 F418 BCC 0x01F5
(0156) *g+=0x30;
01F2 5D80 SUBI R24,0xD0
01F3 8380 STD Z+0,R24
01F4 C004 RJMP 0x01F9
(0157) else *g+=0x37;
01F5 01FA MOVW R30,R20
01F6 8180 LDD R24,Z+0
01F7 5C89 SUBI R24,0xC9
01F8 8380 STD Z+0,R24
(0158) g++;
01F9 5F4F SUBI R20,0xFF
01FA 4F5F SBCI R21,0xFF
(0159) *g=(unsigned char)((dt_meas/0x100)%0x10);
01FB 01CB MOVW R24,R22
01FC 2F89 MOV R24,R25
01FD 2799 CLR R25
01FE 708F ANDI R24,0xF
01FF 7090 ANDI R25,0
0200 01FA MOVW R30,R20
0201 8380 STD Z+0,R24
(0160) if(*g<10)
0202 308A CPI R24,0xA
0203 F418 BCC 0x0207
(0161) *g+=0x30;
0204 5D80 SUBI R24,0xD0
0205 8380 STD Z+0,R24
0206 C004 RJMP 0x020B
(0162) else *g+=0x37;
0207 01FA MOVW R30,R20
0208 8180 LDD R24,Z+0
0209 5C89 SUBI R24,0xC9
020A 8380 STD Z+0,R24
(0163) g++;
020B 5F4F SUBI R20,0xFF
020C 4F5F SBCI R21,0xFF
(0164) *g=(dt_meas%0x100)/0x10;
020D 01CB MOVW R24,R22
020E 7090 ANDI R25,0
020F 9596 LSR R25
0210 9587 ROR R24
0211 9596 LSR R25
0212 9587 ROR R24
0213 9596 LSR R25
0214 9587 ROR R24
0215 9596 LSR R25
0216 9587 ROR R24
0217 01FA MOVW R30,R20
0218 8380 STD Z+0,R24
(0165) if(*g<10)
0219 308A CPI R24,0xA
021A F418 BCC 0x021E
(0166) *g+=0x30;
021B 5D80 SUBI R24,0xD0
021C 8380 STD Z+0,R24
021D C004 RJMP 0x0222
(0167) else *g+=0x37;
021E 01FA MOVW R30,R20
021F 8180 LDD R24,Z+0
0220 5C89 SUBI R24,0xC9
0221 8380 STD Z+0,R24
(0168) g++;
0222 5F4F SUBI R20,0xFF
0223 4F5F SBCI R21,0xFF
(0169) *g=(dt_meas%0x100)%0x10;
0224 01CB MOVW R24,R22
0225 708F ANDI R24,0xF
0226 7090 ANDI R25,0
0227 01FA MOVW R30,R20
0228 8380 STD Z+0,R24
(0170) if(*g<10)
0229 308A CPI R24,0xA
022A F418 BCC 0x022E
(0171) *g+=0x30;
022B 5D80 SUBI R24,0xD0
022C 8380 STD Z+0,R24
022D C004 RJMP 0x0232
(0172) else *g+=0x37;
022E 01FA MOVW R30,R20
022F 8180 LDD R24,Z+0
0230 5C89 SUBI R24,0xC9
0231 8380 STD Z+0,R24
(0173) }
0232 940E036F CALL pop_gset2
0234 9508 RET
_filter:
q --> Y+1
wendu --> R20
phillp --> R10
ad_temp --> Y+0
y --> R12
maj --> R22
0235 940E0397 CALL push_gset4
0237 2F60 MOV R22,R16
0238 97A4 SBIW R28,0x24
(0174)
(0175) void filter(unsigned char maj)
(0176) { unsigned char *q,y,wendu;
(0177) unsigned int ad_temp[18],phillp=0;
0239 24AA CLR R10
023A 24BB CLR R11
(0178) if(maj!=8)
023B 3068 CPI R22,0x8
023C F409 BNE 0x023E
023D C03C RJMP 0x027A
(0179) {
(0180) ADMUX=0x40+maj;
023E 2F86 MOV R24,R22
023F 5C80 SUBI R24,0xC0
0240 B987 OUT 0x07,R24
(0181) ADCSRA=(1<<ADEN)|(1<<ADSC)|(1<<ADPS2)|(1<<ADPS1) ;//64分頻
0241 EC86 LDI R24,0xC6
0242 B986 OUT 0x06,R24
(0182) for(y=0;y<=16;y++)
0243 24CC CLR R12
0244 C00F RJMP 0x0254
(0183) { ADCSRA |= 0x40; // Start a new A/D conversion
0245 9A36 SBI 0x06,6
(0184) while (!(ADCSRA & (1<<ADIF))); // wait until ADC is ready
0246 9B34 SBIS 0x06,4
0247 CFFE RJMP 0x0246
(0185) ad_temp[y]=ADC&0X3FF;
0248 E082 LDI R24,2
0249 9D8C MUL R24,R12
024A 01F0 MOVW R30,R0
024B 01CE MOVW R24,R28
024C 0FE8 ADD R30,R24
024D 1FF9 ADC R31,R25
024E B184 IN R24,0x04
024F B195 IN R25,0x05
0250 7093 ANDI R25,3
0251 8391 STD Z+1,R25
0252 8380 STD Z+0,R24
0253 94C3 INC R12
0254 E180 LDI R24,0x10
0255 158C CP R24,R12
0256 F770 BCC 0x0245
(0186) }
(0187) for(y=6;y<=13;y++)
0257 E086 LDI R24,6
0258 2EC8 MOV R12,R24
0259 C00B RJMP 0x0265
(0188) phillp+=ad_temp[y];
025A E082 LDI R24,2
025B 9D8C MUL R24,R12
025C 01F0 MOVW R30,R0
025D 01CE MOVW R24,R28
025E 0FE8 ADD R30,R24
025F 1FF9 ADC R31,R25
0260 8020 LDD R2,Z+0
0261 8031 LDD R3,Z+1
0262 0CA2 ADD R10,R2
0263 1CB3 ADC R11,R3
0264 94C3 INC R12
0265 E08D LDI R24,0xD
0266 158C CP R24,R12
0267 F790 BCC 0x025A
(0189) adc_rel=phillp/32;
0268 E025 LDI R18,5
0269 E030 LDI R19,0
026A 0185 MOVW R16,R10
026B 940E039B CALL lsr16
026D 931000A5 STS _adc_rel+1,R17
026F 930000A4 STS _adc_rel,R16
(0190) y=adc_rel;
0271 2EC0 MOV R12,R16
(0191) wendu=t_per[y];
0272 E584 LDI R24,0x54
0273 E090 LDI R25,0
0274 2DEC MOV R30,R12
0275 27FF CLR R31
0276 0FE8 ADD R30,R24
0277 1FF9 ADC R31,R25
0278 9144 LPM R20,0(Z)
(0192) //y=dypass[maj].ad_samp;
(0193) }
0279 C015 RJMP 0x028F
(0194) else {
(0195) channel=PORTD;
027A B222 IN R2,0x12
027B 92200082 STS _channel,R2
(0196) adc_rel=(unsigned int)channel;
027D 2433 CLR R3
027E 923000A5 STS _adc_rel+1,R3
0280 922000A4 STS _adc_rel,R2
(0197) dypass[maj].ad_samp=adc_rel;
0282 E08F LDI R24,0xF
0283 9F86 MUL R24,R22
0284 01F0 MOVW R30,R0
0285 EA88 LDI R24,0xA8
0286 E090 LDI R25,0
0287 0FE8 ADD R30,R24
0288 1FF9 ADC R31,R25
0289 902000A4 LDS R2,_adc_rel
028B 903000A5 LDS R3,_adc_rel+1
028D 8231 STD Z+1,R3
028E 8220 STD Z+0,R2
(0198) }
(0199) // dypass[maj].class_data[0]=" ";
(0200) //dypass[maj].class_data[1]=" ";
(0201) dypass[maj].class_data[2]=0x30+wendu/16;
028F E08F LDI R24,0xF
0290 9F86 MUL R24,R22
0291 01F0 MOVW R30,R0
0292 EB82 LDI R24,0xB2
0293 E090 LDI R25,0
0294 0FE8 ADD R30,R24
0295 1FF9 ADC R31,R25
0296 2F84 MOV R24,R20
0297 9582 SWAP R24
0298 708F ANDI R24,0xF
0299 5D80 SUBI R24,0xD0
029A 8380 STD Z+0,R24
(0202) dypass[maj].class_data[3]=0x30+wendu%16;
029B E08F LDI R24,0xF
029C 9F86 MUL R24,R22
029D 01F0 MOVW R30,R0
029E EB83 LDI R24,0xB3
029F E090 LDI R25,0
02A0 0FE8 ADD R30,R24
02A1 1FF9 ADC R31,R25
02A2 E110 LDI R17,0x10
02A3 2F04 MOV R16,R20
02A4 940E0357 CALL mod8u
02A6 2F80 MOV R24,R16
02A7 5D80 SUBI R24,0xD0
02A8 8380 STD Z+0,R24
(0203)
(0204) }
02A9 96A4 ADIW R28,0x24
02AA 940E0375 CALL pop_gset4
02AC 9508 RET
(0205) /*------------------------------------液晶驅動函數-------------------------------------*/
(0206) //液晶初始化
(0207) void vfd_init(void)
(0208) {
(0209) delay_nms(15);
_vfd_init:
02AD E00F LDI R16,0xF
02AE E010 LDI R17,0
02AF D098 RCALL _delay_nms
(0210) vfd_write_command(0x38,0);//顯示模式設置三次(此時不管vfd空閑與否)
02B0 2722 CLR R18
02B1 E308 LDI R16,0x38
02B2 D01E RCALL _vfd_write_command
(0211) delay_nms(5);
02B3 E005 LDI R16,5
02B4 E010 LDI R17,0
02B5 D092 RCALL _delay_nms
(0212) vfd_write_command(0x38,0);
02B6 2722 CLR R18
02B7 E308 LDI R16,0x38
02B8 D018 RCALL _vfd_write_command
(0213) delay_nms(5);
02B9 E005 LDI R16,5
02BA E010 LDI R17,0
02BB D08C RCALL _delay_nms
(0214) vfd_write_command(0x38,0);
02BC 2722 CLR R18
02BD E308 LDI R16,0x38
02BE D012 RCALL _vfd_write_command
(0215) delay_nms(5);
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