/******************************************************************************\*           Copyright (C) 2000 Texas Instruments Incorporated.*                           All Rights Reserved*------------------------------------------------------------------------------* FILENAME...... csl_chiphal.h* DATE CREATED.. 14 Aug 2000* LAST MODIFIED. 14 Jan 2004 Adding support for DRI300 versions (6410, 6413)*                05 Aug 2003 Removing external control cregisters EM,ER,IN,OUT and DIER.*                26 Jun 2003 Added support for 6411*                17 Jun 2003 Added support for 6712C*                28 May 2003 Added support for 6711C*                05 Nov 2001 DM642 , 6411 remove 6400*                03 Oct 2001 - CHIP_6713 - MCASP_SUPPORT - IIC_SUPPORT*                           - DEVCFG register*                           - redefinition of CHIP_RSET() / CHIP_RGET()*                           - new CHIP_CRSET() / CHIP_CRGET() => modification of csl_irq.h*                04 Apr 2004-  Removing external control cregisters EM,ER,IN,OUT and DIER.*                12 Jan 2005-  Removing external control cregisters FMCR,FADCR,FAUCR and GFPGFR*------------------------------------------------------------------------------* REGISTERS** CSR    - control/status register* IFR    - interrupt flag register* ISR    - interrupt set register* ICR    - interrupt clear register* IER    - interrupt enable register* ISTP   - interrupt service table pointer register* IRP    - interrupt return pointer* NRP    - non-maskable interrupt return pointer* AMR    - addressing mode reister* DEVCFG - Device Configuration register  (4)* DEVSTAT - Device Status Register (5)* JTAGID - JTAG ID register (5)** (1) only supported on 67xx* (2) only supported on floating point devices* (3) only supported on 6411/14/15/16 devices* (4) only supported on 6713/DA610/DM642/6412/6711C/6712C devices* (5) only supported on DM642/6412/6410/6413 devices*\******************************************************************************/#ifndef _CSL_CHIPHAL_H_#define _CSL_CHIPHAL_H_#include <csl_stdinc.h>/******************************************************************************\* CHIP identification section\******************************************************************************/#ifdef CHIP_BASELINE  #undef CHIP_BASELINE  #define CHIP_BASELINE 1#else  #define CHIP_BASELINE 0#endif#if (CHIP_BASELINE)  #define CHIP_6201 1#endif#ifdef CHIP_6201  #undef CHIP_6201  #define CHIP_6201 1#else  #define CHIP_6201 0#endif#ifdef CHIP_6202  #undef CHIP_6202  #define CHIP_6202 1#else  #define CHIP_6202 0#endif#ifdef CHIP_6203  #undef CHIP_6203  #define CHIP_6203 1#else  #define CHIP_6203 0#endif#ifdef CHIP_6204  #undef CHIP_6204  #define CHIP_6204 1#else  #define CHIP_6204 0#endif#ifdef CHIP_6205  #undef CHIP_6205  #define CHIP_6205 1#else  #define CHIP_6205 0#endif#ifdef CHIP_6211  #undef CHIP_6211  #define CHIP_6211 1#else  #define CHIP_6211 0#endif#ifdef CHIP_6701  #undef CHIP_6701  #define CHIP_6701 1#else  #define CHIP_6701 0#endif#ifdef CHIP_6711  #undef CHIP_6711  #define CHIP_6711 1#else  #define CHIP_6711 0#endif#ifdef CHIP_6712  #undef CHIP_6712  #define CHIP_6712 1#else  #define CHIP_6712 0#endif#ifdef CHIP_6713  #undef CHIP_6713  #define CHIP_6713 1#else  #define CHIP_6713 0#endif#ifdef CHIP_DA610  #undef CHIP_DA610  #define CHIP_DA610 1#else  #define CHIP_DA610 0#endif#ifdef CHIP_DM642  #undef CHIP_DM642  #define CHIP_DM642 1#else  #define CHIP_DM642 0#endif#ifdef CHIP_DM641  #undef CHIP_DM641  #define CHIP_DM641 1#else  #define CHIP_DM641 0#endif#ifdef CHIP_DM640  #undef CHIP_DM640  #define CHIP_DM640 1#else  #define CHIP_DM640 0#endif#ifdef CHIP_6412  #undef CHIP_6412  #define CHIP_6412 1#else  #define CHIP_6412 0#endif#ifdef CHIP_6414  #undef CHIP_6414  #define CHIP_6414 1#else  #define CHIP_6414 0#endif#ifdef CHIP_6415  #undef CHIP_6415  #define CHIP_6415 1#else  #define CHIP_6415 0#endif#ifdef CHIP_6416  #undef CHIP_6416  #define CHIP_6416 1#else  #define CHIP_6416 0#endif#ifdef CHIP_6711C  #undef CHIP_6711C  #define CHIP_6711C 1#else  #define CHIP_6711C 0#endif#ifdef CHIP_6712C  #undef CHIP_6712C  #define CHIP_6712C 1#else  #define CHIP_6712C 0#endif#ifdef CHIP_6411  #undef CHIP_6411  #define CHIP_6411 1#else  #define CHIP_6411 0#endif/* next two are DRI300 versions */#ifdef CHIP_6410  #undef CHIP_6410  #define CHIP_6410 1#else  #define CHIP_6410 0#endif#ifdef CHIP_6413  #undef CHIP_6413  #define CHIP_6413 1#else  #define CHIP_6413 0#endif#ifdef CHIP_6418  #undef CHIP_6418  #define CHIP_6418 1#else  #define CHIP_6418 0#endif#define CHIP_OROFALL (\  CHIP_6201 | \  CHIP_6202 | \  CHIP_6203 | \  CHIP_6204 | \  CHIP_6205 | \  CHIP_6211 | \  CHIP_6701 | \  CHIP_6711 | \  CHIP_6712 | \  CHIP_6713 | \  CHIP_DA610 | \  CHIP_DM642 | \  CHIP_DM641 | \  CHIP_DM640 | \  CHIP_6412 | \  CHIP_6414 | \  CHIP_6415 | \  CHIP_6416 |  \  CHIP_6711C | \  CHIP_6712C | \  CHIP_6411 |\  CHIP_6410 |\  CHIP_6413 |\  CHIP_6418 \)#if (CHIP_OROFALL==0)  #error NO CHIP DEFINED (use -dCHIP_XXXX where XXXX is chip number, i.e. 6201)#endif#define CHIP_NONE 0#define CHIP_SUPPORT(c0,c1,c2,c3,c4,c5,c6,c7,c8,c9,c10,c11,c12,c13,c14,c15,c16,c17,c18,c19,c20,c21,c22,c23,c24) ( \  ( c0*CHIP_6201)  | \  ( c1*CHIP_6202)  | \  ( c2*CHIP_6203)  | \  ( c3*CHIP_6204)  | \  ( c4*CHIP_6205)  | \  ( c5*CHIP_6211)  | \  ( c6*CHIP_6701)  | \  ( c7*CHIP_6711)  | \  ( c8*CHIP_6712)  | \  ( c9*CHIP_6713)  | \  ( c10*CHIP_DA610)| \  ( c11*CHIP_DM642)| \  ( c12*CHIP_DM641)| \  ( c13*CHIP_DM640)| \  ( c14*CHIP_6412) | \  ( c15*CHIP_6414) | \  ( c16*CHIP_6415) | \  ( c17*CHIP_6416) | \  ( c18*CHIP_6711C) | \  ( c19*CHIP_6712C) | \  ( c20*CHIP_6411) | \  ( c21*CHIP_6410) | \  ( c22*CHIP_6413) | \  ( c23*CHIP_6418) | \  ( c24*CHIP_NONE)   \ )/*---------------------------------------------------------------------------------------*//*                                     6 6 6 6 6 6 6 6 6 6 D D D D 6 6 6 6 6 6 6 6 6 6 N *//*                                     2 2 2 2 2 2 7 7 7 7 A M M M 4 4 4 4 7 7 4 4 4 4 O *//*                                     0 0 0 0 0 1 0 1 1 1 6 6 6 6 1 1 1 1 1 1 1 1 1 1 N *//*                                     1 2 3 4 5 1 1 1 2 3 1 4 4 4 2 4 5 6 1 2 1 0 3 8 E *//*                                                         0 2 1 0         C C           *//*---------------------------------------------------------------------------------------*/#define CACHE_SUPPORT     CHIP_SUPPORT(1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0)#define DMA_SUPPORT       CHIP_SUPPORT(1,1,1,1,1,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0)#define EDMA_SUPPORT      CHIP_SUPPORT(0,0,0,0,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0)#define EMIF_SUPPORT      CHIP_SUPPORT(1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,0,0,0,0,0)#define EMIFA_SUPPORT     CHIP_SUPPORT(0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,0,0,1,1,1,1,0)#define EMIFB_SUPPORT     CHIP_SUPPORT(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,0,0,0,0,0,0,0)#define GPIO_SUPPORT      CHIP_SUPPORT(0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0)#define HPI_SUPPORT       CHIP_SUPPORT(1,0,0,0,0,1,1,1,0,1,1,1,1,0,1,1,1,1,1,0,1,1,1,1,0)#define I2C_SUPPORT       CHIP_SUPPORT(0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,0,0,0,0,0,0,1,1,1,0)#define IRQ_SUPPORT       CHIP_SUPPORT(1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0)#define MCASP_SUPPORT     CHIP_SUPPORT(0,0,0,0,0,0,0,0,0,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,0)#define MCBSP_SUPPORT     CHIP_SUPPORT(1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0)#define PLL_SUPPORT       CHIP_SUPPORT(0,0,0,0,0,0,0,0,0,1,1,0,0,0,1,0,0,0,1,1,0,0,0,0,0)#define TIMER_SUPPORT     CHIP_SUPPORT(1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0)#define XBUS_SUPPORT      CHIP_SUPPORT(0,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0)#define PCI_SUPPORT       CHIP_SUPPORT(0,0,0,0,1,0,0,0,0,0,0,1,0,0,1,0,1,1,0,0,1,0,0,0,0)/*---------------------------------------------------------------------------------------*//*                                     6 6 6 6 6 6 6 6 6 6 D D D D 6 6 6 6 6 6 6 6 6 6 N *//*                                     2 2 2 2 2 2 7 7 7 7 A M M M 4 4 4 4 7 7 4 4 4 4 O *//*                                     0 0 0 0 0 1 0 1 1 1 6 6 6 6 1 1 1 1 1 1 1 1 1 1 N *//*                                     1 2 3 4 5 1 1 1 2 3 1 4 4 4 2 4 5 6 1 2 1 0 3 8 E *//*                                                         0 2 1 0         C C           *//*---------------------------------------------------------------------------------------*/#define VP_SUPPORT        CHIP_SUPPORT(0,0,0,0,0,0,0,0,0,0,0,1,1,1,0,0,0,0,0,0,0,0,0,0,0)#define VIC_SUPPORT       CHIP_SUPPORT(0,0,0,0,0,0,0,0,0,0,0,1,1,1,0,0,0,0,0,0,0,0,0,0,0)#define DAT_SUPPORT       CHIP_SUPPORT(1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0)#define PWR_SUPPORT       CHIP_SUPPORT(1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0)#define UTOP_SUPPORT      CHIP_SUPPORT(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,0,0,0,0,0,0,0)#define TCP_SUPPORT       CHIP_SUPPORT(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0)#define VCP_SUPPORT       CHIP_SUPPORT(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,0,0,0,0,1,0)#define EMAC_SUPPORT      CHIP_SUPPORT(0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0,0,0)#define MDIO_SUPPORT      CHIP_SUPPORT(0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0,0,0)#define EMU_SUPPORT	  CHIP_SUPPORT(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0)                                                                                       #define L2CACHE_SUPPORT   CHIP_SUPPORT(0,0,0,0,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0)#define TC_SUPPORT        CHIP_SUPPORT(0,0,0,0,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0)#define FPU_SUPPORT       CHIP_SUPPORT(0,0,0,0,0,0,1,1,1,1,1,0,0,0,0,0,0,0,1,1,0,0,0,0,0)#define C01_SUPPORT       CHIP_SUPPORT(1,1,1,1,1,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0)#define C11_SUPPORT       CHIP_SUPPORT(0,0,0,0,0,1,0,1,1,1,1,0,0,0,0,0,0,0,1,1,0,0,0,0,0)#define C64_SUPPORT       CHIP_SUPPORT(0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,0,0,1,1,1,1,0)#define ATL_SUPPORT       CHIP_SUPPORT(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,0)#define CACHE_L2_SUPPORT  L2CACHE_SUPPORT/*----------------------------------------------------------------------*//******************************************************************************\* module level register/field access macros\******************************************************************************/  /* ----------------- */  /* FIELD MAKE MACROS */  /* ----------------- */  #define CHIP_FMK(REG,FIELD,x)\    _PER_FMK(CHIP,##REG,##FIELD,x)  #define CHIP_FMKS(REG,FIELD,SYM)\    _PER_FMKS(CHIP,##REG,##FIELD,##SYM)