?? csl_chiphal.h
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#define _CHIP_DEVCFG_EKSRC_MASK 0x00000010u #define _CHIP_DEVCFG_EKSRC_SHIFT 0x00000004u #define CHIP_DEVCFG_EKSRC_DEFAULT 0x00000000u #define CHIP_DEVCFG_EKSRC_OF(x) _VALUEOF(x) #define CHIP_DEVCFG_EKSRC_SYSCLK3 0x00000000u #define CHIP_DEVCFG_EKSRC_ECLKIN 0x00000001u #define CHIP_DEVCFG_OF(x) _VALUEOF(x) #define CHIP_DEVCFG_DEFAULT (Uint32)( \ _PER_FDEFAULT(CHIP,DEVCFG,EKSRC) \ ) #define CHIP_DEVCFG_RMK(eksrc) (Uint32)( \ _PER_FMK(CHIP,DEVCFG,EKSRC,eksrc) \)#endif /* CHIP_6711C || CHIP_6712C */ #define _CHIP_DEVCFG_FGET(FIELD)\ _PER_FGET(_CHIP_DEVCFG_ADDR,CHIP,DEVCFG,##FIELD) #define _CHIP_DEVCFG_FSET(FIELD,field)\ _PER_FSET(_CHIP_DEVCFG_ADDR,CHIP,DEVCFG,##FIELD,field) #define _CHIP_DEVCFG_FSETS(FIELD,SYM)\ _PER_FSETS(_CHIP_DEVCFG_ADDR,CHIP,DEVCFG,##FIELD,##SYM)/*----------------------------------------------------------------------------*//******************************************************************************\* _____________________* | |* | D E V S T A T |* |___________________|** DEVSTAT - Device Status Register (1)** FIELDS (msb -> lsb)* DM642* (r) MACEN* (r) HPIWIDTH* (r) PCIEEAI* (r) PCIEN* (r) CLKMODE* (r) LENDIAN* (r) BOOTMODE* (r) AECLKINSEL** DRI300* (r) PLLM* (r) OSCEXTRES* (r) CLKINSEL* (r) CLKMODE3* (r) HPIWIDTH* (r) HPIENZ* (r) CLKMODE2* (r) CLKMODE1* (r) CLKMODE0* (r) LENDIAN* (r) BOOTMODE* (r) AECLKINSEL** \******************************************************************************/#if (CHIP_DM642 | CHIP_DM641 | CHIP_DM640 | CHIP_6412) #define _CHIP_DEVSTAT_ADDR 0x01B3F004u #define _CHIP_DEVSTAT_OFFSET 0 #define _CHIP_DEVSTAT_MACEN_MASK 0x00000800u #define _CHIP_DEVSTAT_MACEN_SHIFT 0x0000000Bu #define CHIP_DEVSTAT_MACEN_DEFAULT 0x00000000u #define CHIP_DEVSTAT_MACEN_OF(x) _VALUEOF(x) #define CHIP_DEVSTAT_MACEN_DISABLE 0x00000000u #define CHIP_DEVSTAT_MACEN_ENABLE 0x00000001u #if !(CHIP_DM640) #define _CHIP_DEVSTAT_HPIWIDTH_MASK 0x00000400u #define _CHIP_DEVSTAT_HPIWIDTH_SHIFT 0x0000000Au #define CHIP_DEVSTAT_HPIWIDTH_DEFAULT 0x00000000u #define CHIP_DEVSTAT_HPIWIDTH_OF(x) _VALUEOF(x) #define CHIP_DEVSTAT_HPIWIDTH_16 0x00000000u #define CHIP_DEVSTAT_HPIWIDTH_32 0x00000001u #endif #if !(CHIP_DM641 | CHIP_DM640) #define _CHIP_DEVSTAT_PCIEEAI_MASK 0x00000200u #define _CHIP_DEVSTAT_PCIEEAI_SHIFT 0x00000009u #define CHIP_DEVSTAT_PCIEEAI_DEFAULT 0x00000000u #define CHIP_DEVSTAT_PCIEEAI_OF(x) _VALUEOF(x) #define CHIP_DEVSTAT_PCIEEAI_NONE 0x00000000u #define CHIP_DEVSTAT_PCIEEAI_INIT 0x00000001u #define _CHIP_DEVSTAT_PCIEN_MASK 0x00000100u #define _CHIP_DEVSTAT_PCIEN_SHIFT 0x00000008u #define CHIP_DEVSTAT_PCIEN_DEFAULT 0x00000000u #define CHIP_DEVSTAT_PCIEN_OF(x) _VALUEOF(x) #define CHIP_DEVSTAT_PCIEN_DISABLE 0x00000000u #define CHIP_DEVSTAT_PCIEN_ENABLE 0x00000001u #endif #define _CHIP_DEVSTAT_CLKMODE_MASK 0x00000060u #define _CHIP_DEVSTAT_CLKMODE_SHIFT 0x00000005u #define CHIP_DEVSTAT_CLKMODE_DEFAULT 0x00000001u #define CHIP_DEVSTAT_CLKMODE_OF(x) _VALUEOF(x) #define CHIP_DEVSTAT_CLKMODE_X1 0x00000000u #define CHIP_DEVSTAT_CLKMODE_X6 0x00000001u #define CHIP_DEVSTAT_CLKMODE_X12 0x00000002u #define CHIP_DEVSTAT_CLKMODE_X20 0x00000003u #define _CHIP_DEVSTAT_LENDIAN_MASK 0x00000010u #define _CHIP_DEVSTAT_LENDIAN_SHIFT 0x00000004u #define CHIP_DEVSTAT_LENDIAN_DEFAULT 0x00000001u #define CHIP_DEVSTAT_LENDIAN_OF(x) _VALUEOF(x) #define CHIP_DEVSTAT_LENDIAN_BIG 0x00000000u #define CHIP_DEVSTAT_LENDIAN_LITTLE 0x00000001u #define _CHIP_DEVSTAT_BOOTMODE_MASK 0x0000000Cu #define _CHIP_DEVSTAT_BOOTMODE_SHIFT 0x00000002u #define CHIP_DEVSTAT_BOOTMODE_DEFAULT 0x00000000u #define CHIP_DEVSTAT_BOOTMODE_OF(x) _VALUEOF(x) #define CHIP_DEVSTAT_BOOTMODE_NONE 0x00000000u #define CHIP_DEVSTAT_BOOTMODE_HPIPCI 0x00000001u #define CHIP_DEVSTAT_BOOTMODE_EMIFA 0x00000003u #define _CHIP_DEVSTAT_AECLKINSEL_MASK 0x00000003u #define _CHIP_DEVSTAT_AECLKINSEL_SHIFT 0x00000000u #define CHIP_DEVSTAT_AECLKINSEL_DEFAULT 0x00000000u #define CHIP_DEVSTAT_AECLKINSEL_OF(x) _VALUEOF(x) #define CHIP_DEVSTAT_AECLKINSEL_ECLKIN 0x00000000u #define CHIP_DEVSTAT_AECLKINSEL_CLKOUT4 0x00000001u #define CHIP_DEVSTAT_AECLKINSEL_CLKOUT6 0x00000002u #define CHIP_DEVSTAT_OF(x) _VALUEOF(x) #define CHIP_DEVSTAT_OF(x) _VALUEOF(x) /* Read only Register */ #define _CHIP_DEVSTAT_FGET(FIELD)\ _PER_FGET(_CHIP_DEVSTAT_ADDR,CHIP,DEVSTAT,##FIELD)#endif /* CHIP_DM642 | CHIP_6412 */#if (CHIP_6410 || CHIP_6413 || CHIP_6418) #define _CHIP_DEVSTAT_ADDR 0x01B3F004u #define _CHIP_DEVSTAT_OFFSET 0 #define _CHIP_DEVSTAT_PLLM_MASK 0x00F10000u #define _CHIP_DEVSTAT_PLLM_SHIFT 0x00000013u #define CHIP_DEVSTAT_PLLM_DEFAULT 0x00000000u #define CHIP_DEVSTAT_PLLM_OF(x) _VALUEOF(x) #define CHIP_DEVSTAT_PLLM_BYPASS 0x00000000u #define CHIP_DEVSTAT_PLLM_5 0x00000001u #define CHIP_DEVSTAT_PLLM_6 0x00000002u #define CHIP_DEVSTAT_PLLM_7 0x00000003u #define CHIP_DEVSTAT_PLLM_8 0x00000004u #define CHIP_DEVSTAT_PLLM_9 0x00000005u #define CHIP_DEVSTAT_PLLM_10 0x00000006u #define CHIP_DEVSTAT_PLLM_11 0x00000007u #define CHIP_DEVSTAT_PLLM_12 0x00000008u #define CHIP_DEVSTAT_PLLM_16 0x00000009u #define CHIP_DEVSTAT_PLLM_18 0x0000000Au #define CHIP_DEVSTAT_PLLM_19 0x0000000Bu #define CHIP_DEVSTAT_PLLM_20 0x0000000Cu #define CHIP_DEVSTAT_PLLM_21 0x0000000Du #define CHIP_DEVSTAT_PLLM_22 0x0000000Eu #define CHIP_DEVSTAT_PLLM_24 0x0000000Fu #define _CHIP_DEVSTAT_OSCEXTRES_MASK 0x00020000u #define _CHIP_DEVSTAT_OSCEXTRES_SHIFT 0x00000011u #define CHIP_DEVSTAT_OSCEXTRES_DEFAUL 0x00000001u #define CHIP_DEVSTAT_OSCEXTRES_OF(x) _VALUEOF(x) #define CHIP_DEVSTAT_OSCEXTRES_DISABL 0x00000000u #define CHIP_DEVSTAT_OSCEXTRES_ENABLE 0x00000001u #define _CHIP_DEVSTAT_CLKINSEL_MASK 0x00010000u #define _CHIP_DEVSTAT_CLKINSEL_SHIFT 0x00000010u #define CHIP_DEVSTAT_CLKINSEL_DEFAULT 0x00000000u #define CHIP_DEVSTAT_CLKINSEL_OF(x) _VALUEOF(x) #define CHIP_DEVSTAT_CLKINSEL_DISABLE 0x00000000u #define CHIP_DEVSTAT_CLKINSEL_ENABLE 0x00000001u #define _CHIP_DEVSTAT_HPIWIDTH_MASK 0x00000400u #define _CHIP_DEVSTAT_HPIWIDTH_SHIFT 0x0000000Au #define CHIP_DEVSTAT_HPIWIDTH_DEFAUL 0x00000000u #define CHIP_DEVSTAT_HPIWIDTH_OF(x) _VALUEOF(x) #define CHIP_DEVSTAT_HPIWIDTH_16 0x00000000u #define CHIP_DEVSTAT_HPIWIDTH_32 0x00000001u #define _CHIP_DEVSTAT_HPIENZ_MASK 0x00000100u #define _CHIP_DEVSTAT_HPIENZ_SHIFT 0x00000008u #define CHIP_DEVSTAT_HPIENZ_DEFAULT 0x00000000u #define CHIP_DEVSTAT_HPIENZ_OF(x) _VALUEOF(x) #define CHIP_DEVSTAT_HPIENZ_ENABLE 0x00000000u #define CHIP_DEVSTAT_HPIENZ_DISABLE 0x00000001u #define _CHIP_DEVSTAT_CLKMODE_MASK 0x000010E0u #define _CHIP_DEVSTAT_CLKMODE_SHIFT 0x00000005u #define CHIP_DEVSTAT_CLKMODE_DEFAULT 0x00000001u #define CHIP_DEVSTAT_CLKMODE_OF(x) _VALUEOF(x) #define CHIP_DEVSTAT_CLKMODE_0 0x00000000u #define CHIP_DEVSTAT_CLKMODE_1 0x00000001u #define CHIP_DEVSTAT_CLKMODE_2 0x00000002u #define CHIP_DEVSTAT_CLKMODE_3 0x00000003u #define CHIP_DEVSTAT_CLKMODE_4 0x00000004u #define CHIP_DEVSTAT_CLKMODE_5 0x00000005u #define CHIP_DEVSTAT_CLKMODE_6 0x00000006u #define CHIP_DEVSTAT_CLKMODE_7 0x00000007u #define CHIP_DEVSTAT_CLKMODE_8 0x00000080u #define CHIP_DEVSTAT_CLKMODE_9 0x00000081u #define CHIP_DEVSTAT_CLKMODE_10 0x00000082u #define CHIP_DEVSTAT_CLKMODE_11 0x00000083u #define CHIP_DEVSTAT_CLKMODE_12 0x00000084u #define CHIP_DEVSTAT_CLKMODE_13 0x00000085u #define CHIP_DEVSTAT_CLKMODE_14 0x00000086u #define CHIP_DEVSTAT_CLKMODE_15 0x00000087u #define _CHIP_DEVSTAT_LENDIAN_MASK 0x00000010u #define _CHIP_DEVSTAT_LENDIAN_SHIFT 0x00000004u #define CHIP_DEVSTAT_LENDIAN_DEFAULT 0x00000001u #define CHIP_DEVSTAT_LENDIAN_OF(x) _VALUEOF(x) #define CHIP_DEVSTAT_LENDIAN_BIG 0x00000000u #define CHIP_DEVSTAT_LENDIAN_LITTLE 0x00000001u #define _CHIP_DEVSTAT_BOOTMODE_MASK 0x0000000Cu #define _CHIP_DEVSTAT_BOOTMODE_SHIFT 0x00000002u #define CHIP_DEVSTAT_BOOTMODE_DEFAULT 0x00000000u #define CHIP_DEVSTAT_BOOTMODE_OF(x) _VALUEOF(x) #define CHIP_DEVSTAT_BOOTMODE_NONE 0x00000000u #define CHIP_DEVSTAT_BOOTMODE_HPI 0x00000001u #define CHIP_DEVSTAT_BOOTMODE_EMIFA 0x00000003u #define _CHIP_DEVSTAT_AECLKINSEL_MASK 0x00000003u #define _CHIP_DEVSTAT_AECLKINSEL_SHIFT 0x00000000u #define CHIP_DEVSTAT_AECLKINSEL_DEFAULT 0x00000000u #define CHIP_DEVSTAT_AECLKINSEL_OF(x) _VALUEOF(x) #define CHIP_DEVSTAT_AECLKINSEL_ECLKIN 0x00000000u #define CHIP_DEVSTAT_AECLKINSEL_CLKOUT4 0x00000001u #define CHIP_DEVSTAT_AECLKINSEL_CLKOUT6 0x00000002u #define CHIP_DEVSTAT_OF(x) _VALUEOF(x) /* Read only Register */ #define _CHIP_DEVSTAT_FGET(FIELD)\ _PER_FGET(_CHIP_DEVSTAT_ADDR,CHIP,DEVSTAT,##FIELD)#endif /* CHIP_6410 || CHIP_6413 || CHIP_6418 *//******************************************************************************\* _____________________* | |* | J T A G I D |* |___________________|** JTAGID - JTAG ID register (1)** FIELDS (msb -> lsb)* (r) VARIANT* (r) PART* (r) MANNUFACTURE* (r) LSB** (1) Only for DM642*\******************************************************************************/#if (CHIP_DM642 || CHIP_DM641 || CHIP_DM640 || CHIP_6412 ) #define _CHIP_JTAGID_ADDR 0x01B3F008u #define _CHIP_JTAGID_OFFSET 0 #define _CHIP_JTAGID_VARIANT_MASK 0xF0000000u #define _CHIP_JTAGID_VARIANT_SHIFT 0x0000001Cu #define CHIP_JTAGID_VARIANT_DEFAULT 0x00000000u #define CHIP_JTAGID_VARIANT_OF(x) _VALUEOF(x) #define _CHIP_JTAGID_PART_MASK 0x0FFFF000u #define _CHIP_JTAGID_PART_SHIFT 0x0000000Cu #define CHIP_JTAGID_PART_DEFAULT 0x00000079u #define CHIP_JTAGID_PART_OF(x) _VALUEOF(x) #define _CHIP_JTAGID_MANUFACTURE_MASK 0x00000FFEu #define _CHIP_JTAGID_MANUFACTURE_SHIFT 0x00000001u #define CHIP_JTAGID_MANUFACTURE_DEFAULT 0x00000017u #define CHIP_JTAGID_MANUFACTURE_OF(x) _VALUEOF(x) #define _CHIP_JTAGID_LSB_MASK 0x00000001u #define _CHIP_JTAGID_LSB_SHIFT 0x00000000u #define CHIP_JTAGID_LSB_DEFAULT 0x00000001u #define CHIP_JTAGID_LSB_OF(x) _VALUEOF(x) #define CHIP_JTAGID_OF(x) _VALUEOF(x) #define _CHIP_JTAGID_FGET(FIELD)\ _PER_FGET(_CHIP_JTAGID_ADDR,CHIP,JTAGID,##FIELD)#endif /* CHIP_DM642 || CHIP_6412 *//******************************************************************************\* _____________________* | |* | P C F G L O C K |* |___________________|** PCFGLOCK - Peripheral Configuration Lock register (1)** FIELDS (msb -> lsb)* (r) LOCKSTAT* (w) LOCK** (1) Only for DM642*\******************************************************************************/#if (CHIP_DM642 || CHIP_DM641 || CHIP_DM640 || CHIP_6412 || CHIP_6410 || CHIP_6413 || CHIP_6418) #define _CHIP_PCFGLOCK_ADDR 0x01B3F018u #define _CHIP_PCFGLOCK_OFFSET 0 #define _CHIP_PCFGLOCK_LOCKSTAT_MASK 0x00000001u #define _CHIP_PCFGLOCK_LOCKSTAT_SHIFT 0x00000000u #define CHIP_PCFGLOCK_LOCKSTAT_DEFAULT 0x00000001u #define CHIP_PCFGLOCK_LOCKSTAT_OF(x) _VALUEOF(x) #define CHIP_PCFGLOCK_LOCKSTAT_UNLOCK 0x00000000u #define CHIP_PCFGLOCK_LOCKSTAT_LOCK 0x00000001u #define _CHIP_PCFGLOCK_LOCK_MASK 0xFFFFFFFFu #define _CHIP_PCFGLOCK_LOCK_SHIFT 0x00000000u #define CHIP_PCFGLOCK_LOCK_DEFAULT 0x00000000u #define CHIP_PCFGLOCK_LOCK_OF(x) _VALUEOF(x) #define CHIP_PCFGLOCK_LOCK_UNLOCK 0x10C0010Cu #define CHIP_PCFGLOCK_LOCK_DISABLE 0x10C0010Cu #define CHIP_PCFGLOCK_OF(x) _VALUEOF(x) #define _CHIP_PCFGLOCK_FGET(FIELD)\ _PER_FGET(_CHIP_PCFGLOCK_ADDR,CHIP,PCFGLOCK,##FIELD) #define _CHIP_PCFGLOCK_FSET(FIELD,field)\ _PER_FSET(_CHIP_PCFGLOCK_ADDR,CHIP,PCFGLOCK,##FIELD,field) #define _CHIP_PCFGLOCK_FSETS(FIELD,SYM)\ _PER_FSETS(_CHIP_PCFGLOCK_ADDR,CHIP,PCFGLOCK,##FIELD,##SYM)#endif /* CHIP_DM642 || CHIP_DM641 || CHIP_DM640 || CHIP_6412 || CHIP_6410 || CHIP_6413 || CHIP_6418*//*----------------------------------------------------------------------------*/#endif /* _CSL_CHIPHAL_H_ *//******************************************************************************\* End of csl_chiphal.h\******************************************************************************/?? 快捷鍵說明
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