__text_start:
__start:
    001A EFCF      LDI	R28,0xFF
    001B E0D2      LDI	R29,2
    001C BFCD      OUT	0x3D,R28
    001D BFDE      OUT	0x3E,R29
    001E 51C0      SUBI	R28,0x10
    001F 40D0      SBCI	R29,0
    0020 EA0A      LDI	R16,0xAA
    0021 8308      STD	Y+0,R16
    0022 2400      CLR	R0
    0023 E0E0      LDI	R30,0
    0024 E0F1      LDI	R31,1
    0025 E011      LDI	R17,1
    0026 30E0      CPI	R30,0
    0027 07F1      CPC	R31,R17
    0028 F011      BEQ	0x002B
    0029 9201      ST	R0,Z+
    002A CFFB      RJMP	0x0026
    002B 8300      STD	Z+0,R16
    002C E3E4      LDI	R30,0x34
    002D E0F0      LDI	R31,0
    002E E0A0      LDI	R26,0
    002F E0B1      LDI	R27,1
    0030 E010      LDI	R17,0
    0031 33E4      CPI	R30,0x34
    0032 07F1      CPC	R31,R17
    0033 F021      BEQ	0x0038
    0034 95C8      LPM
    0035 9631      ADIW	R30,1
    0036 920D      ST	R0,X+
    0037 CFF9      RJMP	0x0031
    0038 D048      RCALL	_main
_exit:
    0039 CFFF      RJMP	_exit
_delay:
  i                    --> Y+0
    003A D05F      RCALL	push_gset2
    003B 9724      SBIW	R28,4
FILE: F:\avrprojs\uart_test\uart_test.c
(0001) #include <iom48v.h>
(0002) 
(0003) void delay(void)
(0004) {
(0005)   unsigned long i;
(0006)   for(i=0;i<11142;i++);
    003C E040      LDI	R20,0
    003D E050      LDI	R21,0
    003E E060      LDI	R22,0
    003F E070      LDI	R23,0
    0040 01FE      MOVW	R30,R28
    0041 8340      STD	Z+0,R20
    0042 8351      STD	Z+1,R21
    0043 8362      STD	Z+2,R22
    0044 8373      STD	Z+3,R23
    0045 C012      RJMP	0x0058
    0046 E041      LDI	R20,1
    0047 E050      LDI	R21,0
    0048 E060      LDI	R22,0
    0049 E070      LDI	R23,0
    004A 01FE      MOVW	R30,R28
    004B 8020      LDD	R2,Z+0
    004C 8031      LDD	R3,Z+1
    004D 8042      LDD	R4,Z+2
    004E 8053      LDD	R5,Z+3
    004F 0E24      ADD	R2,R20
    0050 1E35      ADC	R3,R21
    0051 1E46      ADC	R4,R22
    0052 1E57      ADC	R5,R23
    0053 01FE      MOVW	R30,R28
    0054 8220      STD	Z+0,R2
    0055 8231      STD	Z+1,R3
    0056 8242      STD	Z+2,R4
    0057 8253      STD	Z+3,R5
    0058 E846      LDI	R20,0x86
    0059 E25B      LDI	R21,0x2B
    005A E060      LDI	R22,0
    005B E070      LDI	R23,0
    005C 01FE      MOVW	R30,R28
    005D 8020      LDD	R2,Z+0
    005E 8031      LDD	R3,Z+1
    005F 8042      LDD	R4,Z+2
    0060 8053      LDD	R5,Z+3
    0061 1624      CP	R2,R20
    0062 0635      CPC	R3,R21
    0063 0646      CPC	R4,R22
    0064 0657      CPC	R5,R23
    0065 F300      BCS	0x0046
    0066 9624      ADIW	R28,4
    0067 D02A      RCALL	pop_gset2
    0068 9508      RET
(0007) }
(0008) 
(0009) void uart0_init(void)
(0010) {
(0011) 
(0012)  UCSR0B = 0x00; //disable while setting baud rate
_uart0_init:
    0069 2422      CLR	R2
    006A 922000C1  STS	0xC1,R2
(0013)  UCSR0A = 0x00;
    006C 922000C0  STS	0xC0,R2
(0014)  UCSR0C = 0x0E;
    006E E08E      LDI	R24,0xE
    006F 938000C2  STS	0xC2,R24
(0015)  UBRR0L = 0x6; //set baud rate lo
    0071 E086      LDI	R24,6
    0072 938000C4  STS	0xC4,R24
(0016)  UBRR0H = 0x00; //set baud rate hi
    0074 922000C5  STS	0xC5,R2
(0017)  UCSR0B = 0x08;
    0076 E088      LDI	R24,0x8
    0077 938000C1  STS	0xC1,R24
    0079 9508      RET
(0018) //  UBRR0 =0x33;
(0019) //  UCSR0B=0x08;
(0020) //  UCSR0C=0x0e;
(0021) //  UBRR0L=0x6;
(0022) }
(0023) 
(0024) void sendchar(unsigned char c)
(0025) {
(0026)   // while(!(UCSR0A&0x40));
(0027)       UDR0=c;
_sendchar:
  c                    --> R16
    007A 930000C6  STS	0xC6,R16
(0028) 	  while(!(UCSR0A&0x40));
    007C 902000C0  LDS	R2,0xC0
    007E FE26      SBRS	R2,6
    007F CFFC      RJMP	0x007C
    0080 9508      RET
(0029) }
(0030) 
(0031) main()
(0032) {
(0033)  int i;
(0034)  uart0_init();
_main:
  i                    --> R20
    0081 DFE7      RCALL	_uart0_init
    0082 C00D      RJMP	0x0090
(0035)  while(1)
(0036)  {
(0037)    delay();
    0083 DFB6      RCALL	_delay
(0038)   
(0039)    sendchar('0'+i);
    0084 2F04      MOV	R16,R20
    0085 5D00      SUBI	R16,0xD0
    0086 4F1F      SBCI	R17,0xFF
    0087 DFF2      RCALL	_sendchar
(0040)    i=i+1;
    0088 5F4F      SUBI	R20,0xFF
    0089 4F5F      SBCI	R21,0xFF
(0041)    if(i>=10)
    008A 304A      CPI	R20,0xA
    008B E0E0      LDI	R30,0
    008C 075E      CPC	R21,R30
    008D F014      BLT	0x0090
(0042)    i=0;
FILE: <library>
    008E 2744      CLR	R20
    008F 2755      CLR	R21
    0090 CFF2      RJMP	0x0083
    0091 9508      RET
pop_gset2:
    0092 E0E2      LDI	R30,2
    0093 C00C      RJMP	pop
push_gset5:
    0094 92FA      ST	R15,-Y
    0095 92EA      ST	R14,-Y
push_gset4:
    0096 92DA      ST	R13,-Y
    0097 92CA      ST	R12,-Y
push_gset3:
    0098 92BA      ST	R11,-Y
    0099 92AA      ST	R10,-Y
push_gset2:
    009A 937A      ST	R23,-Y
    009B 936A      ST	R22,-Y
push_gset1:
    009C 935A      ST	R21,-Y
    009D 934A      ST	R20,-Y
    009E 9508      RET
pop_gset1:
    009F E0E1      LDI	R30,1
pop:
    00A0 9149      LD	R20,Y+
    00A1 9159      LD	R21,Y+
    00A2 FDE0      SBRC	R30,0
    00A3 9508      RET
    00A4 9169      LD	R22,Y+
    00A5 9179      LD	R23,Y+
    00A6 FDE1      SBRC	R30,1
    00A7 9508      RET
    00A8 90A9      LD	R10,Y+
    00A9 90B9      LD	R11,Y+
    00AA FDE2      SBRC	R30,2
    00AB 9508      RET
    00AC 90C9      LD	R12,Y+
    00AD 90D9      LD	R13,Y+
    00AE FDE3      SBRC	R30,3
    00AF 9508      RET
    00B0 90E9      LD	R14,Y+
    00B1 90F9      LD	R15,Y+
    00B2 9508      RET